1 /* 2 * SAS structures and definitions header file 3 * 4 * Copyright (C) 2005 Adaptec, Inc. All rights reserved. 5 * Copyright (C) 2005 Luben Tuikov <luben_tuikov@adaptec.com> 6 * 7 * This file is licensed under GPLv2. 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of the 12 * License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, but 15 * WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 17 * General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 22 * USA 23 * 24 */ 25 26 #ifndef _SAS_H_ 27 #define _SAS_H_ 28 29 #include <linux/types.h> 30 #include <asm/byteorder.h> 31 32 #define SAS_ADDR_SIZE 8 33 #define HASHED_SAS_ADDR_SIZE 3 34 #define SAS_ADDR(_sa) ((unsigned long long) be64_to_cpu(*(__be64 *)(_sa))) 35 36 #define SMP_REQUEST 0x40 37 #define SMP_RESPONSE 0x41 38 39 #define SSP_DATA 0x01 40 #define SSP_XFER_RDY 0x05 41 #define SSP_COMMAND 0x06 42 #define SSP_RESPONSE 0x07 43 #define SSP_TASK 0x16 44 45 #define SMP_REPORT_GENERAL 0x00 46 #define SMP_REPORT_MANUF_INFO 0x01 47 #define SMP_READ_GPIO_REG 0x02 48 #define SMP_DISCOVER 0x10 49 #define SMP_REPORT_PHY_ERR_LOG 0x11 50 #define SMP_REPORT_PHY_SATA 0x12 51 #define SMP_REPORT_ROUTE_INFO 0x13 52 #define SMP_WRITE_GPIO_REG 0x82 53 #define SMP_CONF_ROUTE_INFO 0x90 54 #define SMP_PHY_CONTROL 0x91 55 #define SMP_PHY_TEST_FUNCTION 0x92 56 57 #define SMP_RESP_FUNC_ACC 0x00 58 #define SMP_RESP_FUNC_UNK 0x01 59 #define SMP_RESP_FUNC_FAILED 0x02 60 #define SMP_RESP_INV_FRM_LEN 0x03 61 #define SMP_RESP_NO_PHY 0x10 62 #define SMP_RESP_NO_INDEX 0x11 63 #define SMP_RESP_PHY_NO_SATA 0x12 64 #define SMP_RESP_PHY_UNK_OP 0x13 65 #define SMP_RESP_PHY_UNK_TESTF 0x14 66 #define SMP_RESP_PHY_TEST_INPROG 0x15 67 #define SMP_RESP_PHY_VACANT 0x16 68 69 /* SAM TMFs */ 70 #define TMF_ABORT_TASK 0x01 71 #define TMF_ABORT_TASK_SET 0x02 72 #define TMF_CLEAR_TASK_SET 0x04 73 #define TMF_LU_RESET 0x08 74 #define TMF_CLEAR_ACA 0x40 75 #define TMF_QUERY_TASK 0x80 76 77 /* SAS TMF responses */ 78 #define TMF_RESP_FUNC_COMPLETE 0x00 79 #define TMF_RESP_INVALID_FRAME 0x02 80 #define TMF_RESP_FUNC_ESUPP 0x04 81 #define TMF_RESP_FUNC_FAILED 0x05 82 #define TMF_RESP_FUNC_SUCC 0x08 83 #define TMF_RESP_NO_LUN 0x09 84 #define TMF_RESP_OVERLAPPED_TAG 0x0A 85 86 enum sas_oob_mode { 87 OOB_NOT_CONNECTED, 88 SATA_OOB_MODE, 89 SAS_OOB_MODE 90 }; 91 92 /* See sas_discover.c if you plan on changing these */ 93 enum sas_dev_type { 94 NO_DEVICE = 0, /* protocol */ 95 SAS_END_DEV = 1, /* protocol */ 96 EDGE_DEV = 2, /* protocol */ 97 FANOUT_DEV = 3, /* protocol */ 98 SAS_HA = 4, 99 SATA_DEV = 5, 100 SATA_PM = 7, 101 SATA_PM_PORT= 8, 102 SATA_PENDING = 9, 103 }; 104 105 enum sas_protocol { 106 SAS_PROTOCOL_NONE = 0, 107 SAS_PROTOCOL_SATA = 0x01, 108 SAS_PROTOCOL_SMP = 0x02, 109 SAS_PROTOCOL_STP = 0x04, 110 SAS_PROTOCOL_SSP = 0x08, 111 SAS_PROTOCOL_ALL = 0x0E, 112 SAS_PROTOCOL_STP_ALL = SAS_PROTOCOL_STP|SAS_PROTOCOL_SATA, 113 }; 114 115 /* From the spec; local phys only */ 116 enum phy_func { 117 PHY_FUNC_NOP, 118 PHY_FUNC_LINK_RESET, /* Enables the phy */ 119 PHY_FUNC_HARD_RESET, 120 PHY_FUNC_DISABLE, 121 PHY_FUNC_CLEAR_ERROR_LOG = 5, 122 PHY_FUNC_CLEAR_AFFIL, 123 PHY_FUNC_TX_SATA_PS_SIGNAL, 124 PHY_FUNC_RELEASE_SPINUP_HOLD = 0x10, /* LOCAL PORT ONLY! */ 125 PHY_FUNC_SET_LINK_RATE, 126 PHY_FUNC_GET_EVENTS, 127 }; 128 129 /* SAS LLDD would need to report only _very_few_ of those, like BROADCAST. 130 * Most of those are here for completeness. 131 */ 132 enum sas_prim { 133 SAS_PRIM_AIP_NORMAL = 1, 134 SAS_PRIM_AIP_R0 = 2, 135 SAS_PRIM_AIP_R1 = 3, 136 SAS_PRIM_AIP_R2 = 4, 137 SAS_PRIM_AIP_WC = 5, 138 SAS_PRIM_AIP_WD = 6, 139 SAS_PRIM_AIP_WP = 7, 140 SAS_PRIM_AIP_RWP = 8, 141 142 SAS_PRIM_BC_CH = 9, 143 SAS_PRIM_BC_RCH0 = 10, 144 SAS_PRIM_BC_RCH1 = 11, 145 SAS_PRIM_BC_R0 = 12, 146 SAS_PRIM_BC_R1 = 13, 147 SAS_PRIM_BC_R2 = 14, 148 SAS_PRIM_BC_R3 = 15, 149 SAS_PRIM_BC_R4 = 16, 150 151 SAS_PRIM_NOTIFY_ENSP= 17, 152 SAS_PRIM_NOTIFY_R0 = 18, 153 SAS_PRIM_NOTIFY_R1 = 19, 154 SAS_PRIM_NOTIFY_R2 = 20, 155 156 SAS_PRIM_CLOSE_CLAF = 21, 157 SAS_PRIM_CLOSE_NORM = 22, 158 SAS_PRIM_CLOSE_R0 = 23, 159 SAS_PRIM_CLOSE_R1 = 24, 160 161 SAS_PRIM_OPEN_RTRY = 25, 162 SAS_PRIM_OPEN_RJCT = 26, 163 SAS_PRIM_OPEN_ACPT = 27, 164 165 SAS_PRIM_DONE = 28, 166 SAS_PRIM_BREAK = 29, 167 168 SATA_PRIM_DMAT = 33, 169 SATA_PRIM_PMNAK = 34, 170 SATA_PRIM_PMACK = 35, 171 SATA_PRIM_PMREQ_S = 36, 172 SATA_PRIM_PMREQ_P = 37, 173 SATA_SATA_R_ERR = 38, 174 }; 175 176 enum sas_open_rej_reason { 177 /* Abandon open */ 178 SAS_OREJ_UNKNOWN = 0, 179 SAS_OREJ_BAD_DEST = 1, 180 SAS_OREJ_CONN_RATE = 2, 181 SAS_OREJ_EPROTO = 3, 182 SAS_OREJ_RESV_AB0 = 4, 183 SAS_OREJ_RESV_AB1 = 5, 184 SAS_OREJ_RESV_AB2 = 6, 185 SAS_OREJ_RESV_AB3 = 7, 186 SAS_OREJ_WRONG_DEST= 8, 187 SAS_OREJ_STP_NORES = 9, 188 189 /* Retry open */ 190 SAS_OREJ_NO_DEST = 10, 191 SAS_OREJ_PATH_BLOCKED = 11, 192 SAS_OREJ_RSVD_CONT0 = 12, 193 SAS_OREJ_RSVD_CONT1 = 13, 194 SAS_OREJ_RSVD_INIT0 = 14, 195 SAS_OREJ_RSVD_INIT1 = 15, 196 SAS_OREJ_RSVD_STOP0 = 16, 197 SAS_OREJ_RSVD_STOP1 = 17, 198 SAS_OREJ_RSVD_RETRY = 18, 199 }; 200 201 enum sas_gpio_reg_type { 202 SAS_GPIO_REG_CFG = 0, 203 SAS_GPIO_REG_RX = 1, 204 SAS_GPIO_REG_RX_GP = 2, 205 SAS_GPIO_REG_TX = 3, 206 SAS_GPIO_REG_TX_GP = 4, 207 }; 208 209 struct dev_to_host_fis { 210 u8 fis_type; /* 0x34 */ 211 u8 flags; 212 u8 status; 213 u8 error; 214 215 u8 lbal; 216 union { u8 lbam; u8 byte_count_low; }; 217 union { u8 lbah; u8 byte_count_high; }; 218 u8 device; 219 220 u8 lbal_exp; 221 u8 lbam_exp; 222 u8 lbah_exp; 223 u8 _r_a; 224 225 union { u8 sector_count; u8 interrupt_reason; }; 226 u8 sector_count_exp; 227 u8 _r_b; 228 u8 _r_c; 229 230 u32 _r_d; 231 } __attribute__ ((packed)); 232 233 struct host_to_dev_fis { 234 u8 fis_type; /* 0x27 */ 235 u8 flags; 236 u8 command; 237 u8 features; 238 239 u8 lbal; 240 union { u8 lbam; u8 byte_count_low; }; 241 union { u8 lbah; u8 byte_count_high; }; 242 u8 device; 243 244 u8 lbal_exp; 245 u8 lbam_exp; 246 u8 lbah_exp; 247 u8 features_exp; 248 249 union { u8 sector_count; u8 interrupt_reason; }; 250 u8 sector_count_exp; 251 u8 _r_a; 252 u8 control; 253 254 u32 _r_b; 255 } __attribute__ ((packed)); 256 257 /* Prefer to have code clarity over header file clarity. 258 */ 259 #ifdef __LITTLE_ENDIAN_BITFIELD 260 struct sas_identify_frame { 261 /* Byte 0 */ 262 u8 frame_type:4; 263 u8 dev_type:3; 264 u8 _un0:1; 265 266 /* Byte 1 */ 267 u8 _un1; 268 269 /* Byte 2 */ 270 union { 271 struct { 272 u8 _un20:1; 273 u8 smp_iport:1; 274 u8 stp_iport:1; 275 u8 ssp_iport:1; 276 u8 _un247:4; 277 }; 278 u8 initiator_bits; 279 }; 280 281 /* Byte 3 */ 282 union { 283 struct { 284 u8 _un30:1; 285 u8 smp_tport:1; 286 u8 stp_tport:1; 287 u8 ssp_tport:1; 288 u8 _un347:4; 289 }; 290 u8 target_bits; 291 }; 292 293 /* Byte 4 - 11 */ 294 u8 _un4_11[8]; 295 296 /* Byte 12 - 19 */ 297 u8 sas_addr[SAS_ADDR_SIZE]; 298 299 /* Byte 20 */ 300 u8 phy_id; 301 302 u8 _un21_27[7]; 303 304 __be32 crc; 305 } __attribute__ ((packed)); 306 307 struct ssp_frame_hdr { 308 u8 frame_type; 309 u8 hashed_dest_addr[HASHED_SAS_ADDR_SIZE]; 310 u8 _r_a; 311 u8 hashed_src_addr[HASHED_SAS_ADDR_SIZE]; 312 __be16 _r_b; 313 314 u8 changing_data_ptr:1; 315 u8 retransmit:1; 316 u8 retry_data_frames:1; 317 u8 _r_c:5; 318 319 u8 num_fill_bytes:2; 320 u8 _r_d:6; 321 322 u32 _r_e; 323 __be16 tag; 324 __be16 tptt; 325 __be32 data_offs; 326 } __attribute__ ((packed)); 327 328 struct ssp_response_iu { 329 u8 _r_a[10]; 330 331 u8 datapres:2; 332 u8 _r_b:6; 333 334 u8 status; 335 336 u32 _r_c; 337 338 __be32 sense_data_len; 339 __be32 response_data_len; 340 341 u8 resp_data[0]; 342 u8 sense_data[0]; 343 } __attribute__ ((packed)); 344 345 /* ---------- SMP ---------- */ 346 347 struct report_general_resp { 348 __be16 change_count; 349 __be16 route_indexes; 350 u8 _r_a; 351 u8 num_phys; 352 353 u8 conf_route_table:1; 354 u8 configuring:1; 355 u8 config_others:1; 356 u8 orej_retry_supp:1; 357 u8 stp_cont_awt:1; 358 u8 self_config:1; 359 u8 zone_config:1; 360 u8 t2t_supp:1; 361 362 u8 _r_c; 363 364 u8 enclosure_logical_id[8]; 365 366 u8 _r_d[12]; 367 } __attribute__ ((packed)); 368 369 struct discover_resp { 370 u8 _r_a[5]; 371 372 u8 phy_id; 373 __be16 _r_b; 374 375 u8 _r_c:4; 376 u8 attached_dev_type:3; 377 u8 _r_d:1; 378 379 u8 linkrate:4; 380 u8 _r_e:4; 381 382 u8 attached_sata_host:1; 383 u8 iproto:3; 384 u8 _r_f:4; 385 386 u8 attached_sata_dev:1; 387 u8 tproto:3; 388 u8 _r_g:3; 389 u8 attached_sata_ps:1; 390 391 u8 sas_addr[8]; 392 u8 attached_sas_addr[8]; 393 u8 attached_phy_id; 394 395 u8 _r_h[7]; 396 397 u8 hmin_linkrate:4; 398 u8 pmin_linkrate:4; 399 u8 hmax_linkrate:4; 400 u8 pmax_linkrate:4; 401 402 u8 change_count; 403 404 u8 pptv:4; 405 u8 _r_i:3; 406 u8 virtual:1; 407 408 u8 routing_attr:4; 409 u8 _r_j:4; 410 411 u8 conn_type; 412 u8 conn_el_index; 413 u8 conn_phy_link; 414 415 u8 _r_k[8]; 416 } __attribute__ ((packed)); 417 418 struct report_phy_sata_resp { 419 u8 _r_a[5]; 420 421 u8 phy_id; 422 u8 _r_b; 423 424 u8 affil_valid:1; 425 u8 affil_supp:1; 426 u8 _r_c:6; 427 428 u32 _r_d; 429 430 u8 stp_sas_addr[8]; 431 432 struct dev_to_host_fis fis; 433 434 u32 _r_e; 435 436 u8 affil_stp_ini_addr[8]; 437 438 __be32 crc; 439 } __attribute__ ((packed)); 440 441 struct smp_resp { 442 u8 frame_type; 443 u8 function; 444 u8 result; 445 u8 reserved; 446 union { 447 struct report_general_resp rg; 448 struct discover_resp disc; 449 struct report_phy_sata_resp rps; 450 }; 451 } __attribute__ ((packed)); 452 453 #elif defined(__BIG_ENDIAN_BITFIELD) 454 struct sas_identify_frame { 455 /* Byte 0 */ 456 u8 _un0:1; 457 u8 dev_type:3; 458 u8 frame_type:4; 459 460 /* Byte 1 */ 461 u8 _un1; 462 463 /* Byte 2 */ 464 union { 465 struct { 466 u8 _un247:4; 467 u8 ssp_iport:1; 468 u8 stp_iport:1; 469 u8 smp_iport:1; 470 u8 _un20:1; 471 }; 472 u8 initiator_bits; 473 }; 474 475 /* Byte 3 */ 476 union { 477 struct { 478 u8 _un347:4; 479 u8 ssp_tport:1; 480 u8 stp_tport:1; 481 u8 smp_tport:1; 482 u8 _un30:1; 483 }; 484 u8 target_bits; 485 }; 486 487 /* Byte 4 - 11 */ 488 u8 _un4_11[8]; 489 490 /* Byte 12 - 19 */ 491 u8 sas_addr[SAS_ADDR_SIZE]; 492 493 /* Byte 20 */ 494 u8 phy_id; 495 496 u8 _un21_27[7]; 497 498 __be32 crc; 499 } __attribute__ ((packed)); 500 501 struct ssp_frame_hdr { 502 u8 frame_type; 503 u8 hashed_dest_addr[HASHED_SAS_ADDR_SIZE]; 504 u8 _r_a; 505 u8 hashed_src_addr[HASHED_SAS_ADDR_SIZE]; 506 __be16 _r_b; 507 508 u8 _r_c:5; 509 u8 retry_data_frames:1; 510 u8 retransmit:1; 511 u8 changing_data_ptr:1; 512 513 u8 _r_d:6; 514 u8 num_fill_bytes:2; 515 516 u32 _r_e; 517 __be16 tag; 518 __be16 tptt; 519 __be32 data_offs; 520 } __attribute__ ((packed)); 521 522 struct ssp_response_iu { 523 u8 _r_a[10]; 524 525 u8 _r_b:6; 526 u8 datapres:2; 527 528 u8 status; 529 530 u32 _r_c; 531 532 __be32 sense_data_len; 533 __be32 response_data_len; 534 535 u8 resp_data[0]; 536 u8 sense_data[0]; 537 } __attribute__ ((packed)); 538 539 /* ---------- SMP ---------- */ 540 541 struct report_general_resp { 542 __be16 change_count; 543 __be16 route_indexes; 544 u8 _r_a; 545 u8 num_phys; 546 547 u8 t2t_supp:1; 548 u8 zone_config:1; 549 u8 self_config:1; 550 u8 stp_cont_awt:1; 551 u8 orej_retry_supp:1; 552 u8 config_others:1; 553 u8 configuring:1; 554 u8 conf_route_table:1; 555 556 u8 _r_c; 557 558 u8 enclosure_logical_id[8]; 559 560 u8 _r_d[12]; 561 } __attribute__ ((packed)); 562 563 struct discover_resp { 564 u8 _r_a[5]; 565 566 u8 phy_id; 567 __be16 _r_b; 568 569 u8 _r_d:1; 570 u8 attached_dev_type:3; 571 u8 _r_c:4; 572 573 u8 _r_e:4; 574 u8 linkrate:4; 575 576 u8 _r_f:4; 577 u8 iproto:3; 578 u8 attached_sata_host:1; 579 580 u8 attached_sata_ps:1; 581 u8 _r_g:3; 582 u8 tproto:3; 583 u8 attached_sata_dev:1; 584 585 u8 sas_addr[8]; 586 u8 attached_sas_addr[8]; 587 u8 attached_phy_id; 588 589 u8 _r_h[7]; 590 591 u8 pmin_linkrate:4; 592 u8 hmin_linkrate:4; 593 u8 pmax_linkrate:4; 594 u8 hmax_linkrate:4; 595 596 u8 change_count; 597 598 u8 virtual:1; 599 u8 _r_i:3; 600 u8 pptv:4; 601 602 u8 _r_j:4; 603 u8 routing_attr:4; 604 605 u8 conn_type; 606 u8 conn_el_index; 607 u8 conn_phy_link; 608 609 u8 _r_k[8]; 610 } __attribute__ ((packed)); 611 612 struct report_phy_sata_resp { 613 u8 _r_a[5]; 614 615 u8 phy_id; 616 u8 _r_b; 617 618 u8 _r_c:6; 619 u8 affil_supp:1; 620 u8 affil_valid:1; 621 622 u32 _r_d; 623 624 u8 stp_sas_addr[8]; 625 626 struct dev_to_host_fis fis; 627 628 u32 _r_e; 629 630 u8 affil_stp_ini_addr[8]; 631 632 __be32 crc; 633 } __attribute__ ((packed)); 634 635 struct smp_resp { 636 u8 frame_type; 637 u8 function; 638 u8 result; 639 u8 reserved; 640 union { 641 struct report_general_resp rg; 642 struct discover_resp disc; 643 struct report_phy_sata_resp rps; 644 }; 645 } __attribute__ ((packed)); 646 647 #else 648 #error "Bitfield order not defined!" 649 #endif 650 651 #endif /* _SAS_H_ */ 652