1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 2 /* Copyright (c) 2021, Microsoft Corporation. */ 3 4 #ifndef _HW_CHANNEL_H 5 #define _HW_CHANNEL_H 6 7 #define DEFAULT_LOG2_THROTTLING_FOR_ERROR_EQ 4 8 9 #define HW_CHANNEL_MAX_REQUEST_SIZE 0x1000 10 #define HW_CHANNEL_MAX_RESPONSE_SIZE 0x1000 11 12 #define HW_CHANNEL_VF_BOOTSTRAP_QUEUE_DEPTH 1 13 14 #define HWC_INIT_DATA_CQID 1 15 #define HWC_INIT_DATA_RQID 2 16 #define HWC_INIT_DATA_SQID 3 17 #define HWC_INIT_DATA_QUEUE_DEPTH 4 18 #define HWC_INIT_DATA_MAX_REQUEST 5 19 #define HWC_INIT_DATA_MAX_RESPONSE 6 20 #define HWC_INIT_DATA_MAX_NUM_CQS 7 21 #define HWC_INIT_DATA_PDID 8 22 #define HWC_INIT_DATA_GPA_MKEY 9 23 #define HWC_INIT_DATA_PF_DEST_RQ_ID 10 24 #define HWC_INIT_DATA_PF_DEST_CQ_ID 11 25 26 /* Structures labeled with "HW DATA" are exchanged with the hardware. All of 27 * them are naturally aligned and hence don't need __packed. 28 */ 29 30 union hwc_init_eq_id_db { 31 u32 as_uint32; 32 33 struct { 34 u32 eq_id : 16; 35 u32 doorbell : 16; 36 }; 37 }; /* HW DATA */ 38 39 union hwc_init_type_data { 40 u32 as_uint32; 41 42 struct { 43 u32 value : 24; 44 u32 type : 8; 45 }; 46 }; /* HW DATA */ 47 48 struct hwc_rx_oob { 49 u32 type : 6; 50 u32 eom : 1; 51 u32 som : 1; 52 u32 vendor_err : 8; 53 u32 reserved1 : 16; 54 55 u32 src_virt_wq : 24; 56 u32 src_vfid : 8; 57 58 u32 reserved2; 59 60 union { 61 u32 wqe_addr_low; 62 u32 wqe_offset; 63 }; 64 65 u32 wqe_addr_high; 66 67 u32 client_data_unit : 14; 68 u32 reserved3 : 18; 69 70 u32 tx_oob_data_size; 71 72 u32 chunk_offset : 21; 73 u32 reserved4 : 11; 74 }; /* HW DATA */ 75 76 struct hwc_tx_oob { 77 u32 reserved1; 78 79 u32 reserved2; 80 81 u32 vrq_id : 24; 82 u32 dest_vfid : 8; 83 84 u32 vrcq_id : 24; 85 u32 reserved3 : 8; 86 87 u32 vscq_id : 24; 88 u32 loopback : 1; 89 u32 lso_override: 1; 90 u32 dest_pf : 1; 91 u32 reserved4 : 5; 92 93 u32 vsq_id : 24; 94 u32 reserved5 : 8; 95 }; /* HW DATA */ 96 97 struct hwc_work_request { 98 void *buf_va; 99 void *buf_sge_addr; 100 u32 buf_len; 101 u32 msg_size; 102 103 struct gdma_wqe_request wqe_req; 104 struct hwc_tx_oob tx_oob; 105 106 struct gdma_sge sge; 107 }; 108 109 /* hwc_dma_buf represents the array of in-flight WQEs. 110 * mem_info as know as the GDMA mapped memory is partitioned and used by 111 * in-flight WQEs. 112 * The number of WQEs is determined by the number of in-flight messages. 113 */ 114 struct hwc_dma_buf { 115 struct gdma_mem_info mem_info; 116 117 u32 gpa_mkey; 118 119 u32 num_reqs; 120 struct hwc_work_request reqs[]; 121 }; 122 123 typedef void hwc_rx_event_handler_t(void *ctx, u32 gdma_rxq_id, 124 const struct hwc_rx_oob *rx_oob); 125 126 typedef void hwc_tx_event_handler_t(void *ctx, u32 gdma_txq_id, 127 const struct hwc_rx_oob *rx_oob); 128 129 struct hwc_cq { 130 struct hw_channel_context *hwc; 131 132 struct gdma_queue *gdma_cq; 133 struct gdma_queue *gdma_eq; 134 struct gdma_comp *comp_buf; 135 u16 queue_depth; 136 137 hwc_rx_event_handler_t *rx_event_handler; 138 void *rx_event_ctx; 139 140 hwc_tx_event_handler_t *tx_event_handler; 141 void *tx_event_ctx; 142 }; 143 144 struct hwc_wq { 145 struct hw_channel_context *hwc; 146 147 struct gdma_queue *gdma_wq; 148 struct hwc_dma_buf *msg_buf; 149 u16 queue_depth; 150 151 struct hwc_cq *hwc_cq; 152 }; 153 154 struct hwc_caller_ctx { 155 struct completion comp_event; 156 void *output_buf; 157 u32 output_buflen; 158 159 u32 error; /* Linux error code */ 160 u32 status_code; 161 }; 162 163 struct hw_channel_context { 164 struct gdma_dev *gdma_dev; 165 struct device *dev; 166 167 u16 num_inflight_msg; 168 u32 max_req_msg_size; 169 170 u16 hwc_init_q_depth_max; 171 u32 hwc_init_max_req_msg_size; 172 u32 hwc_init_max_resp_msg_size; 173 174 struct completion hwc_init_eqe_comp; 175 176 struct hwc_wq *rxq; 177 struct hwc_wq *txq; 178 struct hwc_cq *cq; 179 180 struct semaphore sema; 181 struct gdma_resource inflight_msg_res; 182 183 u32 pf_dest_vrq_id; 184 u32 pf_dest_vrcq_id; 185 186 struct hwc_caller_ctx *caller_ctx; 187 }; 188 189 int mana_hwc_create_channel(struct gdma_context *gc); 190 void mana_hwc_destroy_channel(struct gdma_context *gc); 191 192 int mana_hwc_send_request(struct hw_channel_context *hwc, u32 req_len, 193 const void *req, u32 resp_len, void *resp); 194 195 #endif /* _HW_CHANNEL_H */ 196