1*325a4af6SDavid Brownell 2*325a4af6SDavid Brownell /* 3*325a4af6SDavid Brownell * Board initialization code should put one of these into dev->platform_data 4*325a4af6SDavid Brownell * and place the isp116x onto platform_bus. 5*325a4af6SDavid Brownell */ 6*325a4af6SDavid Brownell 7*325a4af6SDavid Brownell struct isp116x_platform_data { 8*325a4af6SDavid Brownell /* Enable internal resistors on downstream ports */ 9*325a4af6SDavid Brownell unsigned sel15Kres:1; 10*325a4af6SDavid Brownell /* On-chip overcurrent detection */ 11*325a4af6SDavid Brownell unsigned oc_enable:1; 12*325a4af6SDavid Brownell /* INT output polarity */ 13*325a4af6SDavid Brownell unsigned int_act_high:1; 14*325a4af6SDavid Brownell /* INT edge or level triggered */ 15*325a4af6SDavid Brownell unsigned int_edge_triggered:1; 16*325a4af6SDavid Brownell /* Enable wakeup by devices on usb bus (e.g. wakeup 17*325a4af6SDavid Brownell by attachment/detachment or by device activity 18*325a4af6SDavid Brownell such as moving a mouse). When chosen, this option 19*325a4af6SDavid Brownell prevents stopping internal clock, increasing 20*325a4af6SDavid Brownell thereby power consumption in suspended state. */ 21*325a4af6SDavid Brownell unsigned remote_wakeup_enable:1; 22*325a4af6SDavid Brownell /* Inter-io delay (ns). The chip is picky about access timings; it 23*325a4af6SDavid Brownell expects at least: 24*325a4af6SDavid Brownell 150ns delay between consecutive accesses to DATA_REG, 25*325a4af6SDavid Brownell 300ns delay between access to ADDR_REG and DATA_REG 26*325a4af6SDavid Brownell OE, WE MUST NOT be changed during these intervals 27*325a4af6SDavid Brownell */ 28*325a4af6SDavid Brownell void (*delay) (struct device * dev, int delay); 29*325a4af6SDavid Brownell }; 30