1e443b333SAlexander Shishkin /* 2e443b333SAlexander Shishkin * Platform data for the chipidea USB dual role controller 3e443b333SAlexander Shishkin */ 4e443b333SAlexander Shishkin 5e443b333SAlexander Shishkin #ifndef __LINUX_USB_CHIPIDEA_H 6e443b333SAlexander Shishkin #define __LINUX_USB_CHIPIDEA_H 7e443b333SAlexander Shishkin 8a2c3d690SRichard Zhao #include <linux/usb/otg.h> 9a2c3d690SRichard Zhao 108e22978cSAlexander Shishkin struct ci_hdrc; 118e22978cSAlexander Shishkin struct ci_hdrc_platform_data { 12e443b333SAlexander Shishkin const char *name; 13e443b333SAlexander Shishkin /* offset of the capability registers */ 14e443b333SAlexander Shishkin uintptr_t capoffset; 15bd841986SAlexander Shishkin unsigned power_budget; 161e5e2d3dSAntoine Tenart struct phy *phy; 171e5e2d3dSAntoine Tenart /* old usb_phy interface */ 18ef44cb42SAntoine Tenart struct usb_phy *usb_phy; 1940dcd0e8SMichael Grzeschik enum usb_phy_interface phy_mode; 20e443b333SAlexander Shishkin unsigned long flags; 218e22978cSAlexander Shishkin #define CI_HDRC_REGS_SHARED BIT(0) 221f874edcSPeter Chen #define CI_HDRC_SUPPORTS_RUNTIME_PM BIT(2) 238e22978cSAlexander Shishkin #define CI_HDRC_DISABLE_STREAMING BIT(3) 24577b232fSPeter Chen /* 25577b232fSPeter Chen * Only set it when DCCPARAMS.DC==1 and DCCPARAMS.HC==1, 26577b232fSPeter Chen * but otg is not supported (no register otgsc). 27577b232fSPeter Chen */ 28577b232fSPeter Chen #define CI_HDRC_DUAL_ROLE_NOT_OTG BIT(4) 29ed8f8318SPeter Chen #define CI_HDRC_IMX28_WRITE_FIX BIT(5) 304f6743d5SMichael Grzeschik #define CI_HDRC_FORCE_FULLSPEED BIT(6) 31*6adb9b7bSLi Jun #define CI_HDRC_TURN_VBUS_EARLY_ON BIT(7) 32691962d1SSascha Hauer enum usb_dr_mode dr_mode; 338e22978cSAlexander Shishkin #define CI_HDRC_CONTROLLER_RESET_EVENT 0 348e22978cSAlexander Shishkin #define CI_HDRC_CONTROLLER_STOPPED_EVENT 1 358e22978cSAlexander Shishkin void (*notify_event) (struct ci_hdrc *ci, unsigned event); 361542d9c3SPeter Chen struct regulator *reg_vbus; 37f6a9ff07SPeter Chen bool tpl_support; 38e443b333SAlexander Shishkin }; 39e443b333SAlexander Shishkin 40e443b333SAlexander Shishkin /* Default offset of capability registers */ 41e443b333SAlexander Shishkin #define DEF_CAPOFFSET 0x100 42e443b333SAlexander Shishkin 438e22978cSAlexander Shishkin /* Add ci hdrc device */ 448e22978cSAlexander Shishkin struct platform_device *ci_hdrc_add_device(struct device *dev, 45cbc6dc2aSRichard Zhao struct resource *res, int nres, 468e22978cSAlexander Shishkin struct ci_hdrc_platform_data *platdata); 478e22978cSAlexander Shishkin /* Remove ci hdrc device */ 488e22978cSAlexander Shishkin void ci_hdrc_remove_device(struct platform_device *pdev); 49cbc6dc2aSRichard Zhao 50e443b333SAlexander Shishkin #endif 51