1 #ifndef LINUX_SSB_H_ 2 #define LINUX_SSB_H_ 3 4 #include <linux/device.h> 5 #include <linux/list.h> 6 #include <linux/types.h> 7 #include <linux/spinlock.h> 8 #include <linux/pci.h> 9 #include <linux/mod_devicetable.h> 10 #include <linux/dma-mapping.h> 11 12 #include <linux/ssb/ssb_regs.h> 13 14 15 struct pcmcia_device; 16 struct ssb_bus; 17 struct ssb_driver; 18 19 struct ssb_sprom { 20 u8 revision; 21 u8 il0mac[6]; /* MAC address for 802.11b/g */ 22 u8 et0mac[6]; /* MAC address for Ethernet */ 23 u8 et1mac[6]; /* MAC address for 802.11a */ 24 u8 et0phyaddr; /* MII address for enet0 */ 25 u8 et1phyaddr; /* MII address for enet1 */ 26 u8 et0mdcport; /* MDIO for enet0 */ 27 u8 et1mdcport; /* MDIO for enet1 */ 28 u8 board_rev; /* Board revision number from SPROM. */ 29 u8 country_code; /* Country Code */ 30 u8 ant_available_a; /* 2GHz antenna available bits (up to 4) */ 31 u8 ant_available_bg; /* 5GHz antenna available bits (up to 4) */ 32 u16 pa0b0; 33 u16 pa0b1; 34 u16 pa0b2; 35 u16 pa1b0; 36 u16 pa1b1; 37 u16 pa1b2; 38 u16 pa1lob0; 39 u16 pa1lob1; 40 u16 pa1lob2; 41 u16 pa1hib0; 42 u16 pa1hib1; 43 u16 pa1hib2; 44 u8 gpio0; /* GPIO pin 0 */ 45 u8 gpio1; /* GPIO pin 1 */ 46 u8 gpio2; /* GPIO pin 2 */ 47 u8 gpio3; /* GPIO pin 3 */ 48 u16 maxpwr_bg; /* 2.4GHz Amplifier Max Power (in dBm Q5.2) */ 49 u16 maxpwr_al; /* 5.2GHz Amplifier Max Power (in dBm Q5.2) */ 50 u16 maxpwr_a; /* 5.3GHz Amplifier Max Power (in dBm Q5.2) */ 51 u16 maxpwr_ah; /* 5.8GHz Amplifier Max Power (in dBm Q5.2) */ 52 u8 itssi_a; /* Idle TSSI Target for A-PHY */ 53 u8 itssi_bg; /* Idle TSSI Target for B/G-PHY */ 54 u8 tri2g; /* 2.4GHz TX isolation */ 55 u8 tri5gl; /* 5.2GHz TX isolation */ 56 u8 tri5g; /* 5.3GHz TX isolation */ 57 u8 tri5gh; /* 5.8GHz TX isolation */ 58 u8 rxpo2g; /* 2GHz RX power offset */ 59 u8 rxpo5g; /* 5GHz RX power offset */ 60 u8 rssisav2g; /* 2GHz RSSI params */ 61 u8 rssismc2g; 62 u8 rssismf2g; 63 u8 bxa2g; /* 2GHz BX arch */ 64 u8 rssisav5g; /* 5GHz RSSI params */ 65 u8 rssismc5g; 66 u8 rssismf5g; 67 u8 bxa5g; /* 5GHz BX arch */ 68 u16 cck2gpo; /* CCK power offset */ 69 u32 ofdm2gpo; /* 2.4GHz OFDM power offset */ 70 u32 ofdm5glpo; /* 5.2GHz OFDM power offset */ 71 u32 ofdm5gpo; /* 5.3GHz OFDM power offset */ 72 u32 ofdm5ghpo; /* 5.8GHz OFDM power offset */ 73 u16 boardflags_lo; /* Board flags (bits 0-15) */ 74 u16 boardflags_hi; /* Board flags (bits 16-31) */ 75 u16 boardflags2_lo; /* Board flags (bits 32-47) */ 76 u16 boardflags2_hi; /* Board flags (bits 48-63) */ 77 /* TODO store board flags in a single u64 */ 78 79 /* Antenna gain values for up to 4 antennas 80 * on each band. Values in dBm/4 (Q5.2). Negative gain means the 81 * loss in the connectors is bigger than the gain. */ 82 struct { 83 struct { 84 s8 a0, a1, a2, a3; 85 } ghz24; /* 2.4GHz band */ 86 struct { 87 s8 a0, a1, a2, a3; 88 } ghz5; /* 5GHz band */ 89 } antenna_gain; 90 91 /* TODO - add any parameters needed from rev 2, 3, 4, 5 or 8 SPROMs */ 92 }; 93 94 /* Information about the PCB the circuitry is soldered on. */ 95 struct ssb_boardinfo { 96 u16 vendor; 97 u16 type; 98 u16 rev; 99 }; 100 101 102 struct ssb_device; 103 /* Lowlevel read/write operations on the device MMIO. 104 * Internal, don't use that outside of ssb. */ 105 struct ssb_bus_ops { 106 u8 (*read8)(struct ssb_device *dev, u16 offset); 107 u16 (*read16)(struct ssb_device *dev, u16 offset); 108 u32 (*read32)(struct ssb_device *dev, u16 offset); 109 void (*write8)(struct ssb_device *dev, u16 offset, u8 value); 110 void (*write16)(struct ssb_device *dev, u16 offset, u16 value); 111 void (*write32)(struct ssb_device *dev, u16 offset, u32 value); 112 #ifdef CONFIG_SSB_BLOCKIO 113 void (*block_read)(struct ssb_device *dev, void *buffer, 114 size_t count, u16 offset, u8 reg_width); 115 void (*block_write)(struct ssb_device *dev, const void *buffer, 116 size_t count, u16 offset, u8 reg_width); 117 #endif 118 }; 119 120 121 /* Core-ID values. */ 122 #define SSB_DEV_CHIPCOMMON 0x800 123 #define SSB_DEV_ILINE20 0x801 124 #define SSB_DEV_SDRAM 0x803 125 #define SSB_DEV_PCI 0x804 126 #define SSB_DEV_MIPS 0x805 127 #define SSB_DEV_ETHERNET 0x806 128 #define SSB_DEV_V90 0x807 129 #define SSB_DEV_USB11_HOSTDEV 0x808 130 #define SSB_DEV_ADSL 0x809 131 #define SSB_DEV_ILINE100 0x80A 132 #define SSB_DEV_IPSEC 0x80B 133 #define SSB_DEV_PCMCIA 0x80D 134 #define SSB_DEV_INTERNAL_MEM 0x80E 135 #define SSB_DEV_MEMC_SDRAM 0x80F 136 #define SSB_DEV_EXTIF 0x811 137 #define SSB_DEV_80211 0x812 138 #define SSB_DEV_MIPS_3302 0x816 139 #define SSB_DEV_USB11_HOST 0x817 140 #define SSB_DEV_USB11_DEV 0x818 141 #define SSB_DEV_USB20_HOST 0x819 142 #define SSB_DEV_USB20_DEV 0x81A 143 #define SSB_DEV_SDIO_HOST 0x81B 144 #define SSB_DEV_ROBOSWITCH 0x81C 145 #define SSB_DEV_PARA_ATA 0x81D 146 #define SSB_DEV_SATA_XORDMA 0x81E 147 #define SSB_DEV_ETHERNET_GBIT 0x81F 148 #define SSB_DEV_PCIE 0x820 149 #define SSB_DEV_MIMO_PHY 0x821 150 #define SSB_DEV_SRAM_CTRLR 0x822 151 #define SSB_DEV_MINI_MACPHY 0x823 152 #define SSB_DEV_ARM_1176 0x824 153 #define SSB_DEV_ARM_7TDMI 0x825 154 155 /* Vendor-ID values */ 156 #define SSB_VENDOR_BROADCOM 0x4243 157 158 /* Some kernel subsystems poke with dev->drvdata, so we must use the 159 * following ugly workaround to get from struct device to struct ssb_device */ 160 struct __ssb_dev_wrapper { 161 struct device dev; 162 struct ssb_device *sdev; 163 }; 164 165 struct ssb_device { 166 /* Having a copy of the ops pointer in each dev struct 167 * is an optimization. */ 168 const struct ssb_bus_ops *ops; 169 170 struct device *dev; 171 172 struct ssb_bus *bus; 173 struct ssb_device_id id; 174 175 u8 core_index; 176 unsigned int irq; 177 178 /* Internal-only stuff follows. */ 179 void *drvdata; /* Per-device data */ 180 void *devtypedata; /* Per-devicetype (eg 802.11) data */ 181 }; 182 183 /* Go from struct device to struct ssb_device. */ 184 static inline 185 struct ssb_device * dev_to_ssb_dev(struct device *dev) 186 { 187 struct __ssb_dev_wrapper *wrap; 188 wrap = container_of(dev, struct __ssb_dev_wrapper, dev); 189 return wrap->sdev; 190 } 191 192 /* Device specific user data */ 193 static inline 194 void ssb_set_drvdata(struct ssb_device *dev, void *data) 195 { 196 dev->drvdata = data; 197 } 198 static inline 199 void * ssb_get_drvdata(struct ssb_device *dev) 200 { 201 return dev->drvdata; 202 } 203 204 /* Devicetype specific user data. This is per device-type (not per device) */ 205 void ssb_set_devtypedata(struct ssb_device *dev, void *data); 206 static inline 207 void * ssb_get_devtypedata(struct ssb_device *dev) 208 { 209 return dev->devtypedata; 210 } 211 212 213 struct ssb_driver { 214 const char *name; 215 const struct ssb_device_id *id_table; 216 217 int (*probe)(struct ssb_device *dev, const struct ssb_device_id *id); 218 void (*remove)(struct ssb_device *dev); 219 int (*suspend)(struct ssb_device *dev, pm_message_t state); 220 int (*resume)(struct ssb_device *dev); 221 void (*shutdown)(struct ssb_device *dev); 222 223 struct device_driver drv; 224 }; 225 #define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv) 226 227 extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner); 228 static inline int ssb_driver_register(struct ssb_driver *drv) 229 { 230 return __ssb_driver_register(drv, THIS_MODULE); 231 } 232 extern void ssb_driver_unregister(struct ssb_driver *drv); 233 234 235 236 237 enum ssb_bustype { 238 SSB_BUSTYPE_SSB, /* This SSB bus is the system bus */ 239 SSB_BUSTYPE_PCI, /* SSB is connected to PCI bus */ 240 SSB_BUSTYPE_PCMCIA, /* SSB is connected to PCMCIA bus */ 241 SSB_BUSTYPE_SDIO, /* SSB is connected to SDIO bus */ 242 }; 243 244 /* board_vendor */ 245 #define SSB_BOARDVENDOR_BCM 0x14E4 /* Broadcom */ 246 #define SSB_BOARDVENDOR_DELL 0x1028 /* Dell */ 247 #define SSB_BOARDVENDOR_HP 0x0E11 /* HP */ 248 /* board_type */ 249 #define SSB_BOARD_BCM94306MP 0x0418 250 #define SSB_BOARD_BCM4309G 0x0421 251 #define SSB_BOARD_BCM4306CB 0x0417 252 #define SSB_BOARD_BCM4309MP 0x040C 253 #define SSB_BOARD_MP4318 0x044A 254 #define SSB_BOARD_BU4306 0x0416 255 #define SSB_BOARD_BU4309 0x040A 256 /* chip_package */ 257 #define SSB_CHIPPACK_BCM4712S 1 /* Small 200pin 4712 */ 258 #define SSB_CHIPPACK_BCM4712M 2 /* Medium 225pin 4712 */ 259 #define SSB_CHIPPACK_BCM4712L 0 /* Large 340pin 4712 */ 260 261 #include <linux/ssb/ssb_driver_chipcommon.h> 262 #include <linux/ssb/ssb_driver_mips.h> 263 #include <linux/ssb/ssb_driver_extif.h> 264 #include <linux/ssb/ssb_driver_pci.h> 265 266 struct ssb_bus { 267 /* The MMIO area. */ 268 void __iomem *mmio; 269 270 const struct ssb_bus_ops *ops; 271 272 /* The core currently mapped into the MMIO window. 273 * Not valid on all host-buses. So don't use outside of SSB. */ 274 struct ssb_device *mapped_device; 275 union { 276 /* Currently mapped PCMCIA segment. (bustype == SSB_BUSTYPE_PCMCIA only) */ 277 u8 mapped_pcmcia_seg; 278 /* Current SSB base address window for SDIO. */ 279 u32 sdio_sbaddr; 280 }; 281 /* Lock for core and segment switching. 282 * On PCMCIA-host busses this is used to protect the whole MMIO access. */ 283 spinlock_t bar_lock; 284 285 /* The host-bus this backplane is running on. */ 286 enum ssb_bustype bustype; 287 /* Pointers to the host-bus. Check bustype before using any of these pointers. */ 288 union { 289 /* Pointer to the PCI bus (only valid if bustype == SSB_BUSTYPE_PCI). */ 290 struct pci_dev *host_pci; 291 /* Pointer to the PCMCIA device (only if bustype == SSB_BUSTYPE_PCMCIA). */ 292 struct pcmcia_device *host_pcmcia; 293 /* Pointer to the SDIO device (only if bustype == SSB_BUSTYPE_SDIO). */ 294 struct sdio_func *host_sdio; 295 }; 296 297 /* See enum ssb_quirks */ 298 unsigned int quirks; 299 300 #ifdef CONFIG_SSB_SPROM 301 /* Mutex to protect the SPROM writing. */ 302 struct mutex sprom_mutex; 303 #endif 304 305 /* ID information about the Chip. */ 306 u16 chip_id; 307 u16 chip_rev; 308 u16 sprom_size; /* number of words in sprom */ 309 u8 chip_package; 310 311 /* List of devices (cores) on the backplane. */ 312 struct ssb_device devices[SSB_MAX_NR_CORES]; 313 u8 nr_devices; 314 315 /* Software ID number for this bus. */ 316 unsigned int busnumber; 317 318 /* The ChipCommon device (if available). */ 319 struct ssb_chipcommon chipco; 320 /* The PCI-core device (if available). */ 321 struct ssb_pcicore pcicore; 322 /* The MIPS-core device (if available). */ 323 struct ssb_mipscore mipscore; 324 /* The EXTif-core device (if available). */ 325 struct ssb_extif extif; 326 327 /* The following structure elements are not available in early 328 * SSB initialization. Though, they are available for regular 329 * registered drivers at any stage. So be careful when 330 * using them in the ssb core code. */ 331 332 /* ID information about the PCB. */ 333 struct ssb_boardinfo boardinfo; 334 /* Contents of the SPROM. */ 335 struct ssb_sprom sprom; 336 /* If the board has a cardbus slot, this is set to true. */ 337 bool has_cardbus_slot; 338 339 #ifdef CONFIG_SSB_EMBEDDED 340 /* Lock for GPIO register access. */ 341 spinlock_t gpio_lock; 342 #endif /* EMBEDDED */ 343 344 /* Internal-only stuff follows. Do not touch. */ 345 struct list_head list; 346 #ifdef CONFIG_SSB_DEBUG 347 /* Is the bus already powered up? */ 348 bool powered_up; 349 int power_warn_count; 350 #endif /* DEBUG */ 351 }; 352 353 enum ssb_quirks { 354 /* SDIO connected card requires performing a read after writing a 32-bit value */ 355 SSB_QUIRK_SDIO_READ_AFTER_WRITE32 = (1 << 0), 356 }; 357 358 /* The initialization-invariants. */ 359 struct ssb_init_invariants { 360 /* Versioning information about the PCB. */ 361 struct ssb_boardinfo boardinfo; 362 /* The SPROM information. That's either stored in an 363 * EEPROM or NVRAM on the board. */ 364 struct ssb_sprom sprom; 365 /* If the board has a cardbus slot, this is set to true. */ 366 bool has_cardbus_slot; 367 }; 368 /* Type of function to fetch the invariants. */ 369 typedef int (*ssb_invariants_func_t)(struct ssb_bus *bus, 370 struct ssb_init_invariants *iv); 371 372 /* Register a SSB system bus. get_invariants() is called after the 373 * basic system devices are initialized. 374 * The invariants are usually fetched from some NVRAM. 375 * Put the invariants into the struct pointed to by iv. */ 376 extern int ssb_bus_ssbbus_register(struct ssb_bus *bus, 377 unsigned long baseaddr, 378 ssb_invariants_func_t get_invariants); 379 #ifdef CONFIG_SSB_PCIHOST 380 extern int ssb_bus_pcibus_register(struct ssb_bus *bus, 381 struct pci_dev *host_pci); 382 #endif /* CONFIG_SSB_PCIHOST */ 383 #ifdef CONFIG_SSB_PCMCIAHOST 384 extern int ssb_bus_pcmciabus_register(struct ssb_bus *bus, 385 struct pcmcia_device *pcmcia_dev, 386 unsigned long baseaddr); 387 #endif /* CONFIG_SSB_PCMCIAHOST */ 388 #ifdef CONFIG_SSB_SDIOHOST 389 extern int ssb_bus_sdiobus_register(struct ssb_bus *bus, 390 struct sdio_func *sdio_func, 391 unsigned int quirks); 392 #endif /* CONFIG_SSB_SDIOHOST */ 393 394 395 extern void ssb_bus_unregister(struct ssb_bus *bus); 396 397 /* Set a fallback SPROM. 398 * See kdoc at the function definition for complete documentation. */ 399 extern int ssb_arch_set_fallback_sprom(const struct ssb_sprom *sprom); 400 401 /* Suspend a SSB bus. 402 * Call this from the parent bus suspend routine. */ 403 extern int ssb_bus_suspend(struct ssb_bus *bus); 404 /* Resume a SSB bus. 405 * Call this from the parent bus resume routine. */ 406 extern int ssb_bus_resume(struct ssb_bus *bus); 407 408 extern u32 ssb_clockspeed(struct ssb_bus *bus); 409 410 /* Is the device enabled in hardware? */ 411 int ssb_device_is_enabled(struct ssb_device *dev); 412 /* Enable a device and pass device-specific SSB_TMSLOW flags. 413 * If no device-specific flags are available, use 0. */ 414 void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags); 415 /* Disable a device in hardware and pass SSB_TMSLOW flags (if any). */ 416 void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags); 417 418 419 /* Device MMIO register read/write functions. */ 420 static inline u8 ssb_read8(struct ssb_device *dev, u16 offset) 421 { 422 return dev->ops->read8(dev, offset); 423 } 424 static inline u16 ssb_read16(struct ssb_device *dev, u16 offset) 425 { 426 return dev->ops->read16(dev, offset); 427 } 428 static inline u32 ssb_read32(struct ssb_device *dev, u16 offset) 429 { 430 return dev->ops->read32(dev, offset); 431 } 432 static inline void ssb_write8(struct ssb_device *dev, u16 offset, u8 value) 433 { 434 dev->ops->write8(dev, offset, value); 435 } 436 static inline void ssb_write16(struct ssb_device *dev, u16 offset, u16 value) 437 { 438 dev->ops->write16(dev, offset, value); 439 } 440 static inline void ssb_write32(struct ssb_device *dev, u16 offset, u32 value) 441 { 442 dev->ops->write32(dev, offset, value); 443 } 444 #ifdef CONFIG_SSB_BLOCKIO 445 static inline void ssb_block_read(struct ssb_device *dev, void *buffer, 446 size_t count, u16 offset, u8 reg_width) 447 { 448 dev->ops->block_read(dev, buffer, count, offset, reg_width); 449 } 450 451 static inline void ssb_block_write(struct ssb_device *dev, const void *buffer, 452 size_t count, u16 offset, u8 reg_width) 453 { 454 dev->ops->block_write(dev, buffer, count, offset, reg_width); 455 } 456 #endif /* CONFIG_SSB_BLOCKIO */ 457 458 459 /* The SSB DMA API. Use this API for any DMA operation on the device. 460 * This API basically is a wrapper that calls the correct DMA API for 461 * the host device type the SSB device is attached to. */ 462 463 /* Translation (routing) bits that need to be ORed to DMA 464 * addresses before they are given to a device. */ 465 extern u32 ssb_dma_translation(struct ssb_device *dev); 466 #define SSB_DMA_TRANSLATION_MASK 0xC0000000 467 #define SSB_DMA_TRANSLATION_SHIFT 30 468 469 extern int ssb_dma_set_mask(struct ssb_device *dev, u64 mask); 470 471 extern void * ssb_dma_alloc_consistent(struct ssb_device *dev, size_t size, 472 dma_addr_t *dma_handle, gfp_t gfp_flags); 473 extern void ssb_dma_free_consistent(struct ssb_device *dev, size_t size, 474 void *vaddr, dma_addr_t dma_handle, 475 gfp_t gfp_flags); 476 477 static inline void __cold __ssb_dma_not_implemented(struct ssb_device *dev) 478 { 479 #ifdef CONFIG_SSB_DEBUG 480 printk(KERN_ERR "SSB: BUG! Calling DMA API for " 481 "unsupported bustype %d\n", dev->bus->bustype); 482 #endif /* DEBUG */ 483 } 484 485 static inline int ssb_dma_mapping_error(struct ssb_device *dev, dma_addr_t addr) 486 { 487 switch (dev->bus->bustype) { 488 case SSB_BUSTYPE_PCI: 489 #ifdef CONFIG_SSB_PCIHOST 490 return pci_dma_mapping_error(dev->bus->host_pci, addr); 491 #endif 492 break; 493 case SSB_BUSTYPE_SSB: 494 return dma_mapping_error(dev->dev, addr); 495 default: 496 break; 497 } 498 __ssb_dma_not_implemented(dev); 499 return -ENOSYS; 500 } 501 502 static inline dma_addr_t ssb_dma_map_single(struct ssb_device *dev, void *p, 503 size_t size, enum dma_data_direction dir) 504 { 505 switch (dev->bus->bustype) { 506 case SSB_BUSTYPE_PCI: 507 #ifdef CONFIG_SSB_PCIHOST 508 return pci_map_single(dev->bus->host_pci, p, size, dir); 509 #endif 510 break; 511 case SSB_BUSTYPE_SSB: 512 return dma_map_single(dev->dev, p, size, dir); 513 default: 514 break; 515 } 516 __ssb_dma_not_implemented(dev); 517 return 0; 518 } 519 520 static inline void ssb_dma_unmap_single(struct ssb_device *dev, dma_addr_t dma_addr, 521 size_t size, enum dma_data_direction dir) 522 { 523 switch (dev->bus->bustype) { 524 case SSB_BUSTYPE_PCI: 525 #ifdef CONFIG_SSB_PCIHOST 526 pci_unmap_single(dev->bus->host_pci, dma_addr, size, dir); 527 return; 528 #endif 529 break; 530 case SSB_BUSTYPE_SSB: 531 dma_unmap_single(dev->dev, dma_addr, size, dir); 532 return; 533 default: 534 break; 535 } 536 __ssb_dma_not_implemented(dev); 537 } 538 539 static inline void ssb_dma_sync_single_for_cpu(struct ssb_device *dev, 540 dma_addr_t dma_addr, 541 size_t size, 542 enum dma_data_direction dir) 543 { 544 switch (dev->bus->bustype) { 545 case SSB_BUSTYPE_PCI: 546 #ifdef CONFIG_SSB_PCIHOST 547 pci_dma_sync_single_for_cpu(dev->bus->host_pci, dma_addr, 548 size, dir); 549 return; 550 #endif 551 break; 552 case SSB_BUSTYPE_SSB: 553 dma_sync_single_for_cpu(dev->dev, dma_addr, size, dir); 554 return; 555 default: 556 break; 557 } 558 __ssb_dma_not_implemented(dev); 559 } 560 561 static inline void ssb_dma_sync_single_for_device(struct ssb_device *dev, 562 dma_addr_t dma_addr, 563 size_t size, 564 enum dma_data_direction dir) 565 { 566 switch (dev->bus->bustype) { 567 case SSB_BUSTYPE_PCI: 568 #ifdef CONFIG_SSB_PCIHOST 569 pci_dma_sync_single_for_device(dev->bus->host_pci, dma_addr, 570 size, dir); 571 return; 572 #endif 573 break; 574 case SSB_BUSTYPE_SSB: 575 dma_sync_single_for_device(dev->dev, dma_addr, size, dir); 576 return; 577 default: 578 break; 579 } 580 __ssb_dma_not_implemented(dev); 581 } 582 583 static inline void ssb_dma_sync_single_range_for_cpu(struct ssb_device *dev, 584 dma_addr_t dma_addr, 585 unsigned long offset, 586 size_t size, 587 enum dma_data_direction dir) 588 { 589 switch (dev->bus->bustype) { 590 case SSB_BUSTYPE_PCI: 591 #ifdef CONFIG_SSB_PCIHOST 592 /* Just sync everything. That's all the PCI API can do. */ 593 pci_dma_sync_single_for_cpu(dev->bus->host_pci, dma_addr, 594 offset + size, dir); 595 return; 596 #endif 597 break; 598 case SSB_BUSTYPE_SSB: 599 dma_sync_single_range_for_cpu(dev->dev, dma_addr, offset, 600 size, dir); 601 return; 602 default: 603 break; 604 } 605 __ssb_dma_not_implemented(dev); 606 } 607 608 static inline void ssb_dma_sync_single_range_for_device(struct ssb_device *dev, 609 dma_addr_t dma_addr, 610 unsigned long offset, 611 size_t size, 612 enum dma_data_direction dir) 613 { 614 switch (dev->bus->bustype) { 615 case SSB_BUSTYPE_PCI: 616 #ifdef CONFIG_SSB_PCIHOST 617 /* Just sync everything. That's all the PCI API can do. */ 618 pci_dma_sync_single_for_device(dev->bus->host_pci, dma_addr, 619 offset + size, dir); 620 return; 621 #endif 622 break; 623 case SSB_BUSTYPE_SSB: 624 dma_sync_single_range_for_device(dev->dev, dma_addr, offset, 625 size, dir); 626 return; 627 default: 628 break; 629 } 630 __ssb_dma_not_implemented(dev); 631 } 632 633 634 #ifdef CONFIG_SSB_PCIHOST 635 /* PCI-host wrapper driver */ 636 extern int ssb_pcihost_register(struct pci_driver *driver); 637 static inline void ssb_pcihost_unregister(struct pci_driver *driver) 638 { 639 pci_unregister_driver(driver); 640 } 641 642 static inline 643 void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state) 644 { 645 if (sdev->bus->bustype == SSB_BUSTYPE_PCI) 646 pci_set_power_state(sdev->bus->host_pci, state); 647 } 648 #else 649 static inline void ssb_pcihost_unregister(struct pci_driver *driver) 650 { 651 } 652 653 static inline 654 void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state) 655 { 656 } 657 #endif /* CONFIG_SSB_PCIHOST */ 658 659 660 /* If a driver is shutdown or suspended, call this to signal 661 * that the bus may be completely powered down. SSB will decide, 662 * if it's really time to power down the bus, based on if there 663 * are other devices that want to run. */ 664 extern int ssb_bus_may_powerdown(struct ssb_bus *bus); 665 /* Before initializing and enabling a device, call this to power-up the bus. 666 * If you want to allow use of dynamic-power-control, pass the flag. 667 * Otherwise static always-on powercontrol will be used. */ 668 extern int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl); 669 670 671 /* Various helper functions */ 672 extern u32 ssb_admatch_base(u32 adm); 673 extern u32 ssb_admatch_size(u32 adm); 674 675 /* PCI device mapping and fixup routines. 676 * Called from the architecture pcibios init code. 677 * These are only available on SSB_EMBEDDED configurations. */ 678 #ifdef CONFIG_SSB_EMBEDDED 679 int ssb_pcibios_plat_dev_init(struct pci_dev *dev); 680 int ssb_pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin); 681 #endif /* CONFIG_SSB_EMBEDDED */ 682 683 #endif /* LINUX_SSB_H_ */ 684