1 #ifndef LINUX_SSB_H_ 2 #define LINUX_SSB_H_ 3 4 #include <linux/device.h> 5 #include <linux/list.h> 6 #include <linux/types.h> 7 #include <linux/spinlock.h> 8 #include <linux/pci.h> 9 #include <linux/mod_devicetable.h> 10 #include <linux/dma-mapping.h> 11 12 #include <linux/ssb/ssb_regs.h> 13 14 15 struct pcmcia_device; 16 struct ssb_bus; 17 struct ssb_driver; 18 19 struct ssb_sprom { 20 u8 revision; 21 u8 il0mac[6]; /* MAC address for 802.11b/g */ 22 u8 et0mac[6]; /* MAC address for Ethernet */ 23 u8 et1mac[6]; /* MAC address for 802.11a */ 24 u8 et0phyaddr; /* MII address for enet0 */ 25 u8 et1phyaddr; /* MII address for enet1 */ 26 u8 et0mdcport; /* MDIO for enet0 */ 27 u8 et1mdcport; /* MDIO for enet1 */ 28 u8 board_rev; /* Board revision number from SPROM. */ 29 u8 country_code; /* Country Code */ 30 u8 ant_available_a; /* 2GHz antenna available bits (up to 4) */ 31 u8 ant_available_bg; /* 5GHz antenna available bits (up to 4) */ 32 u16 pa0b0; 33 u16 pa0b1; 34 u16 pa0b2; 35 u16 pa1b0; 36 u16 pa1b1; 37 u16 pa1b2; 38 u16 pa1lob0; 39 u16 pa1lob1; 40 u16 pa1lob2; 41 u16 pa1hib0; 42 u16 pa1hib1; 43 u16 pa1hib2; 44 u8 gpio0; /* GPIO pin 0 */ 45 u8 gpio1; /* GPIO pin 1 */ 46 u8 gpio2; /* GPIO pin 2 */ 47 u8 gpio3; /* GPIO pin 3 */ 48 u16 maxpwr_bg; /* 2.4GHz Amplifier Max Power (in dBm Q5.2) */ 49 u16 maxpwr_al; /* 5.2GHz Amplifier Max Power (in dBm Q5.2) */ 50 u16 maxpwr_a; /* 5.3GHz Amplifier Max Power (in dBm Q5.2) */ 51 u16 maxpwr_ah; /* 5.8GHz Amplifier Max Power (in dBm Q5.2) */ 52 u8 itssi_a; /* Idle TSSI Target for A-PHY */ 53 u8 itssi_bg; /* Idle TSSI Target for B/G-PHY */ 54 u8 tri2g; /* 2.4GHz TX isolation */ 55 u8 tri5gl; /* 5.2GHz TX isolation */ 56 u8 tri5g; /* 5.3GHz TX isolation */ 57 u8 tri5gh; /* 5.8GHz TX isolation */ 58 u8 txpid2g[4]; /* 2GHz TX power index */ 59 u8 txpid5gl[4]; /* 4.9 - 5.1GHz TX power index */ 60 u8 txpid5g[4]; /* 5.1 - 5.5GHz TX power index */ 61 u8 txpid5gh[4]; /* 5.5 - ...GHz TX power index */ 62 u8 rxpo2g; /* 2GHz RX power offset */ 63 u8 rxpo5g; /* 5GHz RX power offset */ 64 u8 rssisav2g; /* 2GHz RSSI params */ 65 u8 rssismc2g; 66 u8 rssismf2g; 67 u8 bxa2g; /* 2GHz BX arch */ 68 u8 rssisav5g; /* 5GHz RSSI params */ 69 u8 rssismc5g; 70 u8 rssismf5g; 71 u8 bxa5g; /* 5GHz BX arch */ 72 u16 cck2gpo; /* CCK power offset */ 73 u32 ofdm2gpo; /* 2.4GHz OFDM power offset */ 74 u32 ofdm5glpo; /* 5.2GHz OFDM power offset */ 75 u32 ofdm5gpo; /* 5.3GHz OFDM power offset */ 76 u32 ofdm5ghpo; /* 5.8GHz OFDM power offset */ 77 u16 boardflags_lo; /* Board flags (bits 0-15) */ 78 u16 boardflags_hi; /* Board flags (bits 16-31) */ 79 u16 boardflags2_lo; /* Board flags (bits 32-47) */ 80 u16 boardflags2_hi; /* Board flags (bits 48-63) */ 81 /* TODO store board flags in a single u64 */ 82 83 /* Antenna gain values for up to 4 antennas 84 * on each band. Values in dBm/4 (Q5.2). Negative gain means the 85 * loss in the connectors is bigger than the gain. */ 86 struct { 87 struct { 88 s8 a0, a1, a2, a3; 89 } ghz24; /* 2.4GHz band */ 90 struct { 91 s8 a0, a1, a2, a3; 92 } ghz5; /* 5GHz band */ 93 } antenna_gain; 94 95 /* TODO - add any parameters needed from rev 2, 3, 4, 5 or 8 SPROMs */ 96 }; 97 98 /* Information about the PCB the circuitry is soldered on. */ 99 struct ssb_boardinfo { 100 u16 vendor; 101 u16 type; 102 u16 rev; 103 }; 104 105 106 struct ssb_device; 107 /* Lowlevel read/write operations on the device MMIO. 108 * Internal, don't use that outside of ssb. */ 109 struct ssb_bus_ops { 110 u8 (*read8)(struct ssb_device *dev, u16 offset); 111 u16 (*read16)(struct ssb_device *dev, u16 offset); 112 u32 (*read32)(struct ssb_device *dev, u16 offset); 113 void (*write8)(struct ssb_device *dev, u16 offset, u8 value); 114 void (*write16)(struct ssb_device *dev, u16 offset, u16 value); 115 void (*write32)(struct ssb_device *dev, u16 offset, u32 value); 116 #ifdef CONFIG_SSB_BLOCKIO 117 void (*block_read)(struct ssb_device *dev, void *buffer, 118 size_t count, u16 offset, u8 reg_width); 119 void (*block_write)(struct ssb_device *dev, const void *buffer, 120 size_t count, u16 offset, u8 reg_width); 121 #endif 122 }; 123 124 125 /* Core-ID values. */ 126 #define SSB_DEV_CHIPCOMMON 0x800 127 #define SSB_DEV_ILINE20 0x801 128 #define SSB_DEV_SDRAM 0x803 129 #define SSB_DEV_PCI 0x804 130 #define SSB_DEV_MIPS 0x805 131 #define SSB_DEV_ETHERNET 0x806 132 #define SSB_DEV_V90 0x807 133 #define SSB_DEV_USB11_HOSTDEV 0x808 134 #define SSB_DEV_ADSL 0x809 135 #define SSB_DEV_ILINE100 0x80A 136 #define SSB_DEV_IPSEC 0x80B 137 #define SSB_DEV_PCMCIA 0x80D 138 #define SSB_DEV_INTERNAL_MEM 0x80E 139 #define SSB_DEV_MEMC_SDRAM 0x80F 140 #define SSB_DEV_EXTIF 0x811 141 #define SSB_DEV_80211 0x812 142 #define SSB_DEV_MIPS_3302 0x816 143 #define SSB_DEV_USB11_HOST 0x817 144 #define SSB_DEV_USB11_DEV 0x818 145 #define SSB_DEV_USB20_HOST 0x819 146 #define SSB_DEV_USB20_DEV 0x81A 147 #define SSB_DEV_SDIO_HOST 0x81B 148 #define SSB_DEV_ROBOSWITCH 0x81C 149 #define SSB_DEV_PARA_ATA 0x81D 150 #define SSB_DEV_SATA_XORDMA 0x81E 151 #define SSB_DEV_ETHERNET_GBIT 0x81F 152 #define SSB_DEV_PCIE 0x820 153 #define SSB_DEV_MIMO_PHY 0x821 154 #define SSB_DEV_SRAM_CTRLR 0x822 155 #define SSB_DEV_MINI_MACPHY 0x823 156 #define SSB_DEV_ARM_1176 0x824 157 #define SSB_DEV_ARM_7TDMI 0x825 158 159 /* Vendor-ID values */ 160 #define SSB_VENDOR_BROADCOM 0x4243 161 162 /* Some kernel subsystems poke with dev->drvdata, so we must use the 163 * following ugly workaround to get from struct device to struct ssb_device */ 164 struct __ssb_dev_wrapper { 165 struct device dev; 166 struct ssb_device *sdev; 167 }; 168 169 struct ssb_device { 170 /* Having a copy of the ops pointer in each dev struct 171 * is an optimization. */ 172 const struct ssb_bus_ops *ops; 173 174 struct device *dev, *dma_dev; 175 176 struct ssb_bus *bus; 177 struct ssb_device_id id; 178 179 u8 core_index; 180 unsigned int irq; 181 182 /* Internal-only stuff follows. */ 183 void *drvdata; /* Per-device data */ 184 void *devtypedata; /* Per-devicetype (eg 802.11) data */ 185 }; 186 187 /* Go from struct device to struct ssb_device. */ 188 static inline 189 struct ssb_device * dev_to_ssb_dev(struct device *dev) 190 { 191 struct __ssb_dev_wrapper *wrap; 192 wrap = container_of(dev, struct __ssb_dev_wrapper, dev); 193 return wrap->sdev; 194 } 195 196 /* Device specific user data */ 197 static inline 198 void ssb_set_drvdata(struct ssb_device *dev, void *data) 199 { 200 dev->drvdata = data; 201 } 202 static inline 203 void * ssb_get_drvdata(struct ssb_device *dev) 204 { 205 return dev->drvdata; 206 } 207 208 /* Devicetype specific user data. This is per device-type (not per device) */ 209 void ssb_set_devtypedata(struct ssb_device *dev, void *data); 210 static inline 211 void * ssb_get_devtypedata(struct ssb_device *dev) 212 { 213 return dev->devtypedata; 214 } 215 216 217 struct ssb_driver { 218 const char *name; 219 const struct ssb_device_id *id_table; 220 221 int (*probe)(struct ssb_device *dev, const struct ssb_device_id *id); 222 void (*remove)(struct ssb_device *dev); 223 int (*suspend)(struct ssb_device *dev, pm_message_t state); 224 int (*resume)(struct ssb_device *dev); 225 void (*shutdown)(struct ssb_device *dev); 226 227 struct device_driver drv; 228 }; 229 #define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv) 230 231 extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner); 232 static inline int ssb_driver_register(struct ssb_driver *drv) 233 { 234 return __ssb_driver_register(drv, THIS_MODULE); 235 } 236 extern void ssb_driver_unregister(struct ssb_driver *drv); 237 238 239 240 241 enum ssb_bustype { 242 SSB_BUSTYPE_SSB, /* This SSB bus is the system bus */ 243 SSB_BUSTYPE_PCI, /* SSB is connected to PCI bus */ 244 SSB_BUSTYPE_PCMCIA, /* SSB is connected to PCMCIA bus */ 245 SSB_BUSTYPE_SDIO, /* SSB is connected to SDIO bus */ 246 }; 247 248 /* board_vendor */ 249 #define SSB_BOARDVENDOR_BCM 0x14E4 /* Broadcom */ 250 #define SSB_BOARDVENDOR_DELL 0x1028 /* Dell */ 251 #define SSB_BOARDVENDOR_HP 0x0E11 /* HP */ 252 /* board_type */ 253 #define SSB_BOARD_BCM94306MP 0x0418 254 #define SSB_BOARD_BCM4309G 0x0421 255 #define SSB_BOARD_BCM4306CB 0x0417 256 #define SSB_BOARD_BCM4309MP 0x040C 257 #define SSB_BOARD_MP4318 0x044A 258 #define SSB_BOARD_BU4306 0x0416 259 #define SSB_BOARD_BU4309 0x040A 260 /* chip_package */ 261 #define SSB_CHIPPACK_BCM4712S 1 /* Small 200pin 4712 */ 262 #define SSB_CHIPPACK_BCM4712M 2 /* Medium 225pin 4712 */ 263 #define SSB_CHIPPACK_BCM4712L 0 /* Large 340pin 4712 */ 264 265 #include <linux/ssb/ssb_driver_chipcommon.h> 266 #include <linux/ssb/ssb_driver_mips.h> 267 #include <linux/ssb/ssb_driver_extif.h> 268 #include <linux/ssb/ssb_driver_pci.h> 269 270 struct ssb_bus { 271 /* The MMIO area. */ 272 void __iomem *mmio; 273 274 const struct ssb_bus_ops *ops; 275 276 /* The core currently mapped into the MMIO window. 277 * Not valid on all host-buses. So don't use outside of SSB. */ 278 struct ssb_device *mapped_device; 279 union { 280 /* Currently mapped PCMCIA segment. (bustype == SSB_BUSTYPE_PCMCIA only) */ 281 u8 mapped_pcmcia_seg; 282 /* Current SSB base address window for SDIO. */ 283 u32 sdio_sbaddr; 284 }; 285 /* Lock for core and segment switching. 286 * On PCMCIA-host busses this is used to protect the whole MMIO access. */ 287 spinlock_t bar_lock; 288 289 /* The host-bus this backplane is running on. */ 290 enum ssb_bustype bustype; 291 /* Pointers to the host-bus. Check bustype before using any of these pointers. */ 292 union { 293 /* Pointer to the PCI bus (only valid if bustype == SSB_BUSTYPE_PCI). */ 294 struct pci_dev *host_pci; 295 /* Pointer to the PCMCIA device (only if bustype == SSB_BUSTYPE_PCMCIA). */ 296 struct pcmcia_device *host_pcmcia; 297 /* Pointer to the SDIO device (only if bustype == SSB_BUSTYPE_SDIO). */ 298 struct sdio_func *host_sdio; 299 }; 300 301 /* See enum ssb_quirks */ 302 unsigned int quirks; 303 304 #ifdef CONFIG_SSB_SPROM 305 /* Mutex to protect the SPROM writing. */ 306 struct mutex sprom_mutex; 307 #endif 308 309 /* ID information about the Chip. */ 310 u16 chip_id; 311 u16 chip_rev; 312 u16 sprom_offset; 313 u16 sprom_size; /* number of words in sprom */ 314 u8 chip_package; 315 316 /* List of devices (cores) on the backplane. */ 317 struct ssb_device devices[SSB_MAX_NR_CORES]; 318 u8 nr_devices; 319 320 /* Software ID number for this bus. */ 321 unsigned int busnumber; 322 323 /* The ChipCommon device (if available). */ 324 struct ssb_chipcommon chipco; 325 /* The PCI-core device (if available). */ 326 struct ssb_pcicore pcicore; 327 /* The MIPS-core device (if available). */ 328 struct ssb_mipscore mipscore; 329 /* The EXTif-core device (if available). */ 330 struct ssb_extif extif; 331 332 /* The following structure elements are not available in early 333 * SSB initialization. Though, they are available for regular 334 * registered drivers at any stage. So be careful when 335 * using them in the ssb core code. */ 336 337 /* ID information about the PCB. */ 338 struct ssb_boardinfo boardinfo; 339 /* Contents of the SPROM. */ 340 struct ssb_sprom sprom; 341 /* If the board has a cardbus slot, this is set to true. */ 342 bool has_cardbus_slot; 343 344 #ifdef CONFIG_SSB_EMBEDDED 345 /* Lock for GPIO register access. */ 346 spinlock_t gpio_lock; 347 #endif /* EMBEDDED */ 348 349 /* Internal-only stuff follows. Do not touch. */ 350 struct list_head list; 351 #ifdef CONFIG_SSB_DEBUG 352 /* Is the bus already powered up? */ 353 bool powered_up; 354 int power_warn_count; 355 #endif /* DEBUG */ 356 }; 357 358 enum ssb_quirks { 359 /* SDIO connected card requires performing a read after writing a 32-bit value */ 360 SSB_QUIRK_SDIO_READ_AFTER_WRITE32 = (1 << 0), 361 }; 362 363 /* The initialization-invariants. */ 364 struct ssb_init_invariants { 365 /* Versioning information about the PCB. */ 366 struct ssb_boardinfo boardinfo; 367 /* The SPROM information. That's either stored in an 368 * EEPROM or NVRAM on the board. */ 369 struct ssb_sprom sprom; 370 /* If the board has a cardbus slot, this is set to true. */ 371 bool has_cardbus_slot; 372 }; 373 /* Type of function to fetch the invariants. */ 374 typedef int (*ssb_invariants_func_t)(struct ssb_bus *bus, 375 struct ssb_init_invariants *iv); 376 377 /* Register a SSB system bus. get_invariants() is called after the 378 * basic system devices are initialized. 379 * The invariants are usually fetched from some NVRAM. 380 * Put the invariants into the struct pointed to by iv. */ 381 extern int ssb_bus_ssbbus_register(struct ssb_bus *bus, 382 unsigned long baseaddr, 383 ssb_invariants_func_t get_invariants); 384 #ifdef CONFIG_SSB_PCIHOST 385 extern int ssb_bus_pcibus_register(struct ssb_bus *bus, 386 struct pci_dev *host_pci); 387 #endif /* CONFIG_SSB_PCIHOST */ 388 #ifdef CONFIG_SSB_PCMCIAHOST 389 extern int ssb_bus_pcmciabus_register(struct ssb_bus *bus, 390 struct pcmcia_device *pcmcia_dev, 391 unsigned long baseaddr); 392 #endif /* CONFIG_SSB_PCMCIAHOST */ 393 #ifdef CONFIG_SSB_SDIOHOST 394 extern int ssb_bus_sdiobus_register(struct ssb_bus *bus, 395 struct sdio_func *sdio_func, 396 unsigned int quirks); 397 #endif /* CONFIG_SSB_SDIOHOST */ 398 399 400 extern void ssb_bus_unregister(struct ssb_bus *bus); 401 402 /* Does the device have an SPROM? */ 403 extern bool ssb_is_sprom_available(struct ssb_bus *bus); 404 405 /* Set a fallback SPROM. 406 * See kdoc at the function definition for complete documentation. */ 407 extern int ssb_arch_set_fallback_sprom(const struct ssb_sprom *sprom); 408 409 /* Suspend a SSB bus. 410 * Call this from the parent bus suspend routine. */ 411 extern int ssb_bus_suspend(struct ssb_bus *bus); 412 /* Resume a SSB bus. 413 * Call this from the parent bus resume routine. */ 414 extern int ssb_bus_resume(struct ssb_bus *bus); 415 416 extern u32 ssb_clockspeed(struct ssb_bus *bus); 417 418 /* Is the device enabled in hardware? */ 419 int ssb_device_is_enabled(struct ssb_device *dev); 420 /* Enable a device and pass device-specific SSB_TMSLOW flags. 421 * If no device-specific flags are available, use 0. */ 422 void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags); 423 /* Disable a device in hardware and pass SSB_TMSLOW flags (if any). */ 424 void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags); 425 426 427 /* Device MMIO register read/write functions. */ 428 static inline u8 ssb_read8(struct ssb_device *dev, u16 offset) 429 { 430 return dev->ops->read8(dev, offset); 431 } 432 static inline u16 ssb_read16(struct ssb_device *dev, u16 offset) 433 { 434 return dev->ops->read16(dev, offset); 435 } 436 static inline u32 ssb_read32(struct ssb_device *dev, u16 offset) 437 { 438 return dev->ops->read32(dev, offset); 439 } 440 static inline void ssb_write8(struct ssb_device *dev, u16 offset, u8 value) 441 { 442 dev->ops->write8(dev, offset, value); 443 } 444 static inline void ssb_write16(struct ssb_device *dev, u16 offset, u16 value) 445 { 446 dev->ops->write16(dev, offset, value); 447 } 448 static inline void ssb_write32(struct ssb_device *dev, u16 offset, u32 value) 449 { 450 dev->ops->write32(dev, offset, value); 451 } 452 #ifdef CONFIG_SSB_BLOCKIO 453 static inline void ssb_block_read(struct ssb_device *dev, void *buffer, 454 size_t count, u16 offset, u8 reg_width) 455 { 456 dev->ops->block_read(dev, buffer, count, offset, reg_width); 457 } 458 459 static inline void ssb_block_write(struct ssb_device *dev, const void *buffer, 460 size_t count, u16 offset, u8 reg_width) 461 { 462 dev->ops->block_write(dev, buffer, count, offset, reg_width); 463 } 464 #endif /* CONFIG_SSB_BLOCKIO */ 465 466 467 /* The SSB DMA API. Use this API for any DMA operation on the device. 468 * This API basically is a wrapper that calls the correct DMA API for 469 * the host device type the SSB device is attached to. */ 470 471 /* Translation (routing) bits that need to be ORed to DMA 472 * addresses before they are given to a device. */ 473 extern u32 ssb_dma_translation(struct ssb_device *dev); 474 #define SSB_DMA_TRANSLATION_MASK 0xC0000000 475 #define SSB_DMA_TRANSLATION_SHIFT 30 476 477 static inline void __cold __ssb_dma_not_implemented(struct ssb_device *dev) 478 { 479 #ifdef CONFIG_SSB_DEBUG 480 printk(KERN_ERR "SSB: BUG! Calling DMA API for " 481 "unsupported bustype %d\n", dev->bus->bustype); 482 #endif /* DEBUG */ 483 } 484 485 #ifdef CONFIG_SSB_PCIHOST 486 /* PCI-host wrapper driver */ 487 extern int ssb_pcihost_register(struct pci_driver *driver); 488 static inline void ssb_pcihost_unregister(struct pci_driver *driver) 489 { 490 pci_unregister_driver(driver); 491 } 492 493 static inline 494 void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state) 495 { 496 if (sdev->bus->bustype == SSB_BUSTYPE_PCI) 497 pci_set_power_state(sdev->bus->host_pci, state); 498 } 499 #else 500 static inline void ssb_pcihost_unregister(struct pci_driver *driver) 501 { 502 } 503 504 static inline 505 void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state) 506 { 507 } 508 #endif /* CONFIG_SSB_PCIHOST */ 509 510 511 /* If a driver is shutdown or suspended, call this to signal 512 * that the bus may be completely powered down. SSB will decide, 513 * if it's really time to power down the bus, based on if there 514 * are other devices that want to run. */ 515 extern int ssb_bus_may_powerdown(struct ssb_bus *bus); 516 /* Before initializing and enabling a device, call this to power-up the bus. 517 * If you want to allow use of dynamic-power-control, pass the flag. 518 * Otherwise static always-on powercontrol will be used. */ 519 extern int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl); 520 521 522 /* Various helper functions */ 523 extern u32 ssb_admatch_base(u32 adm); 524 extern u32 ssb_admatch_size(u32 adm); 525 526 /* PCI device mapping and fixup routines. 527 * Called from the architecture pcibios init code. 528 * These are only available on SSB_EMBEDDED configurations. */ 529 #ifdef CONFIG_SSB_EMBEDDED 530 int ssb_pcibios_plat_dev_init(struct pci_dev *dev); 531 int ssb_pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin); 532 #endif /* CONFIG_SSB_EMBEDDED */ 533 534 #endif /* LINUX_SSB_H_ */ 535