xref: /linux/include/linux/ssb/ssb.h (revision 367b8112fe2ea5c39a7bb4d263dcdd9b612fae18)
1 #ifndef LINUX_SSB_H_
2 #define LINUX_SSB_H_
3 
4 #include <linux/device.h>
5 #include <linux/list.h>
6 #include <linux/types.h>
7 #include <linux/spinlock.h>
8 #include <linux/pci.h>
9 #include <linux/mod_devicetable.h>
10 #include <linux/dma-mapping.h>
11 
12 #include <linux/ssb/ssb_regs.h>
13 
14 
15 struct pcmcia_device;
16 struct ssb_bus;
17 struct ssb_driver;
18 
19 struct ssb_sprom {
20 	u8 revision;
21 	u8 il0mac[6];		/* MAC address for 802.11b/g */
22 	u8 et0mac[6];		/* MAC address for Ethernet */
23 	u8 et1mac[6];		/* MAC address for 802.11a */
24 	u8 et0phyaddr;		/* MII address for enet0 */
25 	u8 et1phyaddr;		/* MII address for enet1 */
26 	u8 et0mdcport;		/* MDIO for enet0 */
27 	u8 et1mdcport;		/* MDIO for enet1 */
28 	u8 board_rev;		/* Board revision number from SPROM. */
29 	u8 country_code;	/* Country Code */
30 	u8 ant_available_a;	/* A-PHY antenna available bits (up to 4) */
31 	u8 ant_available_bg;	/* B/G-PHY antenna available bits (up to 4) */
32 	u16 pa0b0;
33 	u16 pa0b1;
34 	u16 pa0b2;
35 	u16 pa1b0;
36 	u16 pa1b1;
37 	u16 pa1b2;
38 	u8 gpio0;		/* GPIO pin 0 */
39 	u8 gpio1;		/* GPIO pin 1 */
40 	u8 gpio2;		/* GPIO pin 2 */
41 	u8 gpio3;		/* GPIO pin 3 */
42 	u16 maxpwr_a;		/* A-PHY Amplifier Max Power (in dBm Q5.2) */
43 	u16 maxpwr_bg;		/* B/G-PHY Amplifier Max Power (in dBm Q5.2) */
44 	u8 itssi_a;		/* Idle TSSI Target for A-PHY */
45 	u8 itssi_bg;		/* Idle TSSI Target for B/G-PHY */
46 	u16 boardflags_lo;	/* Boardflags (low 16 bits) */
47 	u16 boardflags_hi;	/* Boardflags (high 16 bits) */
48 
49 	/* Antenna gain values for up to 4 antennas
50 	 * on each band. Values in dBm/4 (Q5.2). Negative gain means the
51 	 * loss in the connectors is bigger than the gain. */
52 	struct {
53 		struct {
54 			s8 a0, a1, a2, a3;
55 		} ghz24;	/* 2.4GHz band */
56 		struct {
57 			s8 a0, a1, a2, a3;
58 		} ghz5;		/* 5GHz band */
59 	} antenna_gain;
60 
61 	/* TODO - add any parameters needed from rev 2, 3, or 4 SPROMs */
62 };
63 
64 /* Information about the PCB the circuitry is soldered on. */
65 struct ssb_boardinfo {
66 	u16 vendor;
67 	u16 type;
68 	u16 rev;
69 };
70 
71 
72 struct ssb_device;
73 /* Lowlevel read/write operations on the device MMIO.
74  * Internal, don't use that outside of ssb. */
75 struct ssb_bus_ops {
76 	u8 (*read8)(struct ssb_device *dev, u16 offset);
77 	u16 (*read16)(struct ssb_device *dev, u16 offset);
78 	u32 (*read32)(struct ssb_device *dev, u16 offset);
79 	void (*write8)(struct ssb_device *dev, u16 offset, u8 value);
80 	void (*write16)(struct ssb_device *dev, u16 offset, u16 value);
81 	void (*write32)(struct ssb_device *dev, u16 offset, u32 value);
82 #ifdef CONFIG_SSB_BLOCKIO
83 	void (*block_read)(struct ssb_device *dev, void *buffer,
84 			   size_t count, u16 offset, u8 reg_width);
85 	void (*block_write)(struct ssb_device *dev, const void *buffer,
86 			    size_t count, u16 offset, u8 reg_width);
87 #endif
88 };
89 
90 
91 /* Core-ID values. */
92 #define SSB_DEV_CHIPCOMMON	0x800
93 #define SSB_DEV_ILINE20		0x801
94 #define SSB_DEV_SDRAM		0x803
95 #define SSB_DEV_PCI		0x804
96 #define SSB_DEV_MIPS		0x805
97 #define SSB_DEV_ETHERNET	0x806
98 #define SSB_DEV_V90		0x807
99 #define SSB_DEV_USB11_HOSTDEV	0x808
100 #define SSB_DEV_ADSL		0x809
101 #define SSB_DEV_ILINE100	0x80A
102 #define SSB_DEV_IPSEC		0x80B
103 #define SSB_DEV_PCMCIA		0x80D
104 #define SSB_DEV_INTERNAL_MEM	0x80E
105 #define SSB_DEV_MEMC_SDRAM	0x80F
106 #define SSB_DEV_EXTIF		0x811
107 #define SSB_DEV_80211		0x812
108 #define SSB_DEV_MIPS_3302	0x816
109 #define SSB_DEV_USB11_HOST	0x817
110 #define SSB_DEV_USB11_DEV	0x818
111 #define SSB_DEV_USB20_HOST	0x819
112 #define SSB_DEV_USB20_DEV	0x81A
113 #define SSB_DEV_SDIO_HOST	0x81B
114 #define SSB_DEV_ROBOSWITCH	0x81C
115 #define SSB_DEV_PARA_ATA	0x81D
116 #define SSB_DEV_SATA_XORDMA	0x81E
117 #define SSB_DEV_ETHERNET_GBIT	0x81F
118 #define SSB_DEV_PCIE		0x820
119 #define SSB_DEV_MIMO_PHY	0x821
120 #define SSB_DEV_SRAM_CTRLR	0x822
121 #define SSB_DEV_MINI_MACPHY	0x823
122 #define SSB_DEV_ARM_1176	0x824
123 #define SSB_DEV_ARM_7TDMI	0x825
124 
125 /* Vendor-ID values */
126 #define SSB_VENDOR_BROADCOM	0x4243
127 
128 /* Some kernel subsystems poke with dev->drvdata, so we must use the
129  * following ugly workaround to get from struct device to struct ssb_device */
130 struct __ssb_dev_wrapper {
131 	struct device dev;
132 	struct ssb_device *sdev;
133 };
134 
135 struct ssb_device {
136 	/* Having a copy of the ops pointer in each dev struct
137 	 * is an optimization. */
138 	const struct ssb_bus_ops *ops;
139 
140 	struct device *dev;
141 
142 	struct ssb_bus *bus;
143 	struct ssb_device_id id;
144 
145 	u8 core_index;
146 	unsigned int irq;
147 
148 	/* Internal-only stuff follows. */
149 	void *drvdata;		/* Per-device data */
150 	void *devtypedata;	/* Per-devicetype (eg 802.11) data */
151 };
152 
153 /* Go from struct device to struct ssb_device. */
154 static inline
155 struct ssb_device * dev_to_ssb_dev(struct device *dev)
156 {
157 	struct __ssb_dev_wrapper *wrap;
158 	wrap = container_of(dev, struct __ssb_dev_wrapper, dev);
159 	return wrap->sdev;
160 }
161 
162 /* Device specific user data */
163 static inline
164 void ssb_set_drvdata(struct ssb_device *dev, void *data)
165 {
166 	dev->drvdata = data;
167 }
168 static inline
169 void * ssb_get_drvdata(struct ssb_device *dev)
170 {
171 	return dev->drvdata;
172 }
173 
174 /* Devicetype specific user data. This is per device-type (not per device) */
175 void ssb_set_devtypedata(struct ssb_device *dev, void *data);
176 static inline
177 void * ssb_get_devtypedata(struct ssb_device *dev)
178 {
179 	return dev->devtypedata;
180 }
181 
182 
183 struct ssb_driver {
184 	const char *name;
185 	const struct ssb_device_id *id_table;
186 
187 	int (*probe)(struct ssb_device *dev, const struct ssb_device_id *id);
188 	void (*remove)(struct ssb_device *dev);
189 	int (*suspend)(struct ssb_device *dev, pm_message_t state);
190 	int (*resume)(struct ssb_device *dev);
191 	void (*shutdown)(struct ssb_device *dev);
192 
193 	struct device_driver drv;
194 };
195 #define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv)
196 
197 extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner);
198 static inline int ssb_driver_register(struct ssb_driver *drv)
199 {
200 	return __ssb_driver_register(drv, THIS_MODULE);
201 }
202 extern void ssb_driver_unregister(struct ssb_driver *drv);
203 
204 
205 
206 
207 enum ssb_bustype {
208 	SSB_BUSTYPE_SSB,	/* This SSB bus is the system bus */
209 	SSB_BUSTYPE_PCI,	/* SSB is connected to PCI bus */
210 	SSB_BUSTYPE_PCMCIA,	/* SSB is connected to PCMCIA bus */
211 };
212 
213 /* board_vendor */
214 #define SSB_BOARDVENDOR_BCM	0x14E4	/* Broadcom */
215 #define SSB_BOARDVENDOR_DELL	0x1028	/* Dell */
216 #define SSB_BOARDVENDOR_HP	0x0E11	/* HP */
217 /* board_type */
218 #define SSB_BOARD_BCM94306MP	0x0418
219 #define SSB_BOARD_BCM4309G	0x0421
220 #define SSB_BOARD_BCM4306CB	0x0417
221 #define SSB_BOARD_BCM4309MP	0x040C
222 #define SSB_BOARD_MP4318	0x044A
223 #define SSB_BOARD_BU4306	0x0416
224 #define SSB_BOARD_BU4309	0x040A
225 /* chip_package */
226 #define SSB_CHIPPACK_BCM4712S	1	/* Small 200pin 4712 */
227 #define SSB_CHIPPACK_BCM4712M	2	/* Medium 225pin 4712 */
228 #define SSB_CHIPPACK_BCM4712L	0	/* Large 340pin 4712 */
229 
230 #include <linux/ssb/ssb_driver_chipcommon.h>
231 #include <linux/ssb/ssb_driver_mips.h>
232 #include <linux/ssb/ssb_driver_extif.h>
233 #include <linux/ssb/ssb_driver_pci.h>
234 
235 struct ssb_bus {
236 	/* The MMIO area. */
237 	void __iomem *mmio;
238 
239 	const struct ssb_bus_ops *ops;
240 
241 	/* The core in the basic address register window. (PCI bus only) */
242 	struct ssb_device *mapped_device;
243 	/* Currently mapped PCMCIA segment. (bustype == SSB_BUSTYPE_PCMCIA only) */
244 	u8 mapped_pcmcia_seg;
245 	/* Lock for core and segment switching.
246 	 * On PCMCIA-host busses this is used to protect the whole MMIO access. */
247 	spinlock_t bar_lock;
248 
249 	/* The bus this backplane is running on. */
250 	enum ssb_bustype bustype;
251 	/* Pointer to the PCI bus (only valid if bustype == SSB_BUSTYPE_PCI). */
252 	struct pci_dev *host_pci;
253 	/* Pointer to the PCMCIA device (only if bustype == SSB_BUSTYPE_PCMCIA). */
254 	struct pcmcia_device *host_pcmcia;
255 
256 #ifdef CONFIG_SSB_SPROM
257 	/* Mutex to protect the SPROM writing. */
258 	struct mutex sprom_mutex;
259 #endif
260 
261 	/* ID information about the Chip. */
262 	u16 chip_id;
263 	u16 chip_rev;
264 	u16 sprom_size;		/* number of words in sprom */
265 	u8 chip_package;
266 
267 	/* List of devices (cores) on the backplane. */
268 	struct ssb_device devices[SSB_MAX_NR_CORES];
269 	u8 nr_devices;
270 
271 	/* Software ID number for this bus. */
272 	unsigned int busnumber;
273 
274 	/* The ChipCommon device (if available). */
275 	struct ssb_chipcommon chipco;
276 	/* The PCI-core device (if available). */
277 	struct ssb_pcicore pcicore;
278 	/* The MIPS-core device (if available). */
279 	struct ssb_mipscore mipscore;
280 	/* The EXTif-core device (if available). */
281 	struct ssb_extif extif;
282 
283 	/* The following structure elements are not available in early
284 	 * SSB initialization. Though, they are available for regular
285 	 * registered drivers at any stage. So be careful when
286 	 * using them in the ssb core code. */
287 
288 	/* ID information about the PCB. */
289 	struct ssb_boardinfo boardinfo;
290 	/* Contents of the SPROM. */
291 	struct ssb_sprom sprom;
292 	/* If the board has a cardbus slot, this is set to true. */
293 	bool has_cardbus_slot;
294 
295 #ifdef CONFIG_SSB_EMBEDDED
296 	/* Lock for GPIO register access. */
297 	spinlock_t gpio_lock;
298 #endif /* EMBEDDED */
299 
300 	/* Internal-only stuff follows. Do not touch. */
301 	struct list_head list;
302 #ifdef CONFIG_SSB_DEBUG
303 	/* Is the bus already powered up? */
304 	bool powered_up;
305 	int power_warn_count;
306 #endif /* DEBUG */
307 };
308 
309 /* The initialization-invariants. */
310 struct ssb_init_invariants {
311 	/* Versioning information about the PCB. */
312 	struct ssb_boardinfo boardinfo;
313 	/* The SPROM information. That's either stored in an
314 	 * EEPROM or NVRAM on the board. */
315 	struct ssb_sprom sprom;
316 	/* If the board has a cardbus slot, this is set to true. */
317 	bool has_cardbus_slot;
318 };
319 /* Type of function to fetch the invariants. */
320 typedef int (*ssb_invariants_func_t)(struct ssb_bus *bus,
321 				     struct ssb_init_invariants *iv);
322 
323 /* Register a SSB system bus. get_invariants() is called after the
324  * basic system devices are initialized.
325  * The invariants are usually fetched from some NVRAM.
326  * Put the invariants into the struct pointed to by iv. */
327 extern int ssb_bus_ssbbus_register(struct ssb_bus *bus,
328 				   unsigned long baseaddr,
329 				   ssb_invariants_func_t get_invariants);
330 #ifdef CONFIG_SSB_PCIHOST
331 extern int ssb_bus_pcibus_register(struct ssb_bus *bus,
332 				   struct pci_dev *host_pci);
333 #endif /* CONFIG_SSB_PCIHOST */
334 #ifdef CONFIG_SSB_PCMCIAHOST
335 extern int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
336 				      struct pcmcia_device *pcmcia_dev,
337 				      unsigned long baseaddr);
338 #endif /* CONFIG_SSB_PCMCIAHOST */
339 
340 extern void ssb_bus_unregister(struct ssb_bus *bus);
341 
342 /* Suspend a SSB bus.
343  * Call this from the parent bus suspend routine. */
344 extern int ssb_bus_suspend(struct ssb_bus *bus);
345 /* Resume a SSB bus.
346  * Call this from the parent bus resume routine. */
347 extern int ssb_bus_resume(struct ssb_bus *bus);
348 
349 extern u32 ssb_clockspeed(struct ssb_bus *bus);
350 
351 /* Is the device enabled in hardware? */
352 int ssb_device_is_enabled(struct ssb_device *dev);
353 /* Enable a device and pass device-specific SSB_TMSLOW flags.
354  * If no device-specific flags are available, use 0. */
355 void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags);
356 /* Disable a device in hardware and pass SSB_TMSLOW flags (if any). */
357 void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags);
358 
359 
360 /* Device MMIO register read/write functions. */
361 static inline u8 ssb_read8(struct ssb_device *dev, u16 offset)
362 {
363 	return dev->ops->read8(dev, offset);
364 }
365 static inline u16 ssb_read16(struct ssb_device *dev, u16 offset)
366 {
367 	return dev->ops->read16(dev, offset);
368 }
369 static inline u32 ssb_read32(struct ssb_device *dev, u16 offset)
370 {
371 	return dev->ops->read32(dev, offset);
372 }
373 static inline void ssb_write8(struct ssb_device *dev, u16 offset, u8 value)
374 {
375 	dev->ops->write8(dev, offset, value);
376 }
377 static inline void ssb_write16(struct ssb_device *dev, u16 offset, u16 value)
378 {
379 	dev->ops->write16(dev, offset, value);
380 }
381 static inline void ssb_write32(struct ssb_device *dev, u16 offset, u32 value)
382 {
383 	dev->ops->write32(dev, offset, value);
384 }
385 #ifdef CONFIG_SSB_BLOCKIO
386 static inline void ssb_block_read(struct ssb_device *dev, void *buffer,
387 				  size_t count, u16 offset, u8 reg_width)
388 {
389 	dev->ops->block_read(dev, buffer, count, offset, reg_width);
390 }
391 
392 static inline void ssb_block_write(struct ssb_device *dev, const void *buffer,
393 				   size_t count, u16 offset, u8 reg_width)
394 {
395 	dev->ops->block_write(dev, buffer, count, offset, reg_width);
396 }
397 #endif /* CONFIG_SSB_BLOCKIO */
398 
399 
400 /* The SSB DMA API. Use this API for any DMA operation on the device.
401  * This API basically is a wrapper that calls the correct DMA API for
402  * the host device type the SSB device is attached to. */
403 
404 /* Translation (routing) bits that need to be ORed to DMA
405  * addresses before they are given to a device. */
406 extern u32 ssb_dma_translation(struct ssb_device *dev);
407 #define SSB_DMA_TRANSLATION_MASK	0xC0000000
408 #define SSB_DMA_TRANSLATION_SHIFT	30
409 
410 extern int ssb_dma_set_mask(struct ssb_device *dev, u64 mask);
411 
412 extern void * ssb_dma_alloc_consistent(struct ssb_device *dev, size_t size,
413 				       dma_addr_t *dma_handle, gfp_t gfp_flags);
414 extern void ssb_dma_free_consistent(struct ssb_device *dev, size_t size,
415 				    void *vaddr, dma_addr_t dma_handle,
416 				    gfp_t gfp_flags);
417 
418 static inline void __cold __ssb_dma_not_implemented(struct ssb_device *dev)
419 {
420 #ifdef CONFIG_SSB_DEBUG
421 	printk(KERN_ERR "SSB: BUG! Calling DMA API for "
422 	       "unsupported bustype %d\n", dev->bus->bustype);
423 #endif /* DEBUG */
424 }
425 
426 static inline int ssb_dma_mapping_error(struct ssb_device *dev, dma_addr_t addr)
427 {
428 	switch (dev->bus->bustype) {
429 	case SSB_BUSTYPE_PCI:
430 		return pci_dma_mapping_error(dev->bus->host_pci, addr);
431 	case SSB_BUSTYPE_SSB:
432 		return dma_mapping_error(dev->dev, addr);
433 	default:
434 		__ssb_dma_not_implemented(dev);
435 	}
436 	return -ENOSYS;
437 }
438 
439 static inline dma_addr_t ssb_dma_map_single(struct ssb_device *dev, void *p,
440 					    size_t size, enum dma_data_direction dir)
441 {
442 	switch (dev->bus->bustype) {
443 	case SSB_BUSTYPE_PCI:
444 		return pci_map_single(dev->bus->host_pci, p, size, dir);
445 	case SSB_BUSTYPE_SSB:
446 		return dma_map_single(dev->dev, p, size, dir);
447 	default:
448 		__ssb_dma_not_implemented(dev);
449 	}
450 	return 0;
451 }
452 
453 static inline void ssb_dma_unmap_single(struct ssb_device *dev, dma_addr_t dma_addr,
454 					size_t size, enum dma_data_direction dir)
455 {
456 	switch (dev->bus->bustype) {
457 	case SSB_BUSTYPE_PCI:
458 		pci_unmap_single(dev->bus->host_pci, dma_addr, size, dir);
459 		return;
460 	case SSB_BUSTYPE_SSB:
461 		dma_unmap_single(dev->dev, dma_addr, size, dir);
462 		return;
463 	default:
464 		__ssb_dma_not_implemented(dev);
465 	}
466 }
467 
468 static inline void ssb_dma_sync_single_for_cpu(struct ssb_device *dev,
469 					       dma_addr_t dma_addr,
470 					       size_t size,
471 					       enum dma_data_direction dir)
472 {
473 	switch (dev->bus->bustype) {
474 	case SSB_BUSTYPE_PCI:
475 		pci_dma_sync_single_for_cpu(dev->bus->host_pci, dma_addr,
476 					    size, dir);
477 		return;
478 	case SSB_BUSTYPE_SSB:
479 		dma_sync_single_for_cpu(dev->dev, dma_addr, size, dir);
480 		return;
481 	default:
482 		__ssb_dma_not_implemented(dev);
483 	}
484 }
485 
486 static inline void ssb_dma_sync_single_for_device(struct ssb_device *dev,
487 						  dma_addr_t dma_addr,
488 						  size_t size,
489 						  enum dma_data_direction dir)
490 {
491 	switch (dev->bus->bustype) {
492 	case SSB_BUSTYPE_PCI:
493 		pci_dma_sync_single_for_device(dev->bus->host_pci, dma_addr,
494 					       size, dir);
495 		return;
496 	case SSB_BUSTYPE_SSB:
497 		dma_sync_single_for_device(dev->dev, dma_addr, size, dir);
498 		return;
499 	default:
500 		__ssb_dma_not_implemented(dev);
501 	}
502 }
503 
504 static inline void ssb_dma_sync_single_range_for_cpu(struct ssb_device *dev,
505 						     dma_addr_t dma_addr,
506 						     unsigned long offset,
507 						     size_t size,
508 						     enum dma_data_direction dir)
509 {
510 	switch (dev->bus->bustype) {
511 	case SSB_BUSTYPE_PCI:
512 		/* Just sync everything. That's all the PCI API can do. */
513 		pci_dma_sync_single_for_cpu(dev->bus->host_pci, dma_addr,
514 					    offset + size, dir);
515 		return;
516 	case SSB_BUSTYPE_SSB:
517 		dma_sync_single_range_for_cpu(dev->dev, dma_addr, offset,
518 					      size, dir);
519 		return;
520 	default:
521 		__ssb_dma_not_implemented(dev);
522 	}
523 }
524 
525 static inline void ssb_dma_sync_single_range_for_device(struct ssb_device *dev,
526 							dma_addr_t dma_addr,
527 							unsigned long offset,
528 							size_t size,
529 							enum dma_data_direction dir)
530 {
531 	switch (dev->bus->bustype) {
532 	case SSB_BUSTYPE_PCI:
533 		/* Just sync everything. That's all the PCI API can do. */
534 		pci_dma_sync_single_for_device(dev->bus->host_pci, dma_addr,
535 					       offset + size, dir);
536 		return;
537 	case SSB_BUSTYPE_SSB:
538 		dma_sync_single_range_for_device(dev->dev, dma_addr, offset,
539 						 size, dir);
540 		return;
541 	default:
542 		__ssb_dma_not_implemented(dev);
543 	}
544 }
545 
546 
547 #ifdef CONFIG_SSB_PCIHOST
548 /* PCI-host wrapper driver */
549 extern int ssb_pcihost_register(struct pci_driver *driver);
550 static inline void ssb_pcihost_unregister(struct pci_driver *driver)
551 {
552 	pci_unregister_driver(driver);
553 }
554 
555 static inline
556 void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state)
557 {
558 	if (sdev->bus->bustype == SSB_BUSTYPE_PCI)
559 		pci_set_power_state(sdev->bus->host_pci, state);
560 }
561 #else
562 static inline void ssb_pcihost_unregister(struct pci_driver *driver)
563 {
564 }
565 
566 static inline
567 void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state)
568 {
569 }
570 #endif /* CONFIG_SSB_PCIHOST */
571 
572 
573 /* If a driver is shutdown or suspended, call this to signal
574  * that the bus may be completely powered down. SSB will decide,
575  * if it's really time to power down the bus, based on if there
576  * are other devices that want to run. */
577 extern int ssb_bus_may_powerdown(struct ssb_bus *bus);
578 /* Before initializing and enabling a device, call this to power-up the bus.
579  * If you want to allow use of dynamic-power-control, pass the flag.
580  * Otherwise static always-on powercontrol will be used. */
581 extern int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl);
582 
583 
584 /* Various helper functions */
585 extern u32 ssb_admatch_base(u32 adm);
586 extern u32 ssb_admatch_size(u32 adm);
587 
588 /* PCI device mapping and fixup routines.
589  * Called from the architecture pcibios init code.
590  * These are only available on SSB_EMBEDDED configurations. */
591 #ifdef CONFIG_SSB_EMBEDDED
592 int ssb_pcibios_plat_dev_init(struct pci_dev *dev);
593 int ssb_pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
594 #endif /* CONFIG_SSB_EMBEDDED */
595 
596 #endif /* LINUX_SSB_H_ */
597