1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2018 Exceet Electronics GmbH 4 * Copyright (C) 2018 Bootlin 5 * 6 * Author: 7 * Peter Pan <peterpandong@micron.com> 8 * Boris Brezillon <boris.brezillon@bootlin.com> 9 */ 10 11 #ifndef __LINUX_SPI_MEM_H 12 #define __LINUX_SPI_MEM_H 13 14 #include <linux/spi/spi.h> 15 16 #define SPI_MEM_OP_CMD(__opcode, __buswidth) \ 17 { \ 18 .nbytes = 1, \ 19 .buswidth = __buswidth, \ 20 .opcode = __opcode, \ 21 } 22 23 #define SPI_MEM_DTR_OP_CMD(__opcode, __buswidth) \ 24 { \ 25 .nbytes = 1, \ 26 .opcode = __opcode, \ 27 .buswidth = __buswidth, \ 28 .dtr = true, \ 29 } 30 31 #define SPI_MEM_OP_ADDR(__nbytes, __val, __buswidth) \ 32 { \ 33 .nbytes = __nbytes, \ 34 .buswidth = __buswidth, \ 35 .val = __val, \ 36 } 37 38 #define SPI_MEM_DTR_OP_ADDR(__nbytes, __val, __buswidth) \ 39 { \ 40 .nbytes = __nbytes, \ 41 .val = __val, \ 42 .buswidth = __buswidth, \ 43 .dtr = true, \ 44 } 45 46 #define SPI_MEM_OP_NO_ADDR { } 47 48 #define SPI_MEM_OP_DUMMY(__nbytes, __buswidth) \ 49 { \ 50 .nbytes = __nbytes, \ 51 .buswidth = __buswidth, \ 52 } 53 54 #define SPI_MEM_DTR_OP_DUMMY(__nbytes, __buswidth) \ 55 { \ 56 .nbytes = __nbytes, \ 57 .buswidth = __buswidth, \ 58 .dtr = true, \ 59 } 60 61 #define SPI_MEM_OP_NO_DUMMY { } 62 63 #define SPI_MEM_OP_DATA_IN(__nbytes, __buf, __buswidth) \ 64 { \ 65 .buswidth = __buswidth, \ 66 .dir = SPI_MEM_DATA_IN, \ 67 .nbytes = __nbytes, \ 68 .buf.in = __buf, \ 69 } 70 71 #define SPI_MEM_DTR_OP_DATA_IN(__nbytes, __buf, __buswidth) \ 72 { \ 73 .dir = SPI_MEM_DATA_IN, \ 74 .nbytes = __nbytes, \ 75 .buf.in = __buf, \ 76 .buswidth = __buswidth, \ 77 .dtr = true, \ 78 } 79 80 #define SPI_MEM_OP_DATA_OUT(__nbytes, __buf, __buswidth) \ 81 { \ 82 .buswidth = __buswidth, \ 83 .dir = SPI_MEM_DATA_OUT, \ 84 .nbytes = __nbytes, \ 85 .buf.out = __buf, \ 86 } 87 88 #define SPI_MEM_DTR_OP_DATA_OUT(__nbytes, __buf, __buswidth) \ 89 { \ 90 .dir = SPI_MEM_DATA_OUT, \ 91 .nbytes = __nbytes, \ 92 .buf.out = __buf, \ 93 .buswidth = __buswidth, \ 94 .dtr = true, \ 95 } 96 97 #define SPI_MEM_OP_NO_DATA { } 98 99 /** 100 * enum spi_mem_data_dir - describes the direction of a SPI memory data 101 * transfer from the controller perspective 102 * @SPI_MEM_NO_DATA: no data transferred 103 * @SPI_MEM_DATA_IN: data coming from the SPI memory 104 * @SPI_MEM_DATA_OUT: data sent to the SPI memory 105 */ 106 enum spi_mem_data_dir { 107 SPI_MEM_NO_DATA, 108 SPI_MEM_DATA_IN, 109 SPI_MEM_DATA_OUT, 110 }; 111 112 #define SPI_MEM_OP_MAX_FREQ(__freq) \ 113 .max_freq = __freq 114 115 /** 116 * struct spi_mem_op - describes a SPI memory operation 117 * @cmd.nbytes: number of opcode bytes (only 1 or 2 are valid). The opcode is 118 * sent MSB-first. 119 * @cmd.buswidth: number of IO lines used to transmit the command 120 * @cmd.opcode: operation opcode 121 * @cmd.dtr: whether the command opcode should be sent in DTR mode or not 122 * @addr.nbytes: number of address bytes to send. Can be zero if the operation 123 * does not need to send an address 124 * @addr.buswidth: number of IO lines used to transmit the address cycles 125 * @addr.dtr: whether the address should be sent in DTR mode or not 126 * @addr.val: address value. This value is always sent MSB first on the bus. 127 * Note that only @addr.nbytes are taken into account in this 128 * address value, so users should make sure the value fits in the 129 * assigned number of bytes. 130 * @dummy.nbytes: number of dummy bytes to send after an opcode or address. Can 131 * be zero if the operation does not require dummy bytes 132 * @dummy.buswidth: number of IO lanes used to transmit the dummy bytes 133 * @dummy.dtr: whether the dummy bytes should be sent in DTR mode or not 134 * @data.buswidth: number of IO lanes used to send/receive the data 135 * @data.dtr: whether the data should be sent in DTR mode or not 136 * @data.ecc: whether error correction is required or not 137 * @data.swap16: whether the byte order of 16-bit words is swapped when read 138 * or written in Octal DTR mode compared to STR mode. 139 * @data.dir: direction of the transfer 140 * @data.nbytes: number of data bytes to send/receive. Can be zero if the 141 * operation does not involve transferring data 142 * @data.buf.in: input buffer (must be DMA-able) 143 * @data.buf.out: output buffer (must be DMA-able) 144 * @max_freq: frequency limitation wrt this operation. 0 means there is no 145 * specific constraint and the highest achievable frequency can be 146 * attempted. 147 */ 148 struct spi_mem_op { 149 struct { 150 u8 nbytes; 151 u8 buswidth; 152 u8 dtr : 1; 153 u8 __pad : 7; 154 u16 opcode; 155 } cmd; 156 157 struct { 158 u8 nbytes; 159 u8 buswidth; 160 u8 dtr : 1; 161 u8 __pad : 7; 162 u64 val; 163 } addr; 164 165 struct { 166 u8 nbytes; 167 u8 buswidth; 168 u8 dtr : 1; 169 u8 __pad : 7; 170 } dummy; 171 172 struct { 173 u8 buswidth; 174 u8 dtr : 1; 175 u8 ecc : 1; 176 u8 swap16 : 1; 177 u8 __pad : 5; 178 enum spi_mem_data_dir dir; 179 unsigned int nbytes; 180 union { 181 void *in; 182 const void *out; 183 } buf; 184 } data; 185 186 unsigned int max_freq; 187 }; 188 189 #define SPI_MEM_OP(__cmd, __addr, __dummy, __data, ...) \ 190 { \ 191 .cmd = __cmd, \ 192 .addr = __addr, \ 193 .dummy = __dummy, \ 194 .data = __data, \ 195 __VA_ARGS__ \ 196 } 197 198 /** 199 * struct spi_mem_dirmap_info - Direct mapping information 200 * @op_tmpl: operation template that should be used by the direct mapping when 201 * the memory device is accessed 202 * @offset: absolute offset this direct mapping is pointing to 203 * @length: length in byte of this direct mapping 204 * 205 * These information are used by the controller specific implementation to know 206 * the portion of memory that is directly mapped and the spi_mem_op that should 207 * be used to access the device. 208 * A direct mapping is only valid for one direction (read or write) and this 209 * direction is directly encoded in the ->op_tmpl.data.dir field. 210 */ 211 struct spi_mem_dirmap_info { 212 struct spi_mem_op op_tmpl; 213 u64 offset; 214 u64 length; 215 }; 216 217 /** 218 * struct spi_mem_dirmap_desc - Direct mapping descriptor 219 * @mem: the SPI memory device this direct mapping is attached to 220 * @info: information passed at direct mapping creation time 221 * @nodirmap: set to 1 if the SPI controller does not implement 222 * ->mem_ops->dirmap_create() or when this function returned an 223 * error. If @nodirmap is true, all spi_mem_dirmap_{read,write}() 224 * calls will use spi_mem_exec_op() to access the memory. This is a 225 * degraded mode that allows spi_mem drivers to use the same code 226 * no matter whether the controller supports direct mapping or not 227 * @priv: field pointing to controller specific data 228 * 229 * Common part of a direct mapping descriptor. This object is created by 230 * spi_mem_dirmap_create() and controller implementation of ->create_dirmap() 231 * can create/attach direct mapping resources to the descriptor in the ->priv 232 * field. 233 */ 234 struct spi_mem_dirmap_desc { 235 struct spi_mem *mem; 236 struct spi_mem_dirmap_info info; 237 unsigned int nodirmap; 238 void *priv; 239 }; 240 241 /** 242 * struct spi_mem - describes a SPI memory device 243 * @spi: the underlying SPI device 244 * @drvpriv: spi_mem_driver private data 245 * @name: name of the SPI memory device 246 * 247 * Extra information that describe the SPI memory device and may be needed by 248 * the controller to properly handle this device should be placed here. 249 * 250 * One example would be the device size since some controller expose their SPI 251 * mem devices through a io-mapped region. 252 */ 253 struct spi_mem { 254 struct spi_device *spi; 255 void *drvpriv; 256 const char *name; 257 }; 258 259 /** 260 * struct spi_mem_set_drvdata() - attach driver private data to a SPI mem 261 * device 262 * @mem: memory device 263 * @data: data to attach to the memory device 264 */ 265 static inline void spi_mem_set_drvdata(struct spi_mem *mem, void *data) 266 { 267 mem->drvpriv = data; 268 } 269 270 /** 271 * struct spi_mem_get_drvdata() - get driver private data attached to a SPI mem 272 * device 273 * @mem: memory device 274 * 275 * Return: the data attached to the mem device. 276 */ 277 static inline void *spi_mem_get_drvdata(struct spi_mem *mem) 278 { 279 return mem->drvpriv; 280 } 281 282 /** 283 * struct spi_controller_mem_ops - SPI memory operations 284 * @adjust_op_size: shrink the data xfer of an operation to match controller's 285 * limitations (can be alignment or max RX/TX size 286 * limitations) 287 * @supports_op: check if an operation is supported by the controller 288 * @exec_op: execute a SPI memory operation 289 * not all driver provides supports_op(), so it can return -EOPNOTSUPP 290 * if the op is not supported by the driver/controller 291 * @get_name: get a custom name for the SPI mem device from the controller. 292 * This might be needed if the controller driver has been ported 293 * to use the SPI mem layer and a custom name is used to keep 294 * mtdparts compatible. 295 * Note that if the implementation of this function allocates memory 296 * dynamically, then it should do so with devm_xxx(), as we don't 297 * have a ->free_name() function. 298 * @dirmap_create: create a direct mapping descriptor that can later be used to 299 * access the memory device. This method is optional 300 * @dirmap_destroy: destroy a memory descriptor previous created by 301 * ->dirmap_create() 302 * @dirmap_read: read data from the memory device using the direct mapping 303 * created by ->dirmap_create(). The function can return less 304 * data than requested (for example when the request is crossing 305 * the currently mapped area), and the caller of 306 * spi_mem_dirmap_read() is responsible for calling it again in 307 * this case. 308 * @dirmap_write: write data to the memory device using the direct mapping 309 * created by ->dirmap_create(). The function can return less 310 * data than requested (for example when the request is crossing 311 * the currently mapped area), and the caller of 312 * spi_mem_dirmap_write() is responsible for calling it again in 313 * this case. 314 * @poll_status: poll memory device status until (status & mask) == match or 315 * when the timeout has expired. It fills the data buffer with 316 * the last status value. 317 * 318 * This interface should be implemented by SPI controllers providing an 319 * high-level interface to execute SPI memory operation, which is usually the 320 * case for QSPI controllers. 321 * 322 * Note on ->dirmap_{read,write}(): drivers should avoid accessing the direct 323 * mapping from the CPU because doing that can stall the CPU waiting for the 324 * SPI mem transaction to finish, and this will make real-time maintainers 325 * unhappy and might make your system less reactive. Instead, drivers should 326 * use DMA to access this direct mapping. 327 */ 328 struct spi_controller_mem_ops { 329 int (*adjust_op_size)(struct spi_mem *mem, struct spi_mem_op *op); 330 bool (*supports_op)(struct spi_mem *mem, 331 const struct spi_mem_op *op); 332 int (*exec_op)(struct spi_mem *mem, 333 const struct spi_mem_op *op); 334 const char *(*get_name)(struct spi_mem *mem); 335 int (*dirmap_create)(struct spi_mem_dirmap_desc *desc); 336 void (*dirmap_destroy)(struct spi_mem_dirmap_desc *desc); 337 ssize_t (*dirmap_read)(struct spi_mem_dirmap_desc *desc, 338 u64 offs, size_t len, void *buf); 339 ssize_t (*dirmap_write)(struct spi_mem_dirmap_desc *desc, 340 u64 offs, size_t len, const void *buf); 341 int (*poll_status)(struct spi_mem *mem, 342 const struct spi_mem_op *op, 343 u16 mask, u16 match, 344 unsigned long initial_delay_us, 345 unsigned long polling_rate_us, 346 unsigned long timeout_ms); 347 }; 348 349 /** 350 * struct spi_controller_mem_caps - SPI memory controller capabilities 351 * @dtr: Supports DTR operations 352 * @ecc: Supports operations with error correction 353 * @swap16: Supports swapping bytes on a 16 bit boundary when configured in 354 * Octal DTR 355 * @per_op_freq: Supports per operation frequency switching 356 */ 357 struct spi_controller_mem_caps { 358 bool dtr; 359 bool ecc; 360 bool swap16; 361 bool per_op_freq; 362 }; 363 364 #define spi_mem_controller_is_capable(ctlr, cap) \ 365 ((ctlr)->mem_caps && (ctlr)->mem_caps->cap) 366 367 /** 368 * struct spi_mem_driver - SPI memory driver 369 * @spidrv: inherit from a SPI driver 370 * @probe: probe a SPI memory. Usually where detection/initialization takes 371 * place 372 * @remove: remove a SPI memory 373 * @shutdown: take appropriate action when the system is shutdown 374 * 375 * This is just a thin wrapper around a spi_driver. The core takes care of 376 * allocating the spi_mem object and forwarding the probe/remove/shutdown 377 * request to the spi_mem_driver. The reason we use this wrapper is because 378 * we might have to stuff more information into the spi_mem struct to let 379 * SPI controllers know more about the SPI memory they interact with, and 380 * having this intermediate layer allows us to do that without adding more 381 * useless fields to the spi_device object. 382 */ 383 struct spi_mem_driver { 384 struct spi_driver spidrv; 385 int (*probe)(struct spi_mem *mem); 386 int (*remove)(struct spi_mem *mem); 387 void (*shutdown)(struct spi_mem *mem); 388 }; 389 390 #if IS_ENABLED(CONFIG_SPI_MEM) 391 int spi_controller_dma_map_mem_op_data(struct spi_controller *ctlr, 392 const struct spi_mem_op *op, 393 struct sg_table *sg); 394 395 void spi_controller_dma_unmap_mem_op_data(struct spi_controller *ctlr, 396 const struct spi_mem_op *op, 397 struct sg_table *sg); 398 399 bool spi_mem_default_supports_op(struct spi_mem *mem, 400 const struct spi_mem_op *op); 401 #else 402 static inline int 403 spi_controller_dma_map_mem_op_data(struct spi_controller *ctlr, 404 const struct spi_mem_op *op, 405 struct sg_table *sg) 406 { 407 return -ENOTSUPP; 408 } 409 410 static inline void 411 spi_controller_dma_unmap_mem_op_data(struct spi_controller *ctlr, 412 const struct spi_mem_op *op, 413 struct sg_table *sg) 414 { 415 } 416 417 static inline 418 bool spi_mem_default_supports_op(struct spi_mem *mem, 419 const struct spi_mem_op *op) 420 { 421 return false; 422 } 423 #endif /* CONFIG_SPI_MEM */ 424 425 int spi_mem_adjust_op_size(struct spi_mem *mem, struct spi_mem_op *op); 426 void spi_mem_adjust_op_freq(struct spi_mem *mem, struct spi_mem_op *op); 427 u64 spi_mem_calc_op_duration(struct spi_mem_op *op); 428 429 bool spi_mem_supports_op(struct spi_mem *mem, 430 const struct spi_mem_op *op); 431 432 int spi_mem_exec_op(struct spi_mem *mem, 433 const struct spi_mem_op *op); 434 435 const char *spi_mem_get_name(struct spi_mem *mem); 436 437 struct spi_mem_dirmap_desc * 438 spi_mem_dirmap_create(struct spi_mem *mem, 439 const struct spi_mem_dirmap_info *info); 440 void spi_mem_dirmap_destroy(struct spi_mem_dirmap_desc *desc); 441 ssize_t spi_mem_dirmap_read(struct spi_mem_dirmap_desc *desc, 442 u64 offs, size_t len, void *buf); 443 ssize_t spi_mem_dirmap_write(struct spi_mem_dirmap_desc *desc, 444 u64 offs, size_t len, const void *buf); 445 struct spi_mem_dirmap_desc * 446 devm_spi_mem_dirmap_create(struct device *dev, struct spi_mem *mem, 447 const struct spi_mem_dirmap_info *info); 448 void devm_spi_mem_dirmap_destroy(struct device *dev, 449 struct spi_mem_dirmap_desc *desc); 450 451 int spi_mem_poll_status(struct spi_mem *mem, 452 const struct spi_mem_op *op, 453 u16 mask, u16 match, 454 unsigned long initial_delay_us, 455 unsigned long polling_delay_us, 456 u16 timeout_ms); 457 458 int spi_mem_driver_register_with_owner(struct spi_mem_driver *drv, 459 struct module *owner); 460 461 void spi_mem_driver_unregister(struct spi_mem_driver *drv); 462 463 #define spi_mem_driver_register(__drv) \ 464 spi_mem_driver_register_with_owner(__drv, THIS_MODULE) 465 466 #define module_spi_mem_driver(__drv) \ 467 module_driver(__drv, spi_mem_driver_register, \ 468 spi_mem_driver_unregister) 469 470 #endif /* __LINUX_SPI_MEM_H */ 471