1c36ff266SBoris Brezillon /* SPDX-License-Identifier: GPL-2.0+ */
2c36ff266SBoris Brezillon /*
3c36ff266SBoris Brezillon * Copyright (C) 2018 Exceet Electronics GmbH
4c36ff266SBoris Brezillon * Copyright (C) 2018 Bootlin
5c36ff266SBoris Brezillon *
67529df46SPeter Pan * Author:
77529df46SPeter Pan * Peter Pan <peterpandong@micron.com>
87529df46SPeter Pan * Boris Brezillon <boris.brezillon@bootlin.com>
9c36ff266SBoris Brezillon */
10c36ff266SBoris Brezillon
11c36ff266SBoris Brezillon #ifndef __LINUX_SPI_MEM_H
12c36ff266SBoris Brezillon #define __LINUX_SPI_MEM_H
13c36ff266SBoris Brezillon
14c36ff266SBoris Brezillon #include <linux/spi/spi.h>
15c36ff266SBoris Brezillon
16c36ff266SBoris Brezillon #define SPI_MEM_OP_CMD(__opcode, __buswidth) \
17c36ff266SBoris Brezillon { \
18c36ff266SBoris Brezillon .buswidth = __buswidth, \
19c36ff266SBoris Brezillon .opcode = __opcode, \
20caf72df4SPratyush Yadav .nbytes = 1, \
21c36ff266SBoris Brezillon }
22c36ff266SBoris Brezillon
23c36ff266SBoris Brezillon #define SPI_MEM_OP_ADDR(__nbytes, __val, __buswidth) \
24c36ff266SBoris Brezillon { \
25c36ff266SBoris Brezillon .nbytes = __nbytes, \
26c36ff266SBoris Brezillon .val = __val, \
27c36ff266SBoris Brezillon .buswidth = __buswidth, \
28c36ff266SBoris Brezillon }
29c36ff266SBoris Brezillon
30c36ff266SBoris Brezillon #define SPI_MEM_OP_NO_ADDR { }
31c36ff266SBoris Brezillon
32c36ff266SBoris Brezillon #define SPI_MEM_OP_DUMMY(__nbytes, __buswidth) \
33c36ff266SBoris Brezillon { \
34c36ff266SBoris Brezillon .nbytes = __nbytes, \
35c36ff266SBoris Brezillon .buswidth = __buswidth, \
36c36ff266SBoris Brezillon }
37c36ff266SBoris Brezillon
38c36ff266SBoris Brezillon #define SPI_MEM_OP_NO_DUMMY { }
39c36ff266SBoris Brezillon
40c36ff266SBoris Brezillon #define SPI_MEM_OP_DATA_IN(__nbytes, __buf, __buswidth) \
41c36ff266SBoris Brezillon { \
42c36ff266SBoris Brezillon .dir = SPI_MEM_DATA_IN, \
43c36ff266SBoris Brezillon .nbytes = __nbytes, \
44c36ff266SBoris Brezillon .buf.in = __buf, \
45c36ff266SBoris Brezillon .buswidth = __buswidth, \
46c36ff266SBoris Brezillon }
47c36ff266SBoris Brezillon
48c36ff266SBoris Brezillon #define SPI_MEM_OP_DATA_OUT(__nbytes, __buf, __buswidth) \
49c36ff266SBoris Brezillon { \
50c36ff266SBoris Brezillon .dir = SPI_MEM_DATA_OUT, \
51c36ff266SBoris Brezillon .nbytes = __nbytes, \
52c36ff266SBoris Brezillon .buf.out = __buf, \
53c36ff266SBoris Brezillon .buswidth = __buswidth, \
54c36ff266SBoris Brezillon }
55c36ff266SBoris Brezillon
56c36ff266SBoris Brezillon #define SPI_MEM_OP_NO_DATA { }
57c36ff266SBoris Brezillon
58c36ff266SBoris Brezillon /**
59c36ff266SBoris Brezillon * enum spi_mem_data_dir - describes the direction of a SPI memory data
60c36ff266SBoris Brezillon * transfer from the controller perspective
610ebb261aSBoris Brezillon * @SPI_MEM_NO_DATA: no data transferred
62c36ff266SBoris Brezillon * @SPI_MEM_DATA_IN: data coming from the SPI memory
636afe76a6SBoris Brezillon * @SPI_MEM_DATA_OUT: data sent to the SPI memory
64c36ff266SBoris Brezillon */
65c36ff266SBoris Brezillon enum spi_mem_data_dir {
660ebb261aSBoris Brezillon SPI_MEM_NO_DATA,
67c36ff266SBoris Brezillon SPI_MEM_DATA_IN,
68c36ff266SBoris Brezillon SPI_MEM_DATA_OUT,
69c36ff266SBoris Brezillon };
70c36ff266SBoris Brezillon
71c36ff266SBoris Brezillon /**
72c36ff266SBoris Brezillon * struct spi_mem_op - describes a SPI memory operation
73caf72df4SPratyush Yadav * @cmd.nbytes: number of opcode bytes (only 1 or 2 are valid). The opcode is
74caf72df4SPratyush Yadav * sent MSB-first.
75c36ff266SBoris Brezillon * @cmd.buswidth: number of IO lines used to transmit the command
76c36ff266SBoris Brezillon * @cmd.opcode: operation opcode
774c5e2bbaSPratyush Yadav * @cmd.dtr: whether the command opcode should be sent in DTR mode or not
78c36ff266SBoris Brezillon * @addr.nbytes: number of address bytes to send. Can be zero if the operation
79c36ff266SBoris Brezillon * does not need to send an address
80c36ff266SBoris Brezillon * @addr.buswidth: number of IO lines used to transmit the address cycles
814c5e2bbaSPratyush Yadav * @addr.dtr: whether the address should be sent in DTR mode or not
82c36ff266SBoris Brezillon * @addr.val: address value. This value is always sent MSB first on the bus.
83c36ff266SBoris Brezillon * Note that only @addr.nbytes are taken into account in this
84c36ff266SBoris Brezillon * address value, so users should make sure the value fits in the
85c36ff266SBoris Brezillon * assigned number of bytes.
86c36ff266SBoris Brezillon * @dummy.nbytes: number of dummy bytes to send after an opcode or address. Can
87c36ff266SBoris Brezillon * be zero if the operation does not require dummy bytes
88c36ff266SBoris Brezillon * @dummy.buswidth: number of IO lanes used to transmit the dummy bytes
894c5e2bbaSPratyush Yadav * @dummy.dtr: whether the dummy bytes should be sent in DTR mode or not
90c36ff266SBoris Brezillon * @data.buswidth: number of IO lanes used to send/receive the data
914c5e2bbaSPratyush Yadav * @data.dtr: whether the data should be sent in DTR mode or not
92a433c2cbSMiquel Raynal * @data.ecc: whether error correction is required or not
93c36ff266SBoris Brezillon * @data.dir: direction of the transfer
9460489f08SBoris Brezillon * @data.nbytes: number of data bytes to send/receive. Can be zero if the
9560489f08SBoris Brezillon * operation does not involve transferring data
96c949a8e8SBoris Brezillon * @data.buf.in: input buffer (must be DMA-able)
97c949a8e8SBoris Brezillon * @data.buf.out: output buffer (must be DMA-able)
98c36ff266SBoris Brezillon */
99c36ff266SBoris Brezillon struct spi_mem_op {
100c36ff266SBoris Brezillon struct {
101caf72df4SPratyush Yadav u8 nbytes;
102c36ff266SBoris Brezillon u8 buswidth;
1034c5e2bbaSPratyush Yadav u8 dtr : 1;
10471c8f9cfSArnd Bergmann u8 __pad : 7;
105caf72df4SPratyush Yadav u16 opcode;
106c36ff266SBoris Brezillon } cmd;
107c36ff266SBoris Brezillon
108c36ff266SBoris Brezillon struct {
109c36ff266SBoris Brezillon u8 nbytes;
110c36ff266SBoris Brezillon u8 buswidth;
1114c5e2bbaSPratyush Yadav u8 dtr : 1;
11271c8f9cfSArnd Bergmann u8 __pad : 7;
113c36ff266SBoris Brezillon u64 val;
114c36ff266SBoris Brezillon } addr;
115c36ff266SBoris Brezillon
116c36ff266SBoris Brezillon struct {
117c36ff266SBoris Brezillon u8 nbytes;
118c36ff266SBoris Brezillon u8 buswidth;
1194c5e2bbaSPratyush Yadav u8 dtr : 1;
12071c8f9cfSArnd Bergmann u8 __pad : 7;
121c36ff266SBoris Brezillon } dummy;
122c36ff266SBoris Brezillon
123c36ff266SBoris Brezillon struct {
124c36ff266SBoris Brezillon u8 buswidth;
1254c5e2bbaSPratyush Yadav u8 dtr : 1;
126a433c2cbSMiquel Raynal u8 ecc : 1;
12771c8f9cfSArnd Bergmann u8 __pad : 6;
128c36ff266SBoris Brezillon enum spi_mem_data_dir dir;
129c36ff266SBoris Brezillon unsigned int nbytes;
130c36ff266SBoris Brezillon union {
131c36ff266SBoris Brezillon void *in;
132c36ff266SBoris Brezillon const void *out;
133c36ff266SBoris Brezillon } buf;
134c36ff266SBoris Brezillon } data;
135c36ff266SBoris Brezillon };
136c36ff266SBoris Brezillon
137c36ff266SBoris Brezillon #define SPI_MEM_OP(__cmd, __addr, __dummy, __data) \
138c36ff266SBoris Brezillon { \
139c36ff266SBoris Brezillon .cmd = __cmd, \
140c36ff266SBoris Brezillon .addr = __addr, \
141c36ff266SBoris Brezillon .dummy = __dummy, \
142c36ff266SBoris Brezillon .data = __data, \
143c36ff266SBoris Brezillon }
144c36ff266SBoris Brezillon
145c36ff266SBoris Brezillon /**
146aa167f3fSBoris Brezillon * struct spi_mem_dirmap_info - Direct mapping information
147aa167f3fSBoris Brezillon * @op_tmpl: operation template that should be used by the direct mapping when
148aa167f3fSBoris Brezillon * the memory device is accessed
149aa167f3fSBoris Brezillon * @offset: absolute offset this direct mapping is pointing to
150aa167f3fSBoris Brezillon * @length: length in byte of this direct mapping
151aa167f3fSBoris Brezillon *
152aa167f3fSBoris Brezillon * These information are used by the controller specific implementation to know
153aa167f3fSBoris Brezillon * the portion of memory that is directly mapped and the spi_mem_op that should
154aa167f3fSBoris Brezillon * be used to access the device.
155aa167f3fSBoris Brezillon * A direct mapping is only valid for one direction (read or write) and this
156aa167f3fSBoris Brezillon * direction is directly encoded in the ->op_tmpl.data.dir field.
157aa167f3fSBoris Brezillon */
158aa167f3fSBoris Brezillon struct spi_mem_dirmap_info {
159aa167f3fSBoris Brezillon struct spi_mem_op op_tmpl;
160aa167f3fSBoris Brezillon u64 offset;
161aa167f3fSBoris Brezillon u64 length;
162aa167f3fSBoris Brezillon };
163aa167f3fSBoris Brezillon
164aa167f3fSBoris Brezillon /**
165aa167f3fSBoris Brezillon * struct spi_mem_dirmap_desc - Direct mapping descriptor
166aa167f3fSBoris Brezillon * @mem: the SPI memory device this direct mapping is attached to
167aa167f3fSBoris Brezillon * @info: information passed at direct mapping creation time
168aa167f3fSBoris Brezillon * @nodirmap: set to 1 if the SPI controller does not implement
169aa167f3fSBoris Brezillon * ->mem_ops->dirmap_create() or when this function returned an
170aa167f3fSBoris Brezillon * error. If @nodirmap is true, all spi_mem_dirmap_{read,write}()
171aa167f3fSBoris Brezillon * calls will use spi_mem_exec_op() to access the memory. This is a
172aa167f3fSBoris Brezillon * degraded mode that allows spi_mem drivers to use the same code
173aa167f3fSBoris Brezillon * no matter whether the controller supports direct mapping or not
174aa167f3fSBoris Brezillon * @priv: field pointing to controller specific data
175aa167f3fSBoris Brezillon *
176aa167f3fSBoris Brezillon * Common part of a direct mapping descriptor. This object is created by
177aa167f3fSBoris Brezillon * spi_mem_dirmap_create() and controller implementation of ->create_dirmap()
178aa167f3fSBoris Brezillon * can create/attach direct mapping resources to the descriptor in the ->priv
179aa167f3fSBoris Brezillon * field.
180aa167f3fSBoris Brezillon */
181aa167f3fSBoris Brezillon struct spi_mem_dirmap_desc {
182aa167f3fSBoris Brezillon struct spi_mem *mem;
183aa167f3fSBoris Brezillon struct spi_mem_dirmap_info info;
184aa167f3fSBoris Brezillon unsigned int nodirmap;
185aa167f3fSBoris Brezillon void *priv;
186aa167f3fSBoris Brezillon };
187aa167f3fSBoris Brezillon
188aa167f3fSBoris Brezillon /**
189c36ff266SBoris Brezillon * struct spi_mem - describes a SPI memory device
190c36ff266SBoris Brezillon * @spi: the underlying SPI device
19106bcb516SFrieder Schrempf * @drvpriv: spi_mem_driver private data
1925d27a9c8SFrieder Schrempf * @name: name of the SPI memory device
193c36ff266SBoris Brezillon *
194c36ff266SBoris Brezillon * Extra information that describe the SPI memory device and may be needed by
195c36ff266SBoris Brezillon * the controller to properly handle this device should be placed here.
196c36ff266SBoris Brezillon *
197c36ff266SBoris Brezillon * One example would be the device size since some controller expose their SPI
198c36ff266SBoris Brezillon * mem devices through a io-mapped region.
199c36ff266SBoris Brezillon */
200c36ff266SBoris Brezillon struct spi_mem {
201c36ff266SBoris Brezillon struct spi_device *spi;
202c36ff266SBoris Brezillon void *drvpriv;
203401c0d77SBoris Brezillon const char *name;
204c36ff266SBoris Brezillon };
205c36ff266SBoris Brezillon
206c36ff266SBoris Brezillon /**
207c36ff266SBoris Brezillon * struct spi_mem_set_drvdata() - attach driver private data to a SPI mem
208c36ff266SBoris Brezillon * device
209c36ff266SBoris Brezillon * @mem: memory device
210c36ff266SBoris Brezillon * @data: data to attach to the memory device
211c36ff266SBoris Brezillon */
spi_mem_set_drvdata(struct spi_mem * mem,void * data)212c36ff266SBoris Brezillon static inline void spi_mem_set_drvdata(struct spi_mem *mem, void *data)
213c36ff266SBoris Brezillon {
214c36ff266SBoris Brezillon mem->drvpriv = data;
215c36ff266SBoris Brezillon }
216c36ff266SBoris Brezillon
217c36ff266SBoris Brezillon /**
218c36ff266SBoris Brezillon * struct spi_mem_get_drvdata() - get driver private data attached to a SPI mem
219c36ff266SBoris Brezillon * device
220c36ff266SBoris Brezillon * @mem: memory device
221c36ff266SBoris Brezillon *
222c36ff266SBoris Brezillon * Return: the data attached to the mem device.
223c36ff266SBoris Brezillon */
spi_mem_get_drvdata(struct spi_mem * mem)224c36ff266SBoris Brezillon static inline void *spi_mem_get_drvdata(struct spi_mem *mem)
225c36ff266SBoris Brezillon {
226c36ff266SBoris Brezillon return mem->drvpriv;
227c36ff266SBoris Brezillon }
228c36ff266SBoris Brezillon
229c36ff266SBoris Brezillon /**
230c36ff266SBoris Brezillon * struct spi_controller_mem_ops - SPI memory operations
231c36ff266SBoris Brezillon * @adjust_op_size: shrink the data xfer of an operation to match controller's
232b994d8f0SJonathan Neuschäfer * limitations (can be alignment or max RX/TX size
233c36ff266SBoris Brezillon * limitations)
234c36ff266SBoris Brezillon * @supports_op: check if an operation is supported by the controller
235c36ff266SBoris Brezillon * @exec_op: execute a SPI memory operation
236*cff49d58SChia-Lin Kao (AceLan) * not all driver provides supports_op(), so it can return -EOPNOTSUPP
237*cff49d58SChia-Lin Kao (AceLan) * if the op is not supported by the driver/controller
2385d27a9c8SFrieder Schrempf * @get_name: get a custom name for the SPI mem device from the controller.
2395d27a9c8SFrieder Schrempf * This might be needed if the controller driver has been ported
2405d27a9c8SFrieder Schrempf * to use the SPI mem layer and a custom name is used to keep
2415d27a9c8SFrieder Schrempf * mtdparts compatible.
2425d27a9c8SFrieder Schrempf * Note that if the implementation of this function allocates memory
2435d27a9c8SFrieder Schrempf * dynamically, then it should do so with devm_xxx(), as we don't
2445d27a9c8SFrieder Schrempf * have a ->free_name() function.
245aa167f3fSBoris Brezillon * @dirmap_create: create a direct mapping descriptor that can later be used to
246aa167f3fSBoris Brezillon * access the memory device. This method is optional
247aa167f3fSBoris Brezillon * @dirmap_destroy: destroy a memory descriptor previous created by
248aa167f3fSBoris Brezillon * ->dirmap_create()
249aa167f3fSBoris Brezillon * @dirmap_read: read data from the memory device using the direct mapping
250aa167f3fSBoris Brezillon * created by ->dirmap_create(). The function can return less
251aa167f3fSBoris Brezillon * data than requested (for example when the request is crossing
252aa167f3fSBoris Brezillon * the currently mapped area), and the caller of
253aa167f3fSBoris Brezillon * spi_mem_dirmap_read() is responsible for calling it again in
254aa167f3fSBoris Brezillon * this case.
255aa167f3fSBoris Brezillon * @dirmap_write: write data to the memory device using the direct mapping
256aa167f3fSBoris Brezillon * created by ->dirmap_create(). The function can return less
257aa167f3fSBoris Brezillon * data than requested (for example when the request is crossing
258aa167f3fSBoris Brezillon * the currently mapped area), and the caller of
259aa167f3fSBoris Brezillon * spi_mem_dirmap_write() is responsible for calling it again in
260aa167f3fSBoris Brezillon * this case.
261c955a0ccSPatrice Chotard * @poll_status: poll memory device status until (status & mask) == match or
262c955a0ccSPatrice Chotard * when the timeout has expired. It fills the data buffer with
263c955a0ccSPatrice Chotard * the last status value.
264c36ff266SBoris Brezillon *
265c36ff266SBoris Brezillon * This interface should be implemented by SPI controllers providing an
266c36ff266SBoris Brezillon * high-level interface to execute SPI memory operation, which is usually the
267c36ff266SBoris Brezillon * case for QSPI controllers.
268aa167f3fSBoris Brezillon *
269aa167f3fSBoris Brezillon * Note on ->dirmap_{read,write}(): drivers should avoid accessing the direct
270aa167f3fSBoris Brezillon * mapping from the CPU because doing that can stall the CPU waiting for the
271aa167f3fSBoris Brezillon * SPI mem transaction to finish, and this will make real-time maintainers
272aa167f3fSBoris Brezillon * unhappy and might make your system less reactive. Instead, drivers should
273aa167f3fSBoris Brezillon * use DMA to access this direct mapping.
274c36ff266SBoris Brezillon */
275c36ff266SBoris Brezillon struct spi_controller_mem_ops {
276c36ff266SBoris Brezillon int (*adjust_op_size)(struct spi_mem *mem, struct spi_mem_op *op);
277c36ff266SBoris Brezillon bool (*supports_op)(struct spi_mem *mem,
278c36ff266SBoris Brezillon const struct spi_mem_op *op);
279c36ff266SBoris Brezillon int (*exec_op)(struct spi_mem *mem,
280c36ff266SBoris Brezillon const struct spi_mem_op *op);
2815d27a9c8SFrieder Schrempf const char *(*get_name)(struct spi_mem *mem);
282aa167f3fSBoris Brezillon int (*dirmap_create)(struct spi_mem_dirmap_desc *desc);
283aa167f3fSBoris Brezillon void (*dirmap_destroy)(struct spi_mem_dirmap_desc *desc);
284aa167f3fSBoris Brezillon ssize_t (*dirmap_read)(struct spi_mem_dirmap_desc *desc,
285aa167f3fSBoris Brezillon u64 offs, size_t len, void *buf);
286aa167f3fSBoris Brezillon ssize_t (*dirmap_write)(struct spi_mem_dirmap_desc *desc,
287aa167f3fSBoris Brezillon u64 offs, size_t len, const void *buf);
288c955a0ccSPatrice Chotard int (*poll_status)(struct spi_mem *mem,
289c955a0ccSPatrice Chotard const struct spi_mem_op *op,
290c955a0ccSPatrice Chotard u16 mask, u16 match,
291c955a0ccSPatrice Chotard unsigned long initial_delay_us,
292c955a0ccSPatrice Chotard unsigned long polling_rate_us,
293c955a0ccSPatrice Chotard unsigned long timeout_ms);
294c36ff266SBoris Brezillon };
295c36ff266SBoris Brezillon
296c36ff266SBoris Brezillon /**
2974a3cc7fbSMiquel Raynal * struct spi_controller_mem_caps - SPI memory controller capabilities
2984a3cc7fbSMiquel Raynal * @dtr: Supports DTR operations
299a433c2cbSMiquel Raynal * @ecc: Supports operations with error correction
3004a3cc7fbSMiquel Raynal */
3014a3cc7fbSMiquel Raynal struct spi_controller_mem_caps {
3024a3cc7fbSMiquel Raynal bool dtr;
303a433c2cbSMiquel Raynal bool ecc;
3044a3cc7fbSMiquel Raynal };
3054a3cc7fbSMiquel Raynal
3064a3cc7fbSMiquel Raynal #define spi_mem_controller_is_capable(ctlr, cap) \
3074a3cc7fbSMiquel Raynal ((ctlr)->mem_caps && (ctlr)->mem_caps->cap)
3084a3cc7fbSMiquel Raynal
3094a3cc7fbSMiquel Raynal /**
310c36ff266SBoris Brezillon * struct spi_mem_driver - SPI memory driver
311c36ff266SBoris Brezillon * @spidrv: inherit from a SPI driver
312c36ff266SBoris Brezillon * @probe: probe a SPI memory. Usually where detection/initialization takes
313c36ff266SBoris Brezillon * place
314c36ff266SBoris Brezillon * @remove: remove a SPI memory
315c36ff266SBoris Brezillon * @shutdown: take appropriate action when the system is shutdown
316c36ff266SBoris Brezillon *
317c36ff266SBoris Brezillon * This is just a thin wrapper around a spi_driver. The core takes care of
318c36ff266SBoris Brezillon * allocating the spi_mem object and forwarding the probe/remove/shutdown
319c36ff266SBoris Brezillon * request to the spi_mem_driver. The reason we use this wrapper is because
320c36ff266SBoris Brezillon * we might have to stuff more information into the spi_mem struct to let
321c36ff266SBoris Brezillon * SPI controllers know more about the SPI memory they interact with, and
322c36ff266SBoris Brezillon * having this intermediate layer allows us to do that without adding more
323c36ff266SBoris Brezillon * useless fields to the spi_device object.
324c36ff266SBoris Brezillon */
325c36ff266SBoris Brezillon struct spi_mem_driver {
326c36ff266SBoris Brezillon struct spi_driver spidrv;
327c36ff266SBoris Brezillon int (*probe)(struct spi_mem *mem);
328c36ff266SBoris Brezillon int (*remove)(struct spi_mem *mem);
329c36ff266SBoris Brezillon void (*shutdown)(struct spi_mem *mem);
330c36ff266SBoris Brezillon };
331c36ff266SBoris Brezillon
332c36ff266SBoris Brezillon #if IS_ENABLED(CONFIG_SPI_MEM)
333c36ff266SBoris Brezillon int spi_controller_dma_map_mem_op_data(struct spi_controller *ctlr,
334c36ff266SBoris Brezillon const struct spi_mem_op *op,
335c36ff266SBoris Brezillon struct sg_table *sg);
336c36ff266SBoris Brezillon
337c36ff266SBoris Brezillon void spi_controller_dma_unmap_mem_op_data(struct spi_controller *ctlr,
338c36ff266SBoris Brezillon const struct spi_mem_op *op,
339c36ff266SBoris Brezillon struct sg_table *sg);
34072e68416SYueHaibing
34172e68416SYueHaibing bool spi_mem_default_supports_op(struct spi_mem *mem,
34272e68416SYueHaibing const struct spi_mem_op *op);
343c36ff266SBoris Brezillon #else
344c36ff266SBoris Brezillon static inline int
spi_controller_dma_map_mem_op_data(struct spi_controller * ctlr,const struct spi_mem_op * op,struct sg_table * sg)345c36ff266SBoris Brezillon spi_controller_dma_map_mem_op_data(struct spi_controller *ctlr,
346c36ff266SBoris Brezillon const struct spi_mem_op *op,
347c36ff266SBoris Brezillon struct sg_table *sg)
348c36ff266SBoris Brezillon {
349c36ff266SBoris Brezillon return -ENOTSUPP;
350c36ff266SBoris Brezillon }
351c36ff266SBoris Brezillon
352c36ff266SBoris Brezillon static inline void
spi_controller_dma_unmap_mem_op_data(struct spi_controller * ctlr,const struct spi_mem_op * op,struct sg_table * sg)353c36ff266SBoris Brezillon spi_controller_dma_unmap_mem_op_data(struct spi_controller *ctlr,
354c36ff266SBoris Brezillon const struct spi_mem_op *op,
355c36ff266SBoris Brezillon struct sg_table *sg)
356c36ff266SBoris Brezillon {
357c36ff266SBoris Brezillon }
35872e68416SYueHaibing
359b5881b15SYueHaibing static inline
spi_mem_default_supports_op(struct spi_mem * mem,const struct spi_mem_op * op)36072e68416SYueHaibing bool spi_mem_default_supports_op(struct spi_mem *mem,
36172e68416SYueHaibing const struct spi_mem_op *op)
36272e68416SYueHaibing {
36372e68416SYueHaibing return false;
36472e68416SYueHaibing }
365c36ff266SBoris Brezillon #endif /* CONFIG_SPI_MEM */
366c36ff266SBoris Brezillon
367c36ff266SBoris Brezillon int spi_mem_adjust_op_size(struct spi_mem *mem, struct spi_mem_op *op);
368c36ff266SBoris Brezillon
369c36ff266SBoris Brezillon bool spi_mem_supports_op(struct spi_mem *mem,
370c36ff266SBoris Brezillon const struct spi_mem_op *op);
371c36ff266SBoris Brezillon
372c36ff266SBoris Brezillon int spi_mem_exec_op(struct spi_mem *mem,
373c36ff266SBoris Brezillon const struct spi_mem_op *op);
374c36ff266SBoris Brezillon
3755d27a9c8SFrieder Schrempf const char *spi_mem_get_name(struct spi_mem *mem);
3765d27a9c8SFrieder Schrempf
377aa167f3fSBoris Brezillon struct spi_mem_dirmap_desc *
378aa167f3fSBoris Brezillon spi_mem_dirmap_create(struct spi_mem *mem,
379aa167f3fSBoris Brezillon const struct spi_mem_dirmap_info *info);
380aa167f3fSBoris Brezillon void spi_mem_dirmap_destroy(struct spi_mem_dirmap_desc *desc);
381aa167f3fSBoris Brezillon ssize_t spi_mem_dirmap_read(struct spi_mem_dirmap_desc *desc,
382aa167f3fSBoris Brezillon u64 offs, size_t len, void *buf);
383aa167f3fSBoris Brezillon ssize_t spi_mem_dirmap_write(struct spi_mem_dirmap_desc *desc,
384aa167f3fSBoris Brezillon u64 offs, size_t len, const void *buf);
3851fc1b636SBoris Brezillon struct spi_mem_dirmap_desc *
3861fc1b636SBoris Brezillon devm_spi_mem_dirmap_create(struct device *dev, struct spi_mem *mem,
3871fc1b636SBoris Brezillon const struct spi_mem_dirmap_info *info);
3881fc1b636SBoris Brezillon void devm_spi_mem_dirmap_destroy(struct device *dev,
3891fc1b636SBoris Brezillon struct spi_mem_dirmap_desc *desc);
390aa167f3fSBoris Brezillon
391c955a0ccSPatrice Chotard int spi_mem_poll_status(struct spi_mem *mem,
392c955a0ccSPatrice Chotard const struct spi_mem_op *op,
393c955a0ccSPatrice Chotard u16 mask, u16 match,
394c955a0ccSPatrice Chotard unsigned long initial_delay_us,
395c955a0ccSPatrice Chotard unsigned long polling_delay_us,
396c955a0ccSPatrice Chotard u16 timeout_ms);
397c955a0ccSPatrice Chotard
398c36ff266SBoris Brezillon int spi_mem_driver_register_with_owner(struct spi_mem_driver *drv,
399c36ff266SBoris Brezillon struct module *owner);
400c36ff266SBoris Brezillon
401c36ff266SBoris Brezillon void spi_mem_driver_unregister(struct spi_mem_driver *drv);
402c36ff266SBoris Brezillon
403c36ff266SBoris Brezillon #define spi_mem_driver_register(__drv) \
404c36ff266SBoris Brezillon spi_mem_driver_register_with_owner(__drv, THIS_MODULE)
405c36ff266SBoris Brezillon
406c36ff266SBoris Brezillon #define module_spi_mem_driver(__drv) \
407c36ff266SBoris Brezillon module_driver(__drv, spi_mem_driver_register, \
408c36ff266SBoris Brezillon spi_mem_driver_unregister)
409c36ff266SBoris Brezillon
410c36ff266SBoris Brezillon #endif /* __LINUX_SPI_MEM_H */
411