xref: /linux/include/linux/platform_data/xilinx-ll-temac.h (revision 8425c41d1ef762cc15d9501d7117f009a79f3fe9)
1*8425c41dSEsben Haabendal /* SPDX-License-Identifier: GPL-2.0 */
2*8425c41dSEsben Haabendal #ifndef __LINUX_XILINX_LL_TEMAC_H
3*8425c41dSEsben Haabendal #define __LINUX_XILINX_LL_TEMAC_H
4*8425c41dSEsben Haabendal 
5*8425c41dSEsben Haabendal #include <linux/if_ether.h>
6*8425c41dSEsben Haabendal #include <linux/phy.h>
7*8425c41dSEsben Haabendal 
8*8425c41dSEsben Haabendal struct ll_temac_platform_data {
9*8425c41dSEsben Haabendal 	bool txcsum;		/* Enable/disable TX checksum */
10*8425c41dSEsben Haabendal 	bool rxcsum;		/* Enable/disable RX checksum */
11*8425c41dSEsben Haabendal 	u8 mac_addr[ETH_ALEN];	/* MAC address (6 bytes) */
12*8425c41dSEsben Haabendal 	/* Clock frequency for input to MDIO clock generator */
13*8425c41dSEsben Haabendal 	u32 mdio_clk_freq;
14*8425c41dSEsben Haabendal 	unsigned long long mdio_bus_id; /* Unique id for MDIO bus */
15*8425c41dSEsben Haabendal 	int phy_addr;		/* Address of the PHY to connect to */
16*8425c41dSEsben Haabendal 	phy_interface_t phy_interface; /* PHY interface mode */
17*8425c41dSEsben Haabendal };
18*8425c41dSEsben Haabendal 
19*8425c41dSEsben Haabendal #endif /* __LINUX_XILINX_LL_TEMAC_H */
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