xref: /linux/include/linux/platform_data/xilinx-ll-temac.h (revision 0898782247ae533d1f4e47a06bc5d4870931b284)
18425c41dSEsben Haabendal /* SPDX-License-Identifier: GPL-2.0 */
28425c41dSEsben Haabendal #ifndef __LINUX_XILINX_LL_TEMAC_H
38425c41dSEsben Haabendal #define __LINUX_XILINX_LL_TEMAC_H
48425c41dSEsben Haabendal 
58425c41dSEsben Haabendal #include <linux/if_ether.h>
68425c41dSEsben Haabendal #include <linux/phy.h>
7*1bd33bf0SEsben Haabendal #include <linux/spinlock.h>
88425c41dSEsben Haabendal 
98425c41dSEsben Haabendal struct ll_temac_platform_data {
108425c41dSEsben Haabendal 	bool txcsum;		/* Enable/disable TX checksum */
118425c41dSEsben Haabendal 	bool rxcsum;		/* Enable/disable RX checksum */
128425c41dSEsben Haabendal 	u8 mac_addr[ETH_ALEN];	/* MAC address (6 bytes) */
138425c41dSEsben Haabendal 	/* Clock frequency for input to MDIO clock generator */
148425c41dSEsben Haabendal 	u32 mdio_clk_freq;
158425c41dSEsben Haabendal 	unsigned long long mdio_bus_id; /* Unique id for MDIO bus */
168425c41dSEsben Haabendal 	int phy_addr;		/* Address of the PHY to connect to */
178425c41dSEsben Haabendal 	phy_interface_t phy_interface; /* PHY interface mode */
18a3246dc4SEsben Haabendal 	bool reg_little_endian;	/* Little endian TEMAC register access  */
19a3246dc4SEsben Haabendal 	bool dma_little_endian;	/* Little endian DMA register access  */
20f14f5c11SEsben Haabendal 	/* Pre-initialized mutex to use for synchronizing indirect
21f14f5c11SEsben Haabendal 	 * register access.  When using both interfaces of a single
22f14f5c11SEsben Haabendal 	 * TEMAC IP block, the same mutex should be passed here, as
23f14f5c11SEsben Haabendal 	 * they share the same DCR bus bridge.
24f14f5c11SEsben Haabendal 	 */
25*1bd33bf0SEsben Haabendal 	spinlock_t *indirect_lock;
267e97a194SEsben Haabendal 	/* DMA channel control setup */
277e97a194SEsben Haabendal 	u8 tx_irq_timeout;	/* TX Interrupt Delay Time-out */
287e97a194SEsben Haabendal 	u8 tx_irq_count;	/* TX Interrupt Coalescing Threshold Count */
297e97a194SEsben Haabendal 	u8 rx_irq_timeout;	/* RX Interrupt Delay Time-out */
307e97a194SEsben Haabendal 	u8 rx_irq_count;	/* RX Interrupt Coalescing Threshold Count */
318425c41dSEsben Haabendal };
328425c41dSEsben Haabendal 
338425c41dSEsben Haabendal #endif /* __LINUX_XILINX_LL_TEMAC_H */
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