1 /* SPDX-License-Identifier: GPL-2.0 */ 2 3 #ifndef __TI_SYSC_DATA_H__ 4 #define __TI_SYSC_DATA_H__ 5 6 enum ti_sysc_module_type { 7 TI_SYSC_OMAP2, 8 TI_SYSC_OMAP2_TIMER, 9 TI_SYSC_OMAP3_SHAM, 10 TI_SYSC_OMAP3_AES, 11 TI_SYSC_OMAP4, 12 TI_SYSC_OMAP4_TIMER, 13 TI_SYSC_OMAP4_SIMPLE, 14 TI_SYSC_OMAP34XX_SR, 15 TI_SYSC_OMAP36XX_SR, 16 TI_SYSC_OMAP4_SR, 17 TI_SYSC_OMAP4_MCASP, 18 TI_SYSC_OMAP4_USB_HOST_FS, 19 TI_SYSC_DRA7_MCAN, 20 }; 21 22 struct ti_sysc_cookie { 23 void *data; 24 void *clkdm; 25 }; 26 27 /** 28 * struct sysc_regbits - TI OCP_SYSCONFIG register field offsets 29 * @midle_shift: Offset of the midle bit 30 * @clkact_shift: Offset of the clockactivity bit 31 * @sidle_shift: Offset of the sidle bit 32 * @enwkup_shift: Offset of the enawakeup bit 33 * @srst_shift: Offset of the softreset bit 34 * @autoidle_shift: Offset of the autoidle bit 35 * @dmadisable_shift: Offset of the dmadisable bit 36 * @emufree_shift; Offset of the emufree bit 37 * 38 * Note that 0 is a valid shift, and for ti-sysc.c -ENODEV can be used if a 39 * feature is not available. 40 */ 41 struct sysc_regbits { 42 s8 midle_shift; 43 s8 clkact_shift; 44 s8 sidle_shift; 45 s8 enwkup_shift; 46 s8 srst_shift; 47 s8 autoidle_shift; 48 s8 dmadisable_shift; 49 s8 emufree_shift; 50 }; 51 52 #define SYSC_MODULE_QUIRK_AESS BIT(19) 53 #define SYSC_MODULE_QUIRK_SGX BIT(18) 54 #define SYSC_MODULE_QUIRK_HDQ1W BIT(17) 55 #define SYSC_MODULE_QUIRK_I2C BIT(16) 56 #define SYSC_MODULE_QUIRK_WDT BIT(15) 57 #define SYSS_QUIRK_RESETDONE_INVERTED BIT(14) 58 #define SYSC_QUIRK_SWSUP_MSTANDBY BIT(13) 59 #define SYSC_QUIRK_SWSUP_SIDLE_ACT BIT(12) 60 #define SYSC_QUIRK_SWSUP_SIDLE BIT(11) 61 #define SYSC_QUIRK_EXT_OPT_CLOCK BIT(10) 62 #define SYSC_QUIRK_LEGACY_IDLE BIT(9) 63 #define SYSC_QUIRK_RESET_STATUS BIT(8) 64 #define SYSC_QUIRK_NO_IDLE BIT(7) 65 #define SYSC_QUIRK_NO_IDLE_ON_INIT BIT(6) 66 #define SYSC_QUIRK_NO_RESET_ON_INIT BIT(5) 67 #define SYSC_QUIRK_OPT_CLKS_NEEDED BIT(4) 68 #define SYSC_QUIRK_OPT_CLKS_IN_RESET BIT(3) 69 #define SYSC_QUIRK_16BIT BIT(2) 70 #define SYSC_QUIRK_UNCACHED BIT(1) 71 #define SYSC_QUIRK_USE_CLOCKACT BIT(0) 72 73 #define SYSC_NR_IDLEMODES 4 74 75 /** 76 * struct sysc_capabilities - capabilities for an interconnect target module 77 * @type: sysc type identifier for the module 78 * @sysc_mask: bitmask of supported SYSCONFIG register bits 79 * @regbits: bitmask of SYSCONFIG register bits 80 * @mod_quirks: bitmask of module specific quirks 81 */ 82 struct sysc_capabilities { 83 const enum ti_sysc_module_type type; 84 const u32 sysc_mask; 85 const struct sysc_regbits *regbits; 86 const u32 mod_quirks; 87 }; 88 89 /** 90 * struct sysc_config - configuration for an interconnect target module 91 * @sysc_val: configured value for sysc register 92 * @syss_mask: configured mask value for SYSSTATUS register 93 * @midlemodes: bitmask of supported master idle modes 94 * @sidlemodes: bitmask of supported slave idle modes 95 * @srst_udelay: optional delay needed after OCP soft reset 96 * @quirks: bitmask of enabled quirks 97 */ 98 struct sysc_config { 99 u32 sysc_val; 100 u32 syss_mask; 101 u8 midlemodes; 102 u8 sidlemodes; 103 u8 srst_udelay; 104 u32 quirks; 105 }; 106 107 enum sysc_registers { 108 SYSC_REVISION, 109 SYSC_SYSCONFIG, 110 SYSC_SYSSTATUS, 111 SYSC_MAX_REGS, 112 }; 113 114 /** 115 * struct ti_sysc_module_data - ti-sysc to hwmod translation data for a module 116 * @name: legacy "ti,hwmods" module name 117 * @module_pa: physical address of the interconnect target module 118 * @module_size: size of the interconnect target module 119 * @offsets: array of register offsets as listed in enum sysc_registers 120 * @nr_offsets: number of registers 121 * @cap: interconnect target module capabilities 122 * @cfg: interconnect target module configuration 123 * 124 * This data is enough to allocate a new struct omap_hwmod_class_sysconfig 125 * based on device tree data parsed by ti-sysc driver. 126 */ 127 struct ti_sysc_module_data { 128 const char *name; 129 u64 module_pa; 130 u32 module_size; 131 int *offsets; 132 int nr_offsets; 133 const struct sysc_capabilities *cap; 134 struct sysc_config *cfg; 135 }; 136 137 struct device; 138 struct clk; 139 140 struct ti_sysc_platform_data { 141 struct of_dev_auxdata *auxdata; 142 int (*init_clockdomain)(struct device *dev, struct clk *fck, 143 struct clk *ick, struct ti_sysc_cookie *cookie); 144 void (*clkdm_deny_idle)(struct device *dev, 145 const struct ti_sysc_cookie *cookie); 146 void (*clkdm_allow_idle)(struct device *dev, 147 const struct ti_sysc_cookie *cookie); 148 int (*init_module)(struct device *dev, 149 const struct ti_sysc_module_data *data, 150 struct ti_sysc_cookie *cookie); 151 int (*enable_module)(struct device *dev, 152 const struct ti_sysc_cookie *cookie); 153 int (*idle_module)(struct device *dev, 154 const struct ti_sysc_cookie *cookie); 155 int (*shutdown_module)(struct device *dev, 156 const struct ti_sysc_cookie *cookie); 157 }; 158 159 #endif /* __TI_SYSC_DATA_H__ */ 160