xref: /linux/include/linux/platform_data/ti-sysc.h (revision e8639e1c986a8a9d0f94549170f6db579376c3ae)
154d66222SSuman Anna /* SPDX-License-Identifier: GPL-2.0 */
254d66222SSuman Anna 
349a0a3d8STony Lindgren #ifndef __TI_SYSC_DATA_H__
449a0a3d8STony Lindgren #define __TI_SYSC_DATA_H__
549a0a3d8STony Lindgren 
670a65240STony Lindgren enum ti_sysc_module_type {
770a65240STony Lindgren 	TI_SYSC_OMAP2,
870a65240STony Lindgren 	TI_SYSC_OMAP2_TIMER,
970a65240STony Lindgren 	TI_SYSC_OMAP3_SHAM,
1070a65240STony Lindgren 	TI_SYSC_OMAP3_AES,
1170a65240STony Lindgren 	TI_SYSC_OMAP4,
1270a65240STony Lindgren 	TI_SYSC_OMAP4_TIMER,
1370a65240STony Lindgren 	TI_SYSC_OMAP4_SIMPLE,
1470a65240STony Lindgren 	TI_SYSC_OMAP34XX_SR,
1570a65240STony Lindgren 	TI_SYSC_OMAP36XX_SR,
1670a65240STony Lindgren 	TI_SYSC_OMAP4_SR,
1770a65240STony Lindgren 	TI_SYSC_OMAP4_MCASP,
1870a65240STony Lindgren 	TI_SYSC_OMAP4_USB_HOST_FS,
197f35e63dSFaiz Abbas 	TI_SYSC_DRA7_MCAN,
2070a65240STony Lindgren };
2170a65240STony Lindgren 
22ef70b0bdSTony Lindgren struct ti_sysc_cookie {
23ef70b0bdSTony Lindgren 	void *data;
242b2f7defSTony Lindgren 	void *clkdm;
25ef70b0bdSTony Lindgren };
26ef70b0bdSTony Lindgren 
2749a0a3d8STony Lindgren /**
2849a0a3d8STony Lindgren  * struct sysc_regbits - TI OCP_SYSCONFIG register field offsets
2949a0a3d8STony Lindgren  * @midle_shift: Offset of the midle bit
3049a0a3d8STony Lindgren  * @clkact_shift: Offset of the clockactivity bit
3149a0a3d8STony Lindgren  * @sidle_shift: Offset of the sidle bit
3249a0a3d8STony Lindgren  * @enwkup_shift: Offset of the enawakeup bit
3349a0a3d8STony Lindgren  * @srst_shift: Offset of the softreset bit
3449a0a3d8STony Lindgren  * @autoidle_shift: Offset of the autoidle bit
3549a0a3d8STony Lindgren  * @dmadisable_shift: Offset of the dmadisable bit
3649a0a3d8STony Lindgren  * @emufree_shift; Offset of the emufree bit
3749a0a3d8STony Lindgren  *
3849a0a3d8STony Lindgren  * Note that 0 is a valid shift, and for ti-sysc.c -ENODEV can be used if a
3949a0a3d8STony Lindgren  * feature is not available.
4049a0a3d8STony Lindgren  */
4149a0a3d8STony Lindgren struct sysc_regbits {
4249a0a3d8STony Lindgren 	s8 midle_shift;
4349a0a3d8STony Lindgren 	s8 clkact_shift;
4449a0a3d8STony Lindgren 	s8 sidle_shift;
4549a0a3d8STony Lindgren 	s8 enwkup_shift;
4649a0a3d8STony Lindgren 	s8 srst_shift;
4749a0a3d8STony Lindgren 	s8 autoidle_shift;
4849a0a3d8STony Lindgren 	s8 dmadisable_shift;
4949a0a3d8STony Lindgren 	s8 emufree_shift;
5049a0a3d8STony Lindgren };
5149a0a3d8STony Lindgren 
52*e8639e1cSTony Lindgren #define SYSC_MODULE_QUIRK_RTC_UNLOCK	BIT(22)
5394f63457STony Lindgren #define SYSC_QUIRK_CLKDM_NOAUTO		BIT(21)
5493c60483STony Lindgren #define SYSC_QUIRK_FORCE_MSTANDBY	BIT(20)
55020003f7STony Lindgren #define SYSC_MODULE_QUIRK_AESS		BIT(19)
56d7f563dbSTony Lindgren #define SYSC_MODULE_QUIRK_SGX		BIT(18)
574e23be47STony Lindgren #define SYSC_MODULE_QUIRK_HDQ1W		BIT(17)
584e23be47STony Lindgren #define SYSC_MODULE_QUIRK_I2C		BIT(16)
594e23be47STony Lindgren #define SYSC_MODULE_QUIRK_WDT		BIT(15)
60e0db94feSTony Lindgren #define SYSS_QUIRK_RESETDONE_INVERTED	BIT(14)
61b4a9a7a3STony Lindgren #define SYSC_QUIRK_SWSUP_MSTANDBY	BIT(13)
62b4a9a7a3STony Lindgren #define SYSC_QUIRK_SWSUP_SIDLE_ACT	BIT(12)
63b4a9a7a3STony Lindgren #define SYSC_QUIRK_SWSUP_SIDLE		BIT(11)
64a54275f4STony Lindgren #define SYSC_QUIRK_EXT_OPT_CLOCK	BIT(10)
65386cb766STony Lindgren #define SYSC_QUIRK_LEGACY_IDLE		BIT(9)
66386cb766STony Lindgren #define SYSC_QUIRK_RESET_STATUS		BIT(8)
67386cb766STony Lindgren #define SYSC_QUIRK_NO_IDLE		BIT(7)
68566a9b05STony Lindgren #define SYSC_QUIRK_NO_IDLE_ON_INIT	BIT(6)
69566a9b05STony Lindgren #define SYSC_QUIRK_NO_RESET_ON_INIT	BIT(5)
70566a9b05STony Lindgren #define SYSC_QUIRK_OPT_CLKS_NEEDED	BIT(4)
71566a9b05STony Lindgren #define SYSC_QUIRK_OPT_CLKS_IN_RESET	BIT(3)
72a7199e2bSTony Lindgren #define SYSC_QUIRK_16BIT		BIT(2)
7370a65240STony Lindgren #define SYSC_QUIRK_UNCACHED		BIT(1)
7470a65240STony Lindgren #define SYSC_QUIRK_USE_CLOCKACT		BIT(0)
7570a65240STony Lindgren 
76c5a2de97STony Lindgren #define SYSC_NR_IDLEMODES		4
77c5a2de97STony Lindgren 
7870a65240STony Lindgren /**
7970a65240STony Lindgren  * struct sysc_capabilities - capabilities for an interconnect target module
80b58056daSSuman Anna  * @type: sysc type identifier for the module
8170a65240STony Lindgren  * @sysc_mask: bitmask of supported SYSCONFIG register bits
8270a65240STony Lindgren  * @regbits: bitmask of SYSCONFIG register bits
8370a65240STony Lindgren  * @mod_quirks: bitmask of module specific quirks
8470a65240STony Lindgren  */
8570a65240STony Lindgren struct sysc_capabilities {
8670a65240STony Lindgren 	const enum ti_sysc_module_type type;
8770a65240STony Lindgren 	const u32 sysc_mask;
8870a65240STony Lindgren 	const struct sysc_regbits *regbits;
8970a65240STony Lindgren 	const u32 mod_quirks;
9070a65240STony Lindgren };
9170a65240STony Lindgren 
9270a65240STony Lindgren /**
9370a65240STony Lindgren  * struct sysc_config - configuration for an interconnect target module
94c5a2de97STony Lindgren  * @sysc_val: configured value for sysc register
95b58056daSSuman Anna  * @syss_mask: configured mask value for SYSSTATUS register
96c5a2de97STony Lindgren  * @midlemodes: bitmask of supported master idle modes
97b58056daSSuman Anna  * @sidlemodes: bitmask of supported slave idle modes
98566a9b05STony Lindgren  * @srst_udelay: optional delay needed after OCP soft reset
9970a65240STony Lindgren  * @quirks: bitmask of enabled quirks
10070a65240STony Lindgren  */
10170a65240STony Lindgren struct sysc_config {
102c5a2de97STony Lindgren 	u32 sysc_val;
103c5a2de97STony Lindgren 	u32 syss_mask;
104c5a2de97STony Lindgren 	u8 midlemodes;
105c5a2de97STony Lindgren 	u8 sidlemodes;
106566a9b05STony Lindgren 	u8 srst_udelay;
10770a65240STony Lindgren 	u32 quirks;
10870a65240STony Lindgren };
10970a65240STony Lindgren 
110ef70b0bdSTony Lindgren enum sysc_registers {
111ef70b0bdSTony Lindgren 	SYSC_REVISION,
112ef70b0bdSTony Lindgren 	SYSC_SYSCONFIG,
113ef70b0bdSTony Lindgren 	SYSC_SYSSTATUS,
114ef70b0bdSTony Lindgren 	SYSC_MAX_REGS,
115ef70b0bdSTony Lindgren };
116ef70b0bdSTony Lindgren 
117ef70b0bdSTony Lindgren /**
118ef70b0bdSTony Lindgren  * struct ti_sysc_module_data - ti-sysc to hwmod translation data for a module
119ef70b0bdSTony Lindgren  * @name: legacy "ti,hwmods" module name
120ef70b0bdSTony Lindgren  * @module_pa: physical address of the interconnect target module
121ef70b0bdSTony Lindgren  * @module_size: size of the interconnect target module
122ef70b0bdSTony Lindgren  * @offsets: array of register offsets as listed in enum sysc_registers
123ef70b0bdSTony Lindgren  * @nr_offsets: number of registers
124ef70b0bdSTony Lindgren  * @cap: interconnect target module capabilities
125ef70b0bdSTony Lindgren  * @cfg: interconnect target module configuration
126ef70b0bdSTony Lindgren  *
127ef70b0bdSTony Lindgren  * This data is enough to allocate a new struct omap_hwmod_class_sysconfig
128ef70b0bdSTony Lindgren  * based on device tree data parsed by ti-sysc driver.
129ef70b0bdSTony Lindgren  */
130ef70b0bdSTony Lindgren struct ti_sysc_module_data {
131ef70b0bdSTony Lindgren 	const char *name;
132ef70b0bdSTony Lindgren 	u64 module_pa;
133ef70b0bdSTony Lindgren 	u32 module_size;
134ef70b0bdSTony Lindgren 	int *offsets;
135ef70b0bdSTony Lindgren 	int nr_offsets;
136ef70b0bdSTony Lindgren 	const struct sysc_capabilities *cap;
137ef70b0bdSTony Lindgren 	struct sysc_config *cfg;
138ef70b0bdSTony Lindgren };
139ef70b0bdSTony Lindgren 
140ef70b0bdSTony Lindgren struct device;
1412b2f7defSTony Lindgren struct clk;
142ef70b0bdSTony Lindgren 
143ef70b0bdSTony Lindgren struct ti_sysc_platform_data {
144ef70b0bdSTony Lindgren 	struct of_dev_auxdata *auxdata;
145feaa8baeSTony Lindgren 	bool (*soc_type_gp)(void);
1462b2f7defSTony Lindgren 	int (*init_clockdomain)(struct device *dev, struct clk *fck,
1472b2f7defSTony Lindgren 				struct clk *ick, struct ti_sysc_cookie *cookie);
1482b2f7defSTony Lindgren 	void (*clkdm_deny_idle)(struct device *dev,
1492b2f7defSTony Lindgren 				const struct ti_sysc_cookie *cookie);
1502b2f7defSTony Lindgren 	void (*clkdm_allow_idle)(struct device *dev,
1512b2f7defSTony Lindgren 				 const struct ti_sysc_cookie *cookie);
152ef70b0bdSTony Lindgren 	int (*init_module)(struct device *dev,
153ef70b0bdSTony Lindgren 			   const struct ti_sysc_module_data *data,
154ef70b0bdSTony Lindgren 			   struct ti_sysc_cookie *cookie);
155ef70b0bdSTony Lindgren 	int (*enable_module)(struct device *dev,
156ef70b0bdSTony Lindgren 			     const struct ti_sysc_cookie *cookie);
157ef70b0bdSTony Lindgren 	int (*idle_module)(struct device *dev,
158ef70b0bdSTony Lindgren 			   const struct ti_sysc_cookie *cookie);
159ef70b0bdSTony Lindgren 	int (*shutdown_module)(struct device *dev,
160ef70b0bdSTony Lindgren 			       const struct ti_sysc_cookie *cookie);
161ef70b0bdSTony Lindgren };
162ef70b0bdSTony Lindgren 
16349a0a3d8STony Lindgren #endif	/* __TI_SYSC_DATA_H__ */
164