1c4a6a2abSLennert Buytenhek /* 2c4a6a2abSLennert Buytenhek * MV-643XX ethernet platform device data definition file. 3c4a6a2abSLennert Buytenhek */ 4fa3959f4SLennert Buytenhek 5c4a6a2abSLennert Buytenhek #ifndef __LINUX_MV643XX_ETH_H 6c4a6a2abSLennert Buytenhek #define __LINUX_MV643XX_ETH_H 7c4a6a2abSLennert Buytenhek 8f2ce825dSLennert Buytenhek #include <linux/mbus.h> 9f2ce825dSLennert Buytenhek 10240e4419SLennert Buytenhek #define MV643XX_ETH_SHARED_NAME "mv643xx_eth" 11240e4419SLennert Buytenhek #define MV643XX_ETH_NAME "mv643xx_eth_port" 12c4a6a2abSLennert Buytenhek #define MV643XX_ETH_SHARED_REGS 0x2000 13c4a6a2abSLennert Buytenhek #define MV643XX_ETH_SHARED_REGS_SIZE 0x2000 143077d78aSDale Farnsworth #define MV643XX_ETH_BAR_4 0x2220 153077d78aSDale Farnsworth #define MV643XX_ETH_SIZE_REG_4 0x2224 163077d78aSDale Farnsworth #define MV643XX_ETH_BASE_ADDR_ENABLE_REG 0x2290 17c4a6a2abSLennert Buytenhek 18f2ce825dSLennert Buytenhek struct mv643xx_eth_shared_platform_data { 19f2ce825dSLennert Buytenhek struct mbus_dram_target_info *dram; 20fc0eb9f2SLennert Buytenhek struct platform_device *shared_smi; 21c416a41fSLennert Buytenhek unsigned int t_clk; 22f2ce825dSLennert Buytenhek }; 23f2ce825dSLennert Buytenhek 24*ac840605SLennert Buytenhek #define MV643XX_ETH_PHY_ADDR_DEFAULT 0 25*ac840605SLennert Buytenhek #define MV643XX_ETH_PHY_ADDR(x) (0x80 | (x)) 26*ac840605SLennert Buytenhek #define MV643XX_ETH_PHY_NONE 0xff 27*ac840605SLennert Buytenhek 28c4a6a2abSLennert Buytenhek struct mv643xx_eth_platform_data { 29fc32b0e2SLennert Buytenhek /* 30fc32b0e2SLennert Buytenhek * Pointer back to our parent instance, and our port number. 31fc32b0e2SLennert Buytenhek */ 32fa3959f4SLennert Buytenhek struct platform_device *shared; 33c4a6a2abSLennert Buytenhek int port_number; 34fa3959f4SLennert Buytenhek 35fc32b0e2SLennert Buytenhek /* 36fc32b0e2SLennert Buytenhek * Whether a PHY is present, and if yes, at which address. 37fc32b0e2SLennert Buytenhek */ 38fc32b0e2SLennert Buytenhek int phy_addr; 39ce4e2e45SLennert Buytenhek 40fc32b0e2SLennert Buytenhek /* 41fc32b0e2SLennert Buytenhek * Use this MAC address if it is valid, overriding the 42fc32b0e2SLennert Buytenhek * address that is already in the hardware. 43fc32b0e2SLennert Buytenhek */ 44fc32b0e2SLennert Buytenhek u8 mac_addr[6]; 45c4a6a2abSLennert Buytenhek 46fc32b0e2SLennert Buytenhek /* 47fc32b0e2SLennert Buytenhek * If speed is 0, autonegotiation is enabled. 48fc32b0e2SLennert Buytenhek * Valid values for speed: 0, SPEED_10, SPEED_100, SPEED_1000. 49fc32b0e2SLennert Buytenhek * Valid values for duplex: DUPLEX_HALF, DUPLEX_FULL. 50fc32b0e2SLennert Buytenhek */ 51fc32b0e2SLennert Buytenhek int speed; 52fc32b0e2SLennert Buytenhek int duplex; 53c4a6a2abSLennert Buytenhek 54fc32b0e2SLennert Buytenhek /* 55f7981c1cSLennert Buytenhek * How many RX/TX queues to use. 5664da80a2SLennert Buytenhek */ 57f7981c1cSLennert Buytenhek int rx_queue_count; 58f7981c1cSLennert Buytenhek int tx_queue_count; 5964da80a2SLennert Buytenhek 6064da80a2SLennert Buytenhek /* 61fc32b0e2SLennert Buytenhek * Override default RX/TX queue sizes if nonzero. 62fc32b0e2SLennert Buytenhek */ 63fc32b0e2SLennert Buytenhek int rx_queue_size; 64fc32b0e2SLennert Buytenhek int tx_queue_size; 65fc32b0e2SLennert Buytenhek 66fc32b0e2SLennert Buytenhek /* 67fc32b0e2SLennert Buytenhek * Use on-chip SRAM for RX/TX descriptors if size is nonzero 68fc32b0e2SLennert Buytenhek * and sufficient to contain all descriptors for the requested 69fc32b0e2SLennert Buytenhek * ring sizes. 70fc32b0e2SLennert Buytenhek */ 71fc32b0e2SLennert Buytenhek unsigned long rx_sram_addr; 72fc32b0e2SLennert Buytenhek int rx_sram_size; 73fc32b0e2SLennert Buytenhek unsigned long tx_sram_addr; 74fc32b0e2SLennert Buytenhek int tx_sram_size; 75c4a6a2abSLennert Buytenhek }; 76c4a6a2abSLennert Buytenhek 77fc32b0e2SLennert Buytenhek 78fc32b0e2SLennert Buytenhek #endif 79