1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 2c4a6a2abSLennert Buytenhek /* 3c4a6a2abSLennert Buytenhek * MV-643XX ethernet platform device data definition file. 4c4a6a2abSLennert Buytenhek */ 5fa3959f4SLennert Buytenhek 6c4a6a2abSLennert Buytenhek #ifndef __LINUX_MV643XX_ETH_H 7c4a6a2abSLennert Buytenhek #define __LINUX_MV643XX_ETH_H 8c4a6a2abSLennert Buytenhek 9f2ce825dSLennert Buytenhek #include <linux/mbus.h> 10574e2af7SJoe Perches #include <linux/if_ether.h> 11*d08cb255SDavid Yang #include <linux/phy.h> 12f2ce825dSLennert Buytenhek 13240e4419SLennert Buytenhek #define MV643XX_ETH_SHARED_NAME "mv643xx_eth" 14240e4419SLennert Buytenhek #define MV643XX_ETH_NAME "mv643xx_eth_port" 15c4a6a2abSLennert Buytenhek #define MV643XX_ETH_SHARED_REGS 0x2000 16c4a6a2abSLennert Buytenhek #define MV643XX_ETH_SHARED_REGS_SIZE 0x2000 173077d78aSDale Farnsworth #define MV643XX_ETH_BAR_4 0x2220 183077d78aSDale Farnsworth #define MV643XX_ETH_SIZE_REG_4 0x2224 193077d78aSDale Farnsworth #define MV643XX_ETH_BASE_ADDR_ENABLE_REG 0x2290 20c4a6a2abSLennert Buytenhek 2158569aeeSArnaud Patard (Rtp) #define MV643XX_TX_CSUM_DEFAULT_LIMIT 0 2258569aeeSArnaud Patard (Rtp) 23f2ce825dSLennert Buytenhek struct mv643xx_eth_shared_platform_data { 24f2ce825dSLennert Buytenhek struct mbus_dram_target_info *dram; 259b2c2ff7SSaeed Bishara /* 269b2c2ff7SSaeed Bishara * Max packet size for Tx IP/Layer 4 checksum, when set to 0, default 279b2c2ff7SSaeed Bishara * limit of 9KiB will be used. 289b2c2ff7SSaeed Bishara */ 299b2c2ff7SSaeed Bishara int tx_csum_limit; 30f2ce825dSLennert Buytenhek }; 31f2ce825dSLennert Buytenhek 32ac840605SLennert Buytenhek #define MV643XX_ETH_PHY_ADDR_DEFAULT 0 33ac840605SLennert Buytenhek #define MV643XX_ETH_PHY_ADDR(x) (0x80 | (x)) 34ac840605SLennert Buytenhek #define MV643XX_ETH_PHY_NONE 0xff 35ac840605SLennert Buytenhek 365f292354SSebastian Hesselbarth struct device_node; 37c4a6a2abSLennert Buytenhek struct mv643xx_eth_platform_data { 38fc32b0e2SLennert Buytenhek /* 39fc32b0e2SLennert Buytenhek * Pointer back to our parent instance, and our port number. 40fc32b0e2SLennert Buytenhek */ 41fa3959f4SLennert Buytenhek struct platform_device *shared; 42c4a6a2abSLennert Buytenhek int port_number; 43fa3959f4SLennert Buytenhek 44fc32b0e2SLennert Buytenhek /* 45fc32b0e2SLennert Buytenhek * Whether a PHY is present, and if yes, at which address. 46fc32b0e2SLennert Buytenhek */ 47fc32b0e2SLennert Buytenhek int phy_addr; 485f292354SSebastian Hesselbarth struct device_node *phy_node; 49ce4e2e45SLennert Buytenhek 50fc32b0e2SLennert Buytenhek /* 51fc32b0e2SLennert Buytenhek * Use this MAC address if it is valid, overriding the 52fc32b0e2SLennert Buytenhek * address that is already in the hardware. 53fc32b0e2SLennert Buytenhek */ 54574e2af7SJoe Perches u8 mac_addr[ETH_ALEN]; 55c4a6a2abSLennert Buytenhek 56fc32b0e2SLennert Buytenhek /* 57fc32b0e2SLennert Buytenhek * If speed is 0, autonegotiation is enabled. 58fc32b0e2SLennert Buytenhek * Valid values for speed: 0, SPEED_10, SPEED_100, SPEED_1000. 59fc32b0e2SLennert Buytenhek * Valid values for duplex: DUPLEX_HALF, DUPLEX_FULL. 60fc32b0e2SLennert Buytenhek */ 61fc32b0e2SLennert Buytenhek int speed; 62fc32b0e2SLennert Buytenhek int duplex; 63*d08cb255SDavid Yang phy_interface_t interface; 64c4a6a2abSLennert Buytenhek 65fc32b0e2SLennert Buytenhek /* 66f7981c1cSLennert Buytenhek * How many RX/TX queues to use. 6764da80a2SLennert Buytenhek */ 68f7981c1cSLennert Buytenhek int rx_queue_count; 69f7981c1cSLennert Buytenhek int tx_queue_count; 7064da80a2SLennert Buytenhek 7164da80a2SLennert Buytenhek /* 72fc32b0e2SLennert Buytenhek * Override default RX/TX queue sizes if nonzero. 73fc32b0e2SLennert Buytenhek */ 74fc32b0e2SLennert Buytenhek int rx_queue_size; 75fc32b0e2SLennert Buytenhek int tx_queue_size; 76fc32b0e2SLennert Buytenhek 77fc32b0e2SLennert Buytenhek /* 78fc32b0e2SLennert Buytenhek * Use on-chip SRAM for RX/TX descriptors if size is nonzero 79fc32b0e2SLennert Buytenhek * and sufficient to contain all descriptors for the requested 80fc32b0e2SLennert Buytenhek * ring sizes. 81fc32b0e2SLennert Buytenhek */ 82fc32b0e2SLennert Buytenhek unsigned long rx_sram_addr; 83fc32b0e2SLennert Buytenhek int rx_sram_size; 84fc32b0e2SLennert Buytenhek unsigned long tx_sram_addr; 85fc32b0e2SLennert Buytenhek int tx_sram_size; 86c4a6a2abSLennert Buytenhek }; 87c4a6a2abSLennert Buytenhek 88fc32b0e2SLennert Buytenhek 89fc32b0e2SLennert Buytenhek #endif 90