1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * linux/include/linux/mmc/host.h 4 * 5 * Host driver specific definitions. 6 */ 7 #ifndef LINUX_MMC_HOST_H 8 #define LINUX_MMC_HOST_H 9 10 #include <linux/sched.h> 11 #include <linux/device.h> 12 #include <linux/fault-inject.h> 13 14 #include <linux/mmc/core.h> 15 #include <linux/mmc/card.h> 16 #include <linux/mmc/pm.h> 17 #include <linux/dma-direction.h> 18 19 struct mmc_ios { 20 unsigned int clock; /* clock rate */ 21 unsigned short vdd; 22 unsigned int power_delay_ms; /* waiting for stable power */ 23 24 /* vdd stores the bit number of the selected voltage range from below. */ 25 26 unsigned char bus_mode; /* command output mode */ 27 28 #define MMC_BUSMODE_OPENDRAIN 1 29 #define MMC_BUSMODE_PUSHPULL 2 30 31 unsigned char chip_select; /* SPI chip select */ 32 33 #define MMC_CS_DONTCARE 0 34 #define MMC_CS_HIGH 1 35 #define MMC_CS_LOW 2 36 37 unsigned char power_mode; /* power supply mode */ 38 39 #define MMC_POWER_OFF 0 40 #define MMC_POWER_UP 1 41 #define MMC_POWER_ON 2 42 #define MMC_POWER_UNDEFINED 3 43 44 unsigned char bus_width; /* data bus width */ 45 46 #define MMC_BUS_WIDTH_1 0 47 #define MMC_BUS_WIDTH_4 2 48 #define MMC_BUS_WIDTH_8 3 49 50 unsigned char timing; /* timing specification used */ 51 52 #define MMC_TIMING_LEGACY 0 53 #define MMC_TIMING_MMC_HS 1 54 #define MMC_TIMING_SD_HS 2 55 #define MMC_TIMING_UHS_SDR12 3 56 #define MMC_TIMING_UHS_SDR25 4 57 #define MMC_TIMING_UHS_SDR50 5 58 #define MMC_TIMING_UHS_SDR104 6 59 #define MMC_TIMING_UHS_DDR50 7 60 #define MMC_TIMING_MMC_DDR52 8 61 #define MMC_TIMING_MMC_HS200 9 62 #define MMC_TIMING_MMC_HS400 10 63 64 unsigned char signal_voltage; /* signalling voltage (1.8V or 3.3V) */ 65 66 #define MMC_SIGNAL_VOLTAGE_330 0 67 #define MMC_SIGNAL_VOLTAGE_180 1 68 #define MMC_SIGNAL_VOLTAGE_120 2 69 70 unsigned char drv_type; /* driver type (A, B, C, D) */ 71 72 #define MMC_SET_DRIVER_TYPE_B 0 73 #define MMC_SET_DRIVER_TYPE_A 1 74 #define MMC_SET_DRIVER_TYPE_C 2 75 #define MMC_SET_DRIVER_TYPE_D 3 76 77 bool enhanced_strobe; /* hs400es selection */ 78 }; 79 80 struct mmc_host; 81 82 struct mmc_host_ops { 83 /* 84 * It is optional for the host to implement pre_req and post_req in 85 * order to support double buffering of requests (prepare one 86 * request while another request is active). 87 * pre_req() must always be followed by a post_req(). 88 * To undo a call made to pre_req(), call post_req() with 89 * a nonzero err condition. 90 */ 91 void (*post_req)(struct mmc_host *host, struct mmc_request *req, 92 int err); 93 void (*pre_req)(struct mmc_host *host, struct mmc_request *req); 94 void (*request)(struct mmc_host *host, struct mmc_request *req); 95 /* Submit one request to host in atomic context. */ 96 int (*request_atomic)(struct mmc_host *host, 97 struct mmc_request *req); 98 99 /* 100 * Avoid calling the next three functions too often or in a "fast 101 * path", since underlaying controller might implement them in an 102 * expensive and/or slow way. Also note that these functions might 103 * sleep, so don't call them in the atomic contexts! 104 */ 105 106 /* 107 * Notes to the set_ios callback: 108 * ios->clock might be 0. For some controllers, setting 0Hz 109 * as any other frequency works. However, some controllers 110 * explicitly need to disable the clock. Otherwise e.g. voltage 111 * switching might fail because the SDCLK is not really quiet. 112 */ 113 void (*set_ios)(struct mmc_host *host, struct mmc_ios *ios); 114 115 /* 116 * Return values for the get_ro callback should be: 117 * 0 for a read/write card 118 * 1 for a read-only card 119 * -ENOSYS when not supported (equal to NULL callback) 120 * or a negative errno value when something bad happened 121 */ 122 int (*get_ro)(struct mmc_host *host); 123 124 /* 125 * Return values for the get_cd callback should be: 126 * 0 for a absent card 127 * 1 for a present card 128 * -ENOSYS when not supported (equal to NULL callback) 129 * or a negative errno value when something bad happened 130 */ 131 int (*get_cd)(struct mmc_host *host); 132 133 void (*enable_sdio_irq)(struct mmc_host *host, int enable); 134 /* Mandatory callback when using MMC_CAP2_SDIO_IRQ_NOTHREAD. */ 135 void (*ack_sdio_irq)(struct mmc_host *host); 136 137 /* optional callback for HC quirks */ 138 void (*init_card)(struct mmc_host *host, struct mmc_card *card); 139 140 int (*start_signal_voltage_switch)(struct mmc_host *host, struct mmc_ios *ios); 141 142 /* Check if the card is pulling dat[0:3] low */ 143 int (*card_busy)(struct mmc_host *host); 144 145 /* The tuning command opcode value is different for SD and eMMC cards */ 146 int (*execute_tuning)(struct mmc_host *host, u32 opcode); 147 148 /* Prepare HS400 target operating frequency depending host driver */ 149 int (*prepare_hs400_tuning)(struct mmc_host *host, struct mmc_ios *ios); 150 151 /* Prepare switch to DDR during the HS400 init sequence */ 152 int (*hs400_prepare_ddr)(struct mmc_host *host); 153 154 /* Prepare for switching from HS400 to HS200 */ 155 void (*hs400_downgrade)(struct mmc_host *host); 156 157 /* Complete selection of HS400 */ 158 void (*hs400_complete)(struct mmc_host *host); 159 160 /* Prepare enhanced strobe depending host driver */ 161 void (*hs400_enhanced_strobe)(struct mmc_host *host, 162 struct mmc_ios *ios); 163 int (*select_drive_strength)(struct mmc_card *card, 164 unsigned int max_dtr, int host_drv, 165 int card_drv, int *drv_type); 166 /* Reset the eMMC card via RST_n */ 167 void (*hw_reset)(struct mmc_host *host); 168 void (*card_event)(struct mmc_host *host); 169 170 /* 171 * Optional callback to support controllers with HW issues for multiple 172 * I/O. Returns the number of supported blocks for the request. 173 */ 174 int (*multi_io_quirk)(struct mmc_card *card, 175 unsigned int direction, int blk_size); 176 }; 177 178 struct mmc_cqe_ops { 179 /* Allocate resources, and make the CQE operational */ 180 int (*cqe_enable)(struct mmc_host *host, struct mmc_card *card); 181 /* Free resources, and make the CQE non-operational */ 182 void (*cqe_disable)(struct mmc_host *host); 183 /* 184 * Issue a read, write or DCMD request to the CQE. Also deal with the 185 * effect of ->cqe_off(). 186 */ 187 int (*cqe_request)(struct mmc_host *host, struct mmc_request *mrq); 188 /* Free resources (e.g. DMA mapping) associated with the request */ 189 void (*cqe_post_req)(struct mmc_host *host, struct mmc_request *mrq); 190 /* 191 * Prepare the CQE and host controller to accept non-CQ commands. There 192 * is no corresponding ->cqe_on(), instead ->cqe_request() is required 193 * to deal with that. 194 */ 195 void (*cqe_off)(struct mmc_host *host); 196 /* 197 * Wait for all CQE tasks to complete. Return an error if recovery 198 * becomes necessary. 199 */ 200 int (*cqe_wait_for_idle)(struct mmc_host *host); 201 /* 202 * Notify CQE that a request has timed out. Return false if the request 203 * completed or true if a timeout happened in which case indicate if 204 * recovery is needed. 205 */ 206 bool (*cqe_timeout)(struct mmc_host *host, struct mmc_request *mrq, 207 bool *recovery_needed); 208 /* 209 * Stop all CQE activity and prepare the CQE and host controller to 210 * accept recovery commands. 211 */ 212 void (*cqe_recovery_start)(struct mmc_host *host); 213 /* 214 * Clear the queue and call mmc_cqe_request_done() on all requests. 215 * Requests that errored will have the error set on the mmc_request 216 * (data->error or cmd->error for DCMD). Requests that did not error 217 * will have zero data bytes transferred. 218 */ 219 void (*cqe_recovery_finish)(struct mmc_host *host); 220 }; 221 222 struct mmc_async_req { 223 /* active mmc request */ 224 struct mmc_request *mrq; 225 /* 226 * Check error status of completed mmc request. 227 * Returns 0 if success otherwise non zero. 228 */ 229 enum mmc_blk_status (*err_check)(struct mmc_card *, struct mmc_async_req *); 230 }; 231 232 /** 233 * struct mmc_slot - MMC slot functions 234 * 235 * @cd_irq: MMC/SD-card slot hotplug detection IRQ or -EINVAL 236 * @handler_priv: MMC/SD-card slot context 237 * 238 * Some MMC/SD host controllers implement slot-functions like card and 239 * write-protect detection natively. However, a large number of controllers 240 * leave these functions to the CPU. This struct provides a hook to attach 241 * such slot-function drivers. 242 */ 243 struct mmc_slot { 244 int cd_irq; 245 bool cd_wake_enabled; 246 void *handler_priv; 247 }; 248 249 /** 250 * mmc_context_info - synchronization details for mmc context 251 * @is_done_rcv wake up reason was done request 252 * @is_new_req wake up reason was new request 253 * @is_waiting_last_req mmc context waiting for single running request 254 * @wait wait queue 255 */ 256 struct mmc_context_info { 257 bool is_done_rcv; 258 bool is_new_req; 259 bool is_waiting_last_req; 260 wait_queue_head_t wait; 261 }; 262 263 struct regulator; 264 struct mmc_pwrseq; 265 266 struct mmc_supply { 267 struct regulator *vmmc; /* Card power supply */ 268 struct regulator *vqmmc; /* Optional Vccq supply */ 269 }; 270 271 struct mmc_ctx { 272 struct task_struct *task; 273 }; 274 275 struct mmc_host { 276 struct device *parent; 277 struct device class_dev; 278 int index; 279 const struct mmc_host_ops *ops; 280 struct mmc_pwrseq *pwrseq; 281 unsigned int f_min; 282 unsigned int f_max; 283 unsigned int f_init; 284 u32 ocr_avail; 285 u32 ocr_avail_sdio; /* SDIO-specific OCR */ 286 u32 ocr_avail_sd; /* SD-specific OCR */ 287 u32 ocr_avail_mmc; /* MMC-specific OCR */ 288 #ifdef CONFIG_PM_SLEEP 289 struct notifier_block pm_notify; 290 #endif 291 struct wakeup_source *ws; /* Enable consume of uevents */ 292 u32 max_current_330; 293 u32 max_current_300; 294 u32 max_current_180; 295 296 #define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */ 297 #define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */ 298 #define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */ 299 #define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */ 300 #define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */ 301 #define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */ 302 #define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */ 303 #define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */ 304 #define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */ 305 #define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */ 306 #define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */ 307 #define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */ 308 #define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */ 309 #define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */ 310 #define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */ 311 #define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */ 312 #define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */ 313 314 u32 caps; /* Host capabilities */ 315 316 #define MMC_CAP_4_BIT_DATA (1 << 0) /* Can the host do 4 bit transfers */ 317 #define MMC_CAP_MMC_HIGHSPEED (1 << 1) /* Can do MMC high-speed timing */ 318 #define MMC_CAP_SD_HIGHSPEED (1 << 2) /* Can do SD high-speed timing */ 319 #define MMC_CAP_SDIO_IRQ (1 << 3) /* Can signal pending SDIO IRQs */ 320 #define MMC_CAP_SPI (1 << 4) /* Talks only SPI protocols */ 321 #define MMC_CAP_NEEDS_POLL (1 << 5) /* Needs polling for card-detection */ 322 #define MMC_CAP_8_BIT_DATA (1 << 6) /* Can the host do 8 bit transfers */ 323 #define MMC_CAP_AGGRESSIVE_PM (1 << 7) /* Suspend (e)MMC/SD at idle */ 324 #define MMC_CAP_NONREMOVABLE (1 << 8) /* Nonremovable e.g. eMMC */ 325 #define MMC_CAP_WAIT_WHILE_BUSY (1 << 9) /* Waits while card is busy */ 326 #define MMC_CAP_3_3V_DDR (1 << 11) /* Host supports eMMC DDR 3.3V */ 327 #define MMC_CAP_1_8V_DDR (1 << 12) /* Host supports eMMC DDR 1.8V */ 328 #define MMC_CAP_1_2V_DDR (1 << 13) /* Host supports eMMC DDR 1.2V */ 329 #define MMC_CAP_DDR (MMC_CAP_3_3V_DDR | MMC_CAP_1_8V_DDR | \ 330 MMC_CAP_1_2V_DDR) 331 #define MMC_CAP_POWER_OFF_CARD (1 << 14) /* Can power off after boot */ 332 #define MMC_CAP_BUS_WIDTH_TEST (1 << 15) /* CMD14/CMD19 bus width ok */ 333 #define MMC_CAP_UHS_SDR12 (1 << 16) /* Host supports UHS SDR12 mode */ 334 #define MMC_CAP_UHS_SDR25 (1 << 17) /* Host supports UHS SDR25 mode */ 335 #define MMC_CAP_UHS_SDR50 (1 << 18) /* Host supports UHS SDR50 mode */ 336 #define MMC_CAP_UHS_SDR104 (1 << 19) /* Host supports UHS SDR104 mode */ 337 #define MMC_CAP_UHS_DDR50 (1 << 20) /* Host supports UHS DDR50 mode */ 338 #define MMC_CAP_UHS (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | \ 339 MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 | \ 340 MMC_CAP_UHS_DDR50) 341 #define MMC_CAP_SYNC_RUNTIME_PM (1 << 21) /* Synced runtime PM suspends. */ 342 #define MMC_CAP_NEED_RSP_BUSY (1 << 22) /* Commands with R1B can't use R1. */ 343 #define MMC_CAP_DRIVER_TYPE_A (1 << 23) /* Host supports Driver Type A */ 344 #define MMC_CAP_DRIVER_TYPE_C (1 << 24) /* Host supports Driver Type C */ 345 #define MMC_CAP_DRIVER_TYPE_D (1 << 25) /* Host supports Driver Type D */ 346 #define MMC_CAP_DONE_COMPLETE (1 << 27) /* RW reqs can be completed within mmc_request_done() */ 347 #define MMC_CAP_CD_WAKE (1 << 28) /* Enable card detect wake */ 348 #define MMC_CAP_CMD_DURING_TFR (1 << 29) /* Commands during data transfer */ 349 #define MMC_CAP_CMD23 (1 << 30) /* CMD23 supported. */ 350 #define MMC_CAP_HW_RESET (1 << 31) /* Reset the eMMC card via RST_n */ 351 352 u32 caps2; /* More host capabilities */ 353 354 #define MMC_CAP2_BOOTPART_NOACC (1 << 0) /* Boot partition no access */ 355 #define MMC_CAP2_FULL_PWR_CYCLE (1 << 2) /* Can do full power cycle */ 356 #define MMC_CAP2_FULL_PWR_CYCLE_IN_SUSPEND (1 << 3) /* Can do full power cycle in suspend */ 357 #define MMC_CAP2_HS200_1_8V_SDR (1 << 5) /* can support */ 358 #define MMC_CAP2_HS200_1_2V_SDR (1 << 6) /* can support */ 359 #define MMC_CAP2_HS200 (MMC_CAP2_HS200_1_8V_SDR | \ 360 MMC_CAP2_HS200_1_2V_SDR) 361 #define MMC_CAP2_CD_ACTIVE_HIGH (1 << 10) /* Card-detect signal active high */ 362 #define MMC_CAP2_RO_ACTIVE_HIGH (1 << 11) /* Write-protect signal active high */ 363 #define MMC_CAP2_NO_PRESCAN_POWERUP (1 << 14) /* Don't power up before scan */ 364 #define MMC_CAP2_HS400_1_8V (1 << 15) /* Can support HS400 1.8V */ 365 #define MMC_CAP2_HS400_1_2V (1 << 16) /* Can support HS400 1.2V */ 366 #define MMC_CAP2_HS400 (MMC_CAP2_HS400_1_8V | \ 367 MMC_CAP2_HS400_1_2V) 368 #define MMC_CAP2_HSX00_1_8V (MMC_CAP2_HS200_1_8V_SDR | MMC_CAP2_HS400_1_8V) 369 #define MMC_CAP2_HSX00_1_2V (MMC_CAP2_HS200_1_2V_SDR | MMC_CAP2_HS400_1_2V) 370 #define MMC_CAP2_SDIO_IRQ_NOTHREAD (1 << 17) 371 #define MMC_CAP2_NO_WRITE_PROTECT (1 << 18) /* No physical write protect pin, assume that card is always read-write */ 372 #define MMC_CAP2_NO_SDIO (1 << 19) /* Do not send SDIO commands during initialization */ 373 #define MMC_CAP2_HS400_ES (1 << 20) /* Host supports enhanced strobe */ 374 #define MMC_CAP2_NO_SD (1 << 21) /* Do not send SD commands during initialization */ 375 #define MMC_CAP2_NO_MMC (1 << 22) /* Do not send (e)MMC commands during initialization */ 376 #define MMC_CAP2_CQE (1 << 23) /* Has eMMC command queue engine */ 377 #define MMC_CAP2_CQE_DCMD (1 << 24) /* CQE can issue a direct command */ 378 #define MMC_CAP2_AVOID_3_3V (1 << 25) /* Host must negotiate down from 3.3V */ 379 #define MMC_CAP2_MERGE_CAPABLE (1 << 26) /* Host can merge a segment over the segment size */ 380 381 int fixed_drv_type; /* fixed driver type for non-removable media */ 382 383 mmc_pm_flag_t pm_caps; /* supported pm features */ 384 385 /* host specific block data */ 386 unsigned int max_seg_size; /* see blk_queue_max_segment_size */ 387 unsigned short max_segs; /* see blk_queue_max_segments */ 388 unsigned short unused; 389 unsigned int max_req_size; /* maximum number of bytes in one req */ 390 unsigned int max_blk_size; /* maximum size of one mmc block */ 391 unsigned int max_blk_count; /* maximum number of blocks in one req */ 392 unsigned int max_busy_timeout; /* max busy timeout in ms */ 393 394 /* private data */ 395 spinlock_t lock; /* lock for claim and bus ops */ 396 397 struct mmc_ios ios; /* current io bus settings */ 398 399 /* group bitfields together to minimize padding */ 400 unsigned int use_spi_crc:1; 401 unsigned int claimed:1; /* host exclusively claimed */ 402 unsigned int bus_dead:1; /* bus has been released */ 403 unsigned int doing_init_tune:1; /* initial tuning in progress */ 404 unsigned int can_retune:1; /* re-tuning can be used */ 405 unsigned int doing_retune:1; /* re-tuning in progress */ 406 unsigned int retune_now:1; /* do re-tuning at next req */ 407 unsigned int retune_paused:1; /* re-tuning is temporarily disabled */ 408 unsigned int use_blk_mq:1; /* use blk-mq */ 409 unsigned int retune_crc_disable:1; /* don't trigger retune upon crc */ 410 unsigned int can_dma_map_merge:1; /* merging can be used */ 411 412 int rescan_disable; /* disable card detection */ 413 int rescan_entered; /* used with nonremovable devices */ 414 415 int need_retune; /* re-tuning is needed */ 416 int hold_retune; /* hold off re-tuning */ 417 unsigned int retune_period; /* re-tuning period in secs */ 418 struct timer_list retune_timer; /* for periodic re-tuning */ 419 420 bool trigger_card_event; /* card_event necessary */ 421 422 struct mmc_card *card; /* device attached to this host */ 423 424 wait_queue_head_t wq; 425 struct mmc_ctx *claimer; /* context that has host claimed */ 426 int claim_cnt; /* "claim" nesting count */ 427 struct mmc_ctx default_ctx; /* default context */ 428 429 struct delayed_work detect; 430 int detect_change; /* card detect flag */ 431 struct mmc_slot slot; 432 433 const struct mmc_bus_ops *bus_ops; /* current bus driver */ 434 unsigned int bus_refs; /* reference counter */ 435 436 unsigned int sdio_irqs; 437 struct task_struct *sdio_irq_thread; 438 struct delayed_work sdio_irq_work; 439 bool sdio_irq_pending; 440 atomic_t sdio_irq_thread_abort; 441 442 mmc_pm_flag_t pm_flags; /* requested pm features */ 443 444 struct led_trigger *led; /* activity led */ 445 446 #ifdef CONFIG_REGULATOR 447 bool regulator_enabled; /* regulator state */ 448 #endif 449 struct mmc_supply supply; 450 451 struct dentry *debugfs_root; 452 453 /* Ongoing data transfer that allows commands during transfer */ 454 struct mmc_request *ongoing_mrq; 455 456 #ifdef CONFIG_FAIL_MMC_REQUEST 457 struct fault_attr fail_mmc_request; 458 #endif 459 460 unsigned int actual_clock; /* Actual HC clock rate */ 461 462 unsigned int slotno; /* used for sdio acpi binding */ 463 464 int dsr_req; /* DSR value is valid */ 465 u32 dsr; /* optional driver stage (DSR) value */ 466 467 /* Command Queue Engine (CQE) support */ 468 const struct mmc_cqe_ops *cqe_ops; 469 void *cqe_private; 470 int cqe_qdepth; 471 bool cqe_enabled; 472 bool cqe_on; 473 474 /* Host Software Queue support */ 475 bool hsq_enabled; 476 477 unsigned long private[] ____cacheline_aligned; 478 }; 479 480 struct device_node; 481 482 struct mmc_host *mmc_alloc_host(int extra, struct device *); 483 int mmc_add_host(struct mmc_host *); 484 void mmc_remove_host(struct mmc_host *); 485 void mmc_free_host(struct mmc_host *); 486 int mmc_of_parse(struct mmc_host *host); 487 int mmc_of_parse_voltage(struct device_node *np, u32 *mask); 488 489 static inline void *mmc_priv(struct mmc_host *host) 490 { 491 return (void *)host->private; 492 } 493 494 static inline struct mmc_host *mmc_from_priv(void *priv) 495 { 496 return container_of(priv, struct mmc_host, private); 497 } 498 499 #define mmc_host_is_spi(host) ((host)->caps & MMC_CAP_SPI) 500 501 #define mmc_dev(x) ((x)->parent) 502 #define mmc_classdev(x) (&(x)->class_dev) 503 #define mmc_hostname(x) (dev_name(&(x)->class_dev)) 504 505 void mmc_detect_change(struct mmc_host *, unsigned long delay); 506 void mmc_request_done(struct mmc_host *, struct mmc_request *); 507 void mmc_command_done(struct mmc_host *host, struct mmc_request *mrq); 508 509 void mmc_cqe_request_done(struct mmc_host *host, struct mmc_request *mrq); 510 511 /* 512 * May be called from host driver's system/runtime suspend/resume callbacks, 513 * to know if SDIO IRQs has been claimed. 514 */ 515 static inline bool sdio_irq_claimed(struct mmc_host *host) 516 { 517 return host->sdio_irqs > 0; 518 } 519 520 static inline void mmc_signal_sdio_irq(struct mmc_host *host) 521 { 522 host->ops->enable_sdio_irq(host, 0); 523 host->sdio_irq_pending = true; 524 if (host->sdio_irq_thread) 525 wake_up_process(host->sdio_irq_thread); 526 } 527 528 void sdio_signal_irq(struct mmc_host *host); 529 530 #ifdef CONFIG_REGULATOR 531 int mmc_regulator_set_ocr(struct mmc_host *mmc, 532 struct regulator *supply, 533 unsigned short vdd_bit); 534 int mmc_regulator_set_vqmmc(struct mmc_host *mmc, struct mmc_ios *ios); 535 #else 536 static inline int mmc_regulator_set_ocr(struct mmc_host *mmc, 537 struct regulator *supply, 538 unsigned short vdd_bit) 539 { 540 return 0; 541 } 542 543 static inline int mmc_regulator_set_vqmmc(struct mmc_host *mmc, 544 struct mmc_ios *ios) 545 { 546 return -EINVAL; 547 } 548 #endif 549 550 int mmc_regulator_get_supply(struct mmc_host *mmc); 551 552 static inline int mmc_card_is_removable(struct mmc_host *host) 553 { 554 return !(host->caps & MMC_CAP_NONREMOVABLE); 555 } 556 557 static inline int mmc_card_keep_power(struct mmc_host *host) 558 { 559 return host->pm_flags & MMC_PM_KEEP_POWER; 560 } 561 562 static inline int mmc_card_wake_sdio_irq(struct mmc_host *host) 563 { 564 return host->pm_flags & MMC_PM_WAKE_SDIO_IRQ; 565 } 566 567 /* TODO: Move to private header */ 568 static inline int mmc_card_hs(struct mmc_card *card) 569 { 570 return card->host->ios.timing == MMC_TIMING_SD_HS || 571 card->host->ios.timing == MMC_TIMING_MMC_HS; 572 } 573 574 /* TODO: Move to private header */ 575 static inline int mmc_card_uhs(struct mmc_card *card) 576 { 577 return card->host->ios.timing >= MMC_TIMING_UHS_SDR12 && 578 card->host->ios.timing <= MMC_TIMING_UHS_DDR50; 579 } 580 581 void mmc_retune_timer_stop(struct mmc_host *host); 582 583 static inline void mmc_retune_needed(struct mmc_host *host) 584 { 585 if (host->can_retune) 586 host->need_retune = 1; 587 } 588 589 static inline bool mmc_can_retune(struct mmc_host *host) 590 { 591 return host->can_retune == 1; 592 } 593 594 static inline bool mmc_doing_retune(struct mmc_host *host) 595 { 596 return host->doing_retune == 1; 597 } 598 599 static inline bool mmc_doing_tune(struct mmc_host *host) 600 { 601 return host->doing_retune == 1 || host->doing_init_tune == 1; 602 } 603 604 static inline enum dma_data_direction mmc_get_dma_dir(struct mmc_data *data) 605 { 606 return data->flags & MMC_DATA_WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE; 607 } 608 609 int mmc_send_tuning(struct mmc_host *host, u32 opcode, int *cmd_error); 610 int mmc_abort_tuning(struct mmc_host *host, u32 opcode); 611 612 #endif /* LINUX_MMC_HOST_H */ 613