xref: /linux/include/linux/mlx5/qp.h (revision 302bdf68fc56a6330bc6b10ce435b4d466417537) 
1e126ba97SEli Cohen /*
2*302bdf68SSaeed Mahameed  * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
3e126ba97SEli Cohen  *
4e126ba97SEli Cohen  * This software is available to you under a choice of one of two
5e126ba97SEli Cohen  * licenses.  You may choose to be licensed under the terms of the GNU
6e126ba97SEli Cohen  * General Public License (GPL) Version 2, available from the file
7e126ba97SEli Cohen  * COPYING in the main directory of this source tree, or the
8e126ba97SEli Cohen  * OpenIB.org BSD license below:
9e126ba97SEli Cohen  *
10e126ba97SEli Cohen  *     Redistribution and use in source and binary forms, with or
11e126ba97SEli Cohen  *     without modification, are permitted provided that the following
12e126ba97SEli Cohen  *     conditions are met:
13e126ba97SEli Cohen  *
14e126ba97SEli Cohen  *      - Redistributions of source code must retain the above
15e126ba97SEli Cohen  *        copyright notice, this list of conditions and the following
16e126ba97SEli Cohen  *        disclaimer.
17e126ba97SEli Cohen  *
18e126ba97SEli Cohen  *      - Redistributions in binary form must reproduce the above
19e126ba97SEli Cohen  *        copyright notice, this list of conditions and the following
20e126ba97SEli Cohen  *        disclaimer in the documentation and/or other materials
21e126ba97SEli Cohen  *        provided with the distribution.
22e126ba97SEli Cohen  *
23e126ba97SEli Cohen  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24e126ba97SEli Cohen  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25e126ba97SEli Cohen  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26e126ba97SEli Cohen  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27e126ba97SEli Cohen  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28e126ba97SEli Cohen  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29e126ba97SEli Cohen  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30e126ba97SEli Cohen  * SOFTWARE.
31e126ba97SEli Cohen  */
32e126ba97SEli Cohen 
33e126ba97SEli Cohen #ifndef MLX5_QP_H
34e126ba97SEli Cohen #define MLX5_QP_H
35e126ba97SEli Cohen 
36e126ba97SEli Cohen #include <linux/mlx5/device.h>
37e126ba97SEli Cohen #include <linux/mlx5/driver.h>
38e126ba97SEli Cohen 
39e126ba97SEli Cohen #define MLX5_INVALID_LKEY	0x100
40e1e66cc2SSagi Grimberg #define MLX5_SIG_WQE_SIZE	(MLX5_SEND_WQE_BB * 5)
41e6631814SSagi Grimberg #define MLX5_DIF_SIZE		8
42e6631814SSagi Grimberg #define MLX5_STRIDE_BLOCK_OP	0x400
43fd22f78cSSagi Grimberg #define MLX5_CPY_GRD_MASK	0xc0
44fd22f78cSSagi Grimberg #define MLX5_CPY_APP_MASK	0x30
45fd22f78cSSagi Grimberg #define MLX5_CPY_REF_MASK	0x0f
46142537f4SSagi Grimberg #define MLX5_BSF_INC_REFTAG	(1 << 6)
47142537f4SSagi Grimberg #define MLX5_BSF_INL_VALID	(1 << 15)
48142537f4SSagi Grimberg #define MLX5_BSF_REFRESH_DIF	(1 << 14)
49142537f4SSagi Grimberg #define MLX5_BSF_REPEAT_BLOCK	(1 << 7)
50142537f4SSagi Grimberg #define MLX5_BSF_APPTAG_ESCAPE	0x1
51142537f4SSagi Grimberg #define MLX5_BSF_APPREF_ESCAPE	0x2
52e126ba97SEli Cohen 
53e420f0c0SHaggai Eran #define MLX5_QPN_BITS		24
54e420f0c0SHaggai Eran #define MLX5_QPN_MASK		((1 << MLX5_QPN_BITS) - 1)
55e420f0c0SHaggai Eran 
56e126ba97SEli Cohen enum mlx5_qp_optpar {
57e126ba97SEli Cohen 	MLX5_QP_OPTPAR_ALT_ADDR_PATH		= 1 << 0,
58e126ba97SEli Cohen 	MLX5_QP_OPTPAR_RRE			= 1 << 1,
59e126ba97SEli Cohen 	MLX5_QP_OPTPAR_RAE			= 1 << 2,
60e126ba97SEli Cohen 	MLX5_QP_OPTPAR_RWE			= 1 << 3,
61e126ba97SEli Cohen 	MLX5_QP_OPTPAR_PKEY_INDEX		= 1 << 4,
62e126ba97SEli Cohen 	MLX5_QP_OPTPAR_Q_KEY			= 1 << 5,
63e126ba97SEli Cohen 	MLX5_QP_OPTPAR_RNR_TIMEOUT		= 1 << 6,
64e126ba97SEli Cohen 	MLX5_QP_OPTPAR_PRIMARY_ADDR_PATH	= 1 << 7,
65e126ba97SEli Cohen 	MLX5_QP_OPTPAR_SRA_MAX			= 1 << 8,
66e126ba97SEli Cohen 	MLX5_QP_OPTPAR_RRA_MAX			= 1 << 9,
67e126ba97SEli Cohen 	MLX5_QP_OPTPAR_PM_STATE			= 1 << 10,
68e126ba97SEli Cohen 	MLX5_QP_OPTPAR_RETRY_COUNT		= 1 << 12,
69e126ba97SEli Cohen 	MLX5_QP_OPTPAR_RNR_RETRY		= 1 << 13,
70e126ba97SEli Cohen 	MLX5_QP_OPTPAR_ACK_TIMEOUT		= 1 << 14,
71e126ba97SEli Cohen 	MLX5_QP_OPTPAR_PRI_PORT			= 1 << 16,
72e126ba97SEli Cohen 	MLX5_QP_OPTPAR_SRQN			= 1 << 18,
73e126ba97SEli Cohen 	MLX5_QP_OPTPAR_CQN_RCV			= 1 << 19,
74e126ba97SEli Cohen 	MLX5_QP_OPTPAR_DC_HS			= 1 << 20,
75e126ba97SEli Cohen 	MLX5_QP_OPTPAR_DC_KEY			= 1 << 21,
76e126ba97SEli Cohen };
77e126ba97SEli Cohen 
78e126ba97SEli Cohen enum mlx5_qp_state {
79e126ba97SEli Cohen 	MLX5_QP_STATE_RST			= 0,
80e126ba97SEli Cohen 	MLX5_QP_STATE_INIT			= 1,
81e126ba97SEli Cohen 	MLX5_QP_STATE_RTR			= 2,
82e126ba97SEli Cohen 	MLX5_QP_STATE_RTS			= 3,
83e126ba97SEli Cohen 	MLX5_QP_STATE_SQER			= 4,
84e126ba97SEli Cohen 	MLX5_QP_STATE_SQD			= 5,
85e126ba97SEli Cohen 	MLX5_QP_STATE_ERR			= 6,
86e126ba97SEli Cohen 	MLX5_QP_STATE_SQ_DRAINING		= 7,
87e126ba97SEli Cohen 	MLX5_QP_STATE_SUSPENDED			= 9,
88e126ba97SEli Cohen 	MLX5_QP_NUM_STATE
89e126ba97SEli Cohen };
90e126ba97SEli Cohen 
91e126ba97SEli Cohen enum {
92e126ba97SEli Cohen 	MLX5_QP_ST_RC				= 0x0,
93e126ba97SEli Cohen 	MLX5_QP_ST_UC				= 0x1,
94e126ba97SEli Cohen 	MLX5_QP_ST_UD				= 0x2,
95e126ba97SEli Cohen 	MLX5_QP_ST_XRC				= 0x3,
96e126ba97SEli Cohen 	MLX5_QP_ST_MLX				= 0x4,
97e126ba97SEli Cohen 	MLX5_QP_ST_DCI				= 0x5,
98e126ba97SEli Cohen 	MLX5_QP_ST_DCT				= 0x6,
99e126ba97SEli Cohen 	MLX5_QP_ST_QP0				= 0x7,
100e126ba97SEli Cohen 	MLX5_QP_ST_QP1				= 0x8,
101e126ba97SEli Cohen 	MLX5_QP_ST_RAW_ETHERTYPE		= 0x9,
102e126ba97SEli Cohen 	MLX5_QP_ST_RAW_IPV6			= 0xa,
103e126ba97SEli Cohen 	MLX5_QP_ST_SNIFFER			= 0xb,
104e126ba97SEli Cohen 	MLX5_QP_ST_SYNC_UMR			= 0xe,
105e126ba97SEli Cohen 	MLX5_QP_ST_PTP_1588			= 0xd,
106e126ba97SEli Cohen 	MLX5_QP_ST_REG_UMR			= 0xc,
107e126ba97SEli Cohen 	MLX5_QP_ST_MAX
108e126ba97SEli Cohen };
109e126ba97SEli Cohen 
110e126ba97SEli Cohen enum {
111e126ba97SEli Cohen 	MLX5_QP_PM_MIGRATED			= 0x3,
112e126ba97SEli Cohen 	MLX5_QP_PM_ARMED			= 0x0,
113e126ba97SEli Cohen 	MLX5_QP_PM_REARM			= 0x1
114e126ba97SEli Cohen };
115e126ba97SEli Cohen 
116e126ba97SEli Cohen enum {
117e126ba97SEli Cohen 	MLX5_NON_ZERO_RQ	= 0 << 24,
118e126ba97SEli Cohen 	MLX5_SRQ_RQ		= 1 << 24,
119e126ba97SEli Cohen 	MLX5_CRQ_RQ		= 2 << 24,
120e126ba97SEli Cohen 	MLX5_ZERO_LEN_RQ	= 3 << 24
121e126ba97SEli Cohen };
122e126ba97SEli Cohen 
123e126ba97SEli Cohen enum {
124e126ba97SEli Cohen 	/* params1 */
125e126ba97SEli Cohen 	MLX5_QP_BIT_SRE				= 1 << 15,
126e126ba97SEli Cohen 	MLX5_QP_BIT_SWE				= 1 << 14,
127e126ba97SEli Cohen 	MLX5_QP_BIT_SAE				= 1 << 13,
128e126ba97SEli Cohen 	/* params2 */
129e126ba97SEli Cohen 	MLX5_QP_BIT_RRE				= 1 << 15,
130e126ba97SEli Cohen 	MLX5_QP_BIT_RWE				= 1 << 14,
131e126ba97SEli Cohen 	MLX5_QP_BIT_RAE				= 1 << 13,
132e126ba97SEli Cohen 	MLX5_QP_BIT_RIC				= 1 <<	4,
133e126ba97SEli Cohen };
134e126ba97SEli Cohen 
135e126ba97SEli Cohen enum {
136e126ba97SEli Cohen 	MLX5_WQE_CTRL_CQ_UPDATE		= 2 << 2,
137e126ba97SEli Cohen 	MLX5_WQE_CTRL_SOLICITED		= 1 << 1,
138e126ba97SEli Cohen };
139e126ba97SEli Cohen 
140e126ba97SEli Cohen enum {
141e126ba97SEli Cohen 	MLX5_SEND_WQE_BB	= 64,
142e126ba97SEli Cohen };
143e126ba97SEli Cohen 
144e126ba97SEli Cohen enum {
145e126ba97SEli Cohen 	MLX5_WQE_FMR_PERM_LOCAL_READ	= 1 << 27,
146e126ba97SEli Cohen 	MLX5_WQE_FMR_PERM_LOCAL_WRITE	= 1 << 28,
147e126ba97SEli Cohen 	MLX5_WQE_FMR_PERM_REMOTE_READ	= 1 << 29,
148e126ba97SEli Cohen 	MLX5_WQE_FMR_PERM_REMOTE_WRITE	= 1 << 30,
149e126ba97SEli Cohen 	MLX5_WQE_FMR_PERM_ATOMIC	= 1 << 31
150e126ba97SEli Cohen };
151e126ba97SEli Cohen 
152e126ba97SEli Cohen enum {
153e126ba97SEli Cohen 	MLX5_FENCE_MODE_NONE			= 0 << 5,
154e126ba97SEli Cohen 	MLX5_FENCE_MODE_INITIATOR_SMALL		= 1 << 5,
155e126ba97SEli Cohen 	MLX5_FENCE_MODE_STRONG_ORDERING		= 3 << 5,
156e126ba97SEli Cohen 	MLX5_FENCE_MODE_SMALL_AND_FENCE		= 4 << 5,
157e126ba97SEli Cohen };
158e126ba97SEli Cohen 
159e126ba97SEli Cohen enum {
160e126ba97SEli Cohen 	MLX5_QP_LAT_SENSITIVE	= 1 << 28,
161f360d88aSEli Cohen 	MLX5_QP_BLOCK_MCAST	= 1 << 30,
162e126ba97SEli Cohen 	MLX5_QP_ENABLE_SIG	= 1 << 31,
163e126ba97SEli Cohen };
164e126ba97SEli Cohen 
165e126ba97SEli Cohen enum {
166e126ba97SEli Cohen 	MLX5_RCV_DBR	= 0,
167e126ba97SEli Cohen 	MLX5_SND_DBR	= 1,
168e126ba97SEli Cohen };
169e126ba97SEli Cohen 
170e6631814SSagi Grimberg enum {
171e6631814SSagi Grimberg 	MLX5_FLAGS_INLINE	= 1<<7,
172e6631814SSagi Grimberg 	MLX5_FLAGS_CHECK_FREE   = 1<<5,
173e6631814SSagi Grimberg };
174e6631814SSagi Grimberg 
175e126ba97SEli Cohen struct mlx5_wqe_fmr_seg {
176e126ba97SEli Cohen 	__be32			flags;
177e126ba97SEli Cohen 	__be32			mem_key;
178e126ba97SEli Cohen 	__be64			buf_list;
179e126ba97SEli Cohen 	__be64			start_addr;
180e126ba97SEli Cohen 	__be64			reg_len;
181e126ba97SEli Cohen 	__be32			offset;
182e126ba97SEli Cohen 	__be32			page_size;
183e126ba97SEli Cohen 	u32			reserved[2];
184e126ba97SEli Cohen };
185e126ba97SEli Cohen 
186e126ba97SEli Cohen struct mlx5_wqe_ctrl_seg {
187e126ba97SEli Cohen 	__be32			opmod_idx_opcode;
188e126ba97SEli Cohen 	__be32			qpn_ds;
189e126ba97SEli Cohen 	u8			signature;
190e126ba97SEli Cohen 	u8			rsvd[2];
191e126ba97SEli Cohen 	u8			fm_ce_se;
192e126ba97SEli Cohen 	__be32			imm;
193e126ba97SEli Cohen };
194e126ba97SEli Cohen 
195c1395a2aSHaggai Eran #define MLX5_WQE_CTRL_DS_MASK 0x3f
1967bdf65d4SHaggai Eran #define MLX5_WQE_CTRL_QPN_MASK 0xffffff00
1977bdf65d4SHaggai Eran #define MLX5_WQE_CTRL_QPN_SHIFT 8
198c1395a2aSHaggai Eran #define MLX5_WQE_DS_UNITS 16
1997bdf65d4SHaggai Eran #define MLX5_WQE_CTRL_OPCODE_MASK 0xff
2007bdf65d4SHaggai Eran #define MLX5_WQE_CTRL_WQE_INDEX_MASK 0x00ffff00
2017bdf65d4SHaggai Eran #define MLX5_WQE_CTRL_WQE_INDEX_SHIFT 8
202c1395a2aSHaggai Eran 
203e126ba97SEli Cohen struct mlx5_wqe_xrc_seg {
204e126ba97SEli Cohen 	__be32			xrc_srqn;
205e126ba97SEli Cohen 	u8			rsvd[12];
206e126ba97SEli Cohen };
207e126ba97SEli Cohen 
208e126ba97SEli Cohen struct mlx5_wqe_masked_atomic_seg {
209e126ba97SEli Cohen 	__be64			swap_add;
210e126ba97SEli Cohen 	__be64			compare;
211e126ba97SEli Cohen 	__be64			swap_add_mask;
212e126ba97SEli Cohen 	__be64			compare_mask;
213e126ba97SEli Cohen };
214e126ba97SEli Cohen 
215e126ba97SEli Cohen struct mlx5_av {
216e126ba97SEli Cohen 	union {
217e126ba97SEli Cohen 		struct {
218e126ba97SEli Cohen 			__be32	qkey;
219e126ba97SEli Cohen 			__be32	reserved;
220e126ba97SEli Cohen 		} qkey;
221e126ba97SEli Cohen 		__be64	dc_key;
222e126ba97SEli Cohen 	} key;
223e126ba97SEli Cohen 	__be32	dqp_dct;
224e126ba97SEli Cohen 	u8	stat_rate_sl;
225e126ba97SEli Cohen 	u8	fl_mlid;
226e126ba97SEli Cohen 	__be16	rlid;
227e126ba97SEli Cohen 	u8	reserved0[10];
228e126ba97SEli Cohen 	u8	tclass;
229e126ba97SEli Cohen 	u8	hop_limit;
230e126ba97SEli Cohen 	__be32	grh_gid_fl;
231e126ba97SEli Cohen 	u8	rgid[16];
232e126ba97SEli Cohen };
233e126ba97SEli Cohen 
234e126ba97SEli Cohen struct mlx5_wqe_datagram_seg {
235e126ba97SEli Cohen 	struct mlx5_av	av;
236e126ba97SEli Cohen };
237e126ba97SEli Cohen 
238e126ba97SEli Cohen struct mlx5_wqe_raddr_seg {
239e126ba97SEli Cohen 	__be64			raddr;
240e126ba97SEli Cohen 	__be32			rkey;
241e126ba97SEli Cohen 	u32			reserved;
242e126ba97SEli Cohen };
243e126ba97SEli Cohen 
244e126ba97SEli Cohen struct mlx5_wqe_atomic_seg {
245e126ba97SEli Cohen 	__be64			swap_add;
246e126ba97SEli Cohen 	__be64			compare;
247e126ba97SEli Cohen };
248e126ba97SEli Cohen 
249e126ba97SEli Cohen struct mlx5_wqe_data_seg {
250e126ba97SEli Cohen 	__be32			byte_count;
251e126ba97SEli Cohen 	__be32			lkey;
252e126ba97SEli Cohen 	__be64			addr;
253e126ba97SEli Cohen };
254e126ba97SEli Cohen 
255e126ba97SEli Cohen struct mlx5_wqe_umr_ctrl_seg {
256e126ba97SEli Cohen 	u8		flags;
257e126ba97SEli Cohen 	u8		rsvd0[3];
258e126ba97SEli Cohen 	__be16		klm_octowords;
259e126ba97SEli Cohen 	__be16		bsf_octowords;
260e126ba97SEli Cohen 	__be64		mkey_mask;
261e126ba97SEli Cohen 	u8		rsvd1[32];
262e126ba97SEli Cohen };
263e126ba97SEli Cohen 
264e126ba97SEli Cohen struct mlx5_seg_set_psv {
265e126ba97SEli Cohen 	__be32		psv_num;
266e126ba97SEli Cohen 	__be16		syndrome;
267e126ba97SEli Cohen 	__be16		status;
268e126ba97SEli Cohen 	__be32		transient_sig;
269e126ba97SEli Cohen 	__be32		ref_tag;
270e126ba97SEli Cohen };
271e126ba97SEli Cohen 
272e126ba97SEli Cohen struct mlx5_seg_get_psv {
273e126ba97SEli Cohen 	u8		rsvd[19];
274e126ba97SEli Cohen 	u8		num_psv;
275e126ba97SEli Cohen 	__be32		l_key;
276e126ba97SEli Cohen 	__be64		va;
277e126ba97SEli Cohen 	__be32		psv_index[4];
278e126ba97SEli Cohen };
279e126ba97SEli Cohen 
280e126ba97SEli Cohen struct mlx5_seg_check_psv {
281e126ba97SEli Cohen 	u8		rsvd0[2];
282e126ba97SEli Cohen 	__be16		err_coalescing_op;
283e126ba97SEli Cohen 	u8		rsvd1[2];
284e126ba97SEli Cohen 	__be16		xport_err_op;
285e126ba97SEli Cohen 	u8		rsvd2[2];
286e126ba97SEli Cohen 	__be16		xport_err_mask;
287e126ba97SEli Cohen 	u8		rsvd3[7];
288e126ba97SEli Cohen 	u8		num_psv;
289e126ba97SEli Cohen 	__be32		l_key;
290e126ba97SEli Cohen 	__be64		va;
291e126ba97SEli Cohen 	__be32		psv_index[4];
292e126ba97SEli Cohen };
293e126ba97SEli Cohen 
294e126ba97SEli Cohen struct mlx5_rwqe_sig {
295e126ba97SEli Cohen 	u8	rsvd0[4];
296e126ba97SEli Cohen 	u8	signature;
297e126ba97SEli Cohen 	u8	rsvd1[11];
298e126ba97SEli Cohen };
299e126ba97SEli Cohen 
300e126ba97SEli Cohen struct mlx5_wqe_signature_seg {
301e126ba97SEli Cohen 	u8	rsvd0[4];
302e126ba97SEli Cohen 	u8	signature;
303e126ba97SEli Cohen 	u8	rsvd1[11];
304e126ba97SEli Cohen };
305e126ba97SEli Cohen 
3067bdf65d4SHaggai Eran #define MLX5_WQE_INLINE_SEG_BYTE_COUNT_MASK 0x3ff
3077bdf65d4SHaggai Eran 
308e126ba97SEli Cohen struct mlx5_wqe_inline_seg {
309e126ba97SEli Cohen 	__be32	byte_count;
310e126ba97SEli Cohen };
311e126ba97SEli Cohen 
312142537f4SSagi Grimberg enum mlx5_sig_type {
313142537f4SSagi Grimberg 	MLX5_DIF_CRC = 0x1,
314142537f4SSagi Grimberg 	MLX5_DIF_IPCS = 0x2,
315142537f4SSagi Grimberg };
316142537f4SSagi Grimberg 
317142537f4SSagi Grimberg struct mlx5_bsf_inl {
318142537f4SSagi Grimberg 	__be16		vld_refresh;
319142537f4SSagi Grimberg 	__be16		dif_apptag;
320142537f4SSagi Grimberg 	__be32		dif_reftag;
321142537f4SSagi Grimberg 	u8		sig_type;
322142537f4SSagi Grimberg 	u8		rp_inv_seed;
323142537f4SSagi Grimberg 	u8		rsvd[3];
324142537f4SSagi Grimberg 	u8		dif_inc_ref_guard_check;
325142537f4SSagi Grimberg 	__be16		dif_app_bitmask_check;
326142537f4SSagi Grimberg };
327142537f4SSagi Grimberg 
328e6631814SSagi Grimberg struct mlx5_bsf {
329e6631814SSagi Grimberg 	struct mlx5_bsf_basic {
330e6631814SSagi Grimberg 		u8		bsf_size_sbs;
331e6631814SSagi Grimberg 		u8		check_byte_mask;
332e6631814SSagi Grimberg 		union {
333e6631814SSagi Grimberg 			u8	copy_byte_mask;
334e6631814SSagi Grimberg 			u8	bs_selector;
335e6631814SSagi Grimberg 			u8	rsvd_wflags;
336e6631814SSagi Grimberg 		} wire;
337e6631814SSagi Grimberg 		union {
338e6631814SSagi Grimberg 			u8	bs_selector;
339e6631814SSagi Grimberg 			u8	rsvd_mflags;
340e6631814SSagi Grimberg 		} mem;
341e6631814SSagi Grimberg 		__be32		raw_data_size;
342e6631814SSagi Grimberg 		__be32		w_bfs_psv;
343e6631814SSagi Grimberg 		__be32		m_bfs_psv;
344e6631814SSagi Grimberg 	} basic;
345e6631814SSagi Grimberg 	struct mlx5_bsf_ext {
346e6631814SSagi Grimberg 		__be32		t_init_gen_pro_size;
347e6631814SSagi Grimberg 		__be32		rsvd_epi_size;
348e6631814SSagi Grimberg 		__be32		w_tfs_psv;
349e6631814SSagi Grimberg 		__be32		m_tfs_psv;
350e6631814SSagi Grimberg 	} ext;
351142537f4SSagi Grimberg 	struct mlx5_bsf_inl	w_inl;
352142537f4SSagi Grimberg 	struct mlx5_bsf_inl	m_inl;
353e6631814SSagi Grimberg };
354e6631814SSagi Grimberg 
355e6631814SSagi Grimberg struct mlx5_klm {
356e6631814SSagi Grimberg 	__be32		bcount;
357e6631814SSagi Grimberg 	__be32		key;
358e6631814SSagi Grimberg 	__be64		va;
359e6631814SSagi Grimberg };
360e6631814SSagi Grimberg 
361e6631814SSagi Grimberg struct mlx5_stride_block_entry {
362e6631814SSagi Grimberg 	__be16		stride;
363e6631814SSagi Grimberg 	__be16		bcount;
364e6631814SSagi Grimberg 	__be32		key;
365e6631814SSagi Grimberg 	__be64		va;
366e6631814SSagi Grimberg };
367e6631814SSagi Grimberg 
368e6631814SSagi Grimberg struct mlx5_stride_block_ctrl_seg {
369e6631814SSagi Grimberg 	__be32		bcount_per_cycle;
370e6631814SSagi Grimberg 	__be32		op;
371e6631814SSagi Grimberg 	__be32		repeat_count;
372e6631814SSagi Grimberg 	u16		rsvd;
373e6631814SSagi Grimberg 	__be16		num_entries;
374e6631814SSagi Grimberg };
375e6631814SSagi Grimberg 
376e420f0c0SHaggai Eran enum mlx5_pagefault_flags {
377e420f0c0SHaggai Eran 	MLX5_PFAULT_REQUESTOR = 1 << 0,
378e420f0c0SHaggai Eran 	MLX5_PFAULT_WRITE     = 1 << 1,
379e420f0c0SHaggai Eran 	MLX5_PFAULT_RDMA      = 1 << 2,
380e420f0c0SHaggai Eran };
381e420f0c0SHaggai Eran 
382e420f0c0SHaggai Eran /* Contains the details of a pagefault. */
383e420f0c0SHaggai Eran struct mlx5_pagefault {
384e420f0c0SHaggai Eran 	u32			bytes_committed;
385e420f0c0SHaggai Eran 	u8			event_subtype;
386e420f0c0SHaggai Eran 	enum mlx5_pagefault_flags flags;
387e420f0c0SHaggai Eran 	union {
388e420f0c0SHaggai Eran 		/* Initiator or send message responder pagefault details. */
389e420f0c0SHaggai Eran 		struct {
390e420f0c0SHaggai Eran 			/* Received packet size, only valid for responders. */
391e420f0c0SHaggai Eran 			u32	packet_size;
392e420f0c0SHaggai Eran 			/*
393e420f0c0SHaggai Eran 			 * WQE index. Refers to either the send queue or
394e420f0c0SHaggai Eran 			 * receive queue, according to event_subtype.
395e420f0c0SHaggai Eran 			 */
396e420f0c0SHaggai Eran 			u16	wqe_index;
397e420f0c0SHaggai Eran 		} wqe;
398e420f0c0SHaggai Eran 		/* RDMA responder pagefault details */
399e420f0c0SHaggai Eran 		struct {
400e420f0c0SHaggai Eran 			u32	r_key;
401e420f0c0SHaggai Eran 			/*
402e420f0c0SHaggai Eran 			 * Received packet size, minimal size page fault
403e420f0c0SHaggai Eran 			 * resolution required for forward progress.
404e420f0c0SHaggai Eran 			 */
405e420f0c0SHaggai Eran 			u32	packet_size;
406e420f0c0SHaggai Eran 			u32	rdma_op_len;
407e420f0c0SHaggai Eran 			u64	rdma_va;
408e420f0c0SHaggai Eran 		} rdma;
409e420f0c0SHaggai Eran 	};
410e420f0c0SHaggai Eran };
411e420f0c0SHaggai Eran 
412e126ba97SEli Cohen struct mlx5_core_qp {
4135903325aSEli Cohen 	struct mlx5_core_rsc_common	common; /* must be first */
414e126ba97SEli Cohen 	void (*event)		(struct mlx5_core_qp *, int);
415e420f0c0SHaggai Eran 	void (*pfault_handler)(struct mlx5_core_qp *, struct mlx5_pagefault *);
416e126ba97SEli Cohen 	int			qpn;
417e126ba97SEli Cohen 	struct mlx5_rsc_debug	*dbg;
418e126ba97SEli Cohen 	int			pid;
419e126ba97SEli Cohen };
420e126ba97SEli Cohen 
421e126ba97SEli Cohen struct mlx5_qp_path {
422e126ba97SEli Cohen 	u8			fl;
423e126ba97SEli Cohen 	u8			rsvd3;
424e126ba97SEli Cohen 	u8			free_ar;
425e126ba97SEli Cohen 	u8			pkey_index;
426e126ba97SEli Cohen 	u8			rsvd0;
427e126ba97SEli Cohen 	u8			grh_mlid;
428e126ba97SEli Cohen 	__be16			rlid;
429e126ba97SEli Cohen 	u8			ackto_lt;
430e126ba97SEli Cohen 	u8			mgid_index;
431e126ba97SEli Cohen 	u8			static_rate;
432e126ba97SEli Cohen 	u8			hop_limit;
433e126ba97SEli Cohen 	__be32			tclass_flowlabel;
434e126ba97SEli Cohen 	u8			rgid[16];
435e126ba97SEli Cohen 	u8			rsvd1[4];
436e126ba97SEli Cohen 	u8			sl;
437e126ba97SEli Cohen 	u8			port;
438e126ba97SEli Cohen 	u8			rsvd2[6];
439e126ba97SEli Cohen };
440e126ba97SEli Cohen 
441e126ba97SEli Cohen struct mlx5_qp_context {
442e126ba97SEli Cohen 	__be32			flags;
443e126ba97SEli Cohen 	__be32			flags_pd;
444e126ba97SEli Cohen 	u8			mtu_msgmax;
445e126ba97SEli Cohen 	u8			rq_size_stride;
446e126ba97SEli Cohen 	__be16			sq_crq_size;
447e126ba97SEli Cohen 	__be32			qp_counter_set_usr_page;
448e126ba97SEli Cohen 	__be32			wire_qpn;
449e126ba97SEli Cohen 	__be32			log_pg_sz_remote_qpn;
450e126ba97SEli Cohen 	struct			mlx5_qp_path pri_path;
451e126ba97SEli Cohen 	struct			mlx5_qp_path alt_path;
452e126ba97SEli Cohen 	__be32			params1;
453e126ba97SEli Cohen 	u8			reserved2[4];
454e126ba97SEli Cohen 	__be32			next_send_psn;
455e126ba97SEli Cohen 	__be32			cqn_send;
456e126ba97SEli Cohen 	u8			reserved3[8];
457e126ba97SEli Cohen 	__be32			last_acked_psn;
458e126ba97SEli Cohen 	__be32			ssn;
459e126ba97SEli Cohen 	__be32			params2;
460e126ba97SEli Cohen 	__be32			rnr_nextrecvpsn;
461e126ba97SEli Cohen 	__be32			xrcd;
462e126ba97SEli Cohen 	__be32			cqn_recv;
463e126ba97SEli Cohen 	__be64			db_rec_addr;
464e126ba97SEli Cohen 	__be32			qkey;
465e126ba97SEli Cohen 	__be32			rq_type_srqn;
466e126ba97SEli Cohen 	__be32			rmsn;
467e126ba97SEli Cohen 	__be16			hw_sq_wqe_counter;
468e126ba97SEli Cohen 	__be16			sw_sq_wqe_counter;
469e126ba97SEli Cohen 	__be16			hw_rcyclic_byte_counter;
470e126ba97SEli Cohen 	__be16			hw_rq_counter;
471e126ba97SEli Cohen 	__be16			sw_rcyclic_byte_counter;
472e126ba97SEli Cohen 	__be16			sw_rq_counter;
473e126ba97SEli Cohen 	u8			rsvd0[5];
474e126ba97SEli Cohen 	u8			cgs;
475e126ba97SEli Cohen 	u8			cs_req;
476e126ba97SEli Cohen 	u8			cs_res;
477e126ba97SEli Cohen 	__be64			dc_access_key;
478e126ba97SEli Cohen 	u8			rsvd1[24];
479e126ba97SEli Cohen };
480e126ba97SEli Cohen 
481e126ba97SEli Cohen struct mlx5_create_qp_mbox_in {
482e126ba97SEli Cohen 	struct mlx5_inbox_hdr	hdr;
483e126ba97SEli Cohen 	__be32			input_qpn;
484e126ba97SEli Cohen 	u8			rsvd0[4];
485e126ba97SEli Cohen 	__be32			opt_param_mask;
486e126ba97SEli Cohen 	u8			rsvd1[4];
487e126ba97SEli Cohen 	struct mlx5_qp_context	ctx;
488e126ba97SEli Cohen 	u8			rsvd3[16];
489e126ba97SEli Cohen 	__be64			pas[0];
490e126ba97SEli Cohen };
491e126ba97SEli Cohen 
492e126ba97SEli Cohen struct mlx5_create_qp_mbox_out {
493e126ba97SEli Cohen 	struct mlx5_outbox_hdr	hdr;
494e126ba97SEli Cohen 	__be32			qpn;
495e126ba97SEli Cohen 	u8			rsvd0[4];
496e126ba97SEli Cohen };
497e126ba97SEli Cohen 
498e126ba97SEli Cohen struct mlx5_destroy_qp_mbox_in {
499e126ba97SEli Cohen 	struct mlx5_inbox_hdr	hdr;
500e126ba97SEli Cohen 	__be32			qpn;
501e126ba97SEli Cohen 	u8			rsvd0[4];
502e126ba97SEli Cohen };
503e126ba97SEli Cohen 
504e126ba97SEli Cohen struct mlx5_destroy_qp_mbox_out {
505e126ba97SEli Cohen 	struct mlx5_outbox_hdr	hdr;
506e126ba97SEli Cohen 	u8			rsvd0[8];
507e126ba97SEli Cohen };
508e126ba97SEli Cohen 
509e126ba97SEli Cohen struct mlx5_modify_qp_mbox_in {
510e126ba97SEli Cohen 	struct mlx5_inbox_hdr	hdr;
511e126ba97SEli Cohen 	__be32			qpn;
512e126ba97SEli Cohen 	u8			rsvd1[4];
513e126ba97SEli Cohen 	__be32			optparam;
514e126ba97SEli Cohen 	u8			rsvd0[4];
515e126ba97SEli Cohen 	struct mlx5_qp_context	ctx;
516e126ba97SEli Cohen };
517e126ba97SEli Cohen 
518e126ba97SEli Cohen struct mlx5_modify_qp_mbox_out {
519e126ba97SEli Cohen 	struct mlx5_outbox_hdr	hdr;
520e126ba97SEli Cohen 	u8			rsvd0[8];
521e126ba97SEli Cohen };
522e126ba97SEli Cohen 
523e126ba97SEli Cohen struct mlx5_query_qp_mbox_in {
524e126ba97SEli Cohen 	struct mlx5_inbox_hdr	hdr;
525e126ba97SEli Cohen 	__be32			qpn;
526e126ba97SEli Cohen 	u8			rsvd[4];
527e126ba97SEli Cohen };
528e126ba97SEli Cohen 
529e126ba97SEli Cohen struct mlx5_query_qp_mbox_out {
530e126ba97SEli Cohen 	struct mlx5_outbox_hdr	hdr;
531e126ba97SEli Cohen 	u8			rsvd1[8];
532e126ba97SEli Cohen 	__be32			optparam;
533e126ba97SEli Cohen 	u8			rsvd0[4];
534e126ba97SEli Cohen 	struct mlx5_qp_context	ctx;
535e126ba97SEli Cohen 	u8			rsvd2[16];
536e126ba97SEli Cohen 	__be64			pas[0];
537e126ba97SEli Cohen };
538e126ba97SEli Cohen 
539e126ba97SEli Cohen struct mlx5_conf_sqp_mbox_in {
540e126ba97SEli Cohen 	struct mlx5_inbox_hdr	hdr;
541e126ba97SEli Cohen 	__be32			qpn;
542e126ba97SEli Cohen 	u8			rsvd[3];
543e126ba97SEli Cohen 	u8			type;
544e126ba97SEli Cohen };
545e126ba97SEli Cohen 
546e126ba97SEli Cohen struct mlx5_conf_sqp_mbox_out {
547e126ba97SEli Cohen 	struct mlx5_outbox_hdr	hdr;
548e126ba97SEli Cohen 	u8			rsvd[8];
549e126ba97SEli Cohen };
550e126ba97SEli Cohen 
551e126ba97SEli Cohen struct mlx5_alloc_xrcd_mbox_in {
552e126ba97SEli Cohen 	struct mlx5_inbox_hdr	hdr;
553e126ba97SEli Cohen 	u8			rsvd[8];
554e126ba97SEli Cohen };
555e126ba97SEli Cohen 
556e126ba97SEli Cohen struct mlx5_alloc_xrcd_mbox_out {
557e126ba97SEli Cohen 	struct mlx5_outbox_hdr	hdr;
558e126ba97SEli Cohen 	__be32			xrcdn;
559e126ba97SEli Cohen 	u8			rsvd[4];
560e126ba97SEli Cohen };
561e126ba97SEli Cohen 
562e126ba97SEli Cohen struct mlx5_dealloc_xrcd_mbox_in {
563e126ba97SEli Cohen 	struct mlx5_inbox_hdr	hdr;
564e126ba97SEli Cohen 	__be32			xrcdn;
565e126ba97SEli Cohen 	u8			rsvd[4];
566e126ba97SEli Cohen };
567e126ba97SEli Cohen 
568e126ba97SEli Cohen struct mlx5_dealloc_xrcd_mbox_out {
569e126ba97SEli Cohen 	struct mlx5_outbox_hdr	hdr;
570e126ba97SEli Cohen 	u8			rsvd[8];
571e126ba97SEli Cohen };
572e126ba97SEli Cohen 
573e126ba97SEli Cohen static inline struct mlx5_core_qp *__mlx5_qp_lookup(struct mlx5_core_dev *dev, u32 qpn)
574e126ba97SEli Cohen {
575e126ba97SEli Cohen 	return radix_tree_lookup(&dev->priv.qp_table.tree, qpn);
576e126ba97SEli Cohen }
577e126ba97SEli Cohen 
578d5436ba0SSagi Grimberg static inline struct mlx5_core_mr *__mlx5_mr_lookup(struct mlx5_core_dev *dev, u32 key)
579d5436ba0SSagi Grimberg {
580d5436ba0SSagi Grimberg 	return radix_tree_lookup(&dev->priv.mr_table.tree, key);
581d5436ba0SSagi Grimberg }
582d5436ba0SSagi Grimberg 
583e420f0c0SHaggai Eran struct mlx5_page_fault_resume_mbox_in {
584e420f0c0SHaggai Eran 	struct mlx5_inbox_hdr	hdr;
585e420f0c0SHaggai Eran 	__be32			flags_qpn;
586e420f0c0SHaggai Eran 	u8			reserved[4];
587e420f0c0SHaggai Eran };
588e420f0c0SHaggai Eran 
589e420f0c0SHaggai Eran struct mlx5_page_fault_resume_mbox_out {
590e420f0c0SHaggai Eran 	struct mlx5_outbox_hdr	hdr;
591e420f0c0SHaggai Eran 	u8			rsvd[8];
592e420f0c0SHaggai Eran };
593e420f0c0SHaggai Eran 
594e126ba97SEli Cohen int mlx5_core_create_qp(struct mlx5_core_dev *dev,
595e126ba97SEli Cohen 			struct mlx5_core_qp *qp,
596e126ba97SEli Cohen 			struct mlx5_create_qp_mbox_in *in,
597e126ba97SEli Cohen 			int inlen);
598e126ba97SEli Cohen int mlx5_core_qp_modify(struct mlx5_core_dev *dev, enum mlx5_qp_state cur_state,
599e126ba97SEli Cohen 			enum mlx5_qp_state new_state,
600e126ba97SEli Cohen 			struct mlx5_modify_qp_mbox_in *in, int sqd_event,
601e126ba97SEli Cohen 			struct mlx5_core_qp *qp);
602e126ba97SEli Cohen int mlx5_core_destroy_qp(struct mlx5_core_dev *dev,
603e126ba97SEli Cohen 			 struct mlx5_core_qp *qp);
604e126ba97SEli Cohen int mlx5_core_qp_query(struct mlx5_core_dev *dev, struct mlx5_core_qp *qp,
605e126ba97SEli Cohen 		       struct mlx5_query_qp_mbox_out *out, int outlen);
606e126ba97SEli Cohen 
607e126ba97SEli Cohen int mlx5_core_xrcd_alloc(struct mlx5_core_dev *dev, u32 *xrcdn);
608e126ba97SEli Cohen int mlx5_core_xrcd_dealloc(struct mlx5_core_dev *dev, u32 xrcdn);
609e126ba97SEli Cohen void mlx5_init_qp_table(struct mlx5_core_dev *dev);
610e126ba97SEli Cohen void mlx5_cleanup_qp_table(struct mlx5_core_dev *dev);
611e126ba97SEli Cohen int mlx5_debug_qp_add(struct mlx5_core_dev *dev, struct mlx5_core_qp *qp);
612e126ba97SEli Cohen void mlx5_debug_qp_remove(struct mlx5_core_dev *dev, struct mlx5_core_qp *qp);
613e420f0c0SHaggai Eran #ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING
614e420f0c0SHaggai Eran int mlx5_core_page_fault_resume(struct mlx5_core_dev *dev, u32 qpn,
615e420f0c0SHaggai Eran 				u8 context, int error);
616e420f0c0SHaggai Eran #endif
617e126ba97SEli Cohen 
618db81a5c3SEli Cohen static inline const char *mlx5_qp_type_str(int type)
619db81a5c3SEli Cohen {
620db81a5c3SEli Cohen 	switch (type) {
621db81a5c3SEli Cohen 	case MLX5_QP_ST_RC: return "RC";
622db81a5c3SEli Cohen 	case MLX5_QP_ST_UC: return "C";
623db81a5c3SEli Cohen 	case MLX5_QP_ST_UD: return "UD";
624db81a5c3SEli Cohen 	case MLX5_QP_ST_XRC: return "XRC";
625db81a5c3SEli Cohen 	case MLX5_QP_ST_MLX: return "MLX";
626db81a5c3SEli Cohen 	case MLX5_QP_ST_QP0: return "QP0";
627db81a5c3SEli Cohen 	case MLX5_QP_ST_QP1: return "QP1";
628db81a5c3SEli Cohen 	case MLX5_QP_ST_RAW_ETHERTYPE: return "RAW_ETHERTYPE";
629db81a5c3SEli Cohen 	case MLX5_QP_ST_RAW_IPV6: return "RAW_IPV6";
630db81a5c3SEli Cohen 	case MLX5_QP_ST_SNIFFER: return "SNIFFER";
631db81a5c3SEli Cohen 	case MLX5_QP_ST_SYNC_UMR: return "SYNC_UMR";
632db81a5c3SEli Cohen 	case MLX5_QP_ST_PTP_1588: return "PTP_1588";
633db81a5c3SEli Cohen 	case MLX5_QP_ST_REG_UMR: return "REG_UMR";
634db81a5c3SEli Cohen 	default: return "Invalid transport type";
635db81a5c3SEli Cohen 	}
636db81a5c3SEli Cohen }
637db81a5c3SEli Cohen 
638db81a5c3SEli Cohen static inline const char *mlx5_qp_state_str(int state)
639db81a5c3SEli Cohen {
640db81a5c3SEli Cohen 	switch (state) {
641db81a5c3SEli Cohen 	case MLX5_QP_STATE_RST:
642db81a5c3SEli Cohen 	return "RST";
643db81a5c3SEli Cohen 	case MLX5_QP_STATE_INIT:
644db81a5c3SEli Cohen 	return "INIT";
645db81a5c3SEli Cohen 	case MLX5_QP_STATE_RTR:
646db81a5c3SEli Cohen 	return "RTR";
647db81a5c3SEli Cohen 	case MLX5_QP_STATE_RTS:
648db81a5c3SEli Cohen 	return "RTS";
649db81a5c3SEli Cohen 	case MLX5_QP_STATE_SQER:
650db81a5c3SEli Cohen 	return "SQER";
651db81a5c3SEli Cohen 	case MLX5_QP_STATE_SQD:
652db81a5c3SEli Cohen 	return "SQD";
653db81a5c3SEli Cohen 	case MLX5_QP_STATE_ERR:
654db81a5c3SEli Cohen 	return "ERR";
655db81a5c3SEli Cohen 	case MLX5_QP_STATE_SQ_DRAINING:
656db81a5c3SEli Cohen 	return "SQ_DRAINING";
657db81a5c3SEli Cohen 	case MLX5_QP_STATE_SUSPENDED:
658db81a5c3SEli Cohen 	return "SUSPENDED";
659db81a5c3SEli Cohen 	default: return "Invalid QP state";
660db81a5c3SEli Cohen 	}
661db81a5c3SEli Cohen }
662db81a5c3SEli Cohen 
663e126ba97SEli Cohen #endif /* MLX5_QP_H */
664