1*1f67b599SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 227e34995SRabin Vincent /* 327e34995SRabin Vincent * Copyright (C) ST-Ericsson SA 2010 427e34995SRabin Vincent * 527e34995SRabin Vincent * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson 627e34995SRabin Vincent */ 727e34995SRabin Vincent 827e34995SRabin Vincent #ifndef __LINUX_MFD_STMPE_H 927e34995SRabin Vincent #define __LINUX_MFD_STMPE_H 1027e34995SRabin Vincent 11313162d0SPaul Gortmaker #include <linux/mutex.h> 12313162d0SPaul Gortmaker 13063755abSPhilippe Schenker #define STMPE_SAMPLE_TIME(x) ((x & 0xf) << 4) 14063755abSPhilippe Schenker #define STMPE_MOD_12B(x) ((x & 0x1) << 3) 15063755abSPhilippe Schenker #define STMPE_REF_SEL(x) ((x & 0x1) << 1) 16063755abSPhilippe Schenker #define STMPE_ADC_FREQ(x) (x & 0x3) 17063755abSPhilippe Schenker #define STMPE_AVE_CTRL(x) ((x & 0x3) << 6) 18063755abSPhilippe Schenker #define STMPE_DET_DELAY(x) ((x & 0x7) << 3) 19063755abSPhilippe Schenker #define STMPE_SETTLING(x) (x & 0x7) 20063755abSPhilippe Schenker #define STMPE_FRACTION_Z(x) (x & 0x7) 21063755abSPhilippe Schenker #define STMPE_I_DRIVE(x) (x & 0x1) 22063755abSPhilippe Schenker #define STMPE_OP_MODE(x) ((x & 0x7) << 1) 23063755abSPhilippe Schenker 246377cfa3SStefan Agner #define STMPE811_REG_ADC_CTRL1 0x20 256377cfa3SStefan Agner #define STMPE811_REG_ADC_CTRL2 0x21 266377cfa3SStefan Agner 27313162d0SPaul Gortmaker struct device; 289c9e3214SLinus Walleij struct regulator; 2927e34995SRabin Vincent 3027e34995SRabin Vincent enum stmpe_block { 3127e34995SRabin Vincent STMPE_BLOCK_GPIO = 1 << 0, 3227e34995SRabin Vincent STMPE_BLOCK_KEYPAD = 1 << 1, 3327e34995SRabin Vincent STMPE_BLOCK_TOUCHSCREEN = 1 << 2, 3427e34995SRabin Vincent STMPE_BLOCK_ADC = 1 << 3, 3527e34995SRabin Vincent STMPE_BLOCK_PWM = 1 << 4, 3627e34995SRabin Vincent STMPE_BLOCK_ROTATOR = 1 << 5, 3727e34995SRabin Vincent }; 3827e34995SRabin Vincent 3927e34995SRabin Vincent enum stmpe_partnum { 401cda2394SViresh Kumar STMPE610, 417f7f4ea1SViresh Kumar STMPE801, 4227e34995SRabin Vincent STMPE811, 436bb9f0d9SPatrice Chotard STMPE1600, 4427e34995SRabin Vincent STMPE1601, 45230f13a5SJean-Nicolas Graux STMPE1801, 4627e34995SRabin Vincent STMPE2401, 4727e34995SRabin Vincent STMPE2403, 48e31f9b82SChris Blair STMPE_NBR_PARTS 4927e34995SRabin Vincent }; 5027e34995SRabin Vincent 5127e34995SRabin Vincent /* 5227e34995SRabin Vincent * For registers whose locations differ on variants, the correct address is 5327e34995SRabin Vincent * obtained by indexing stmpe->regs with one of the following. 5427e34995SRabin Vincent */ 5527e34995SRabin Vincent enum { 5627e34995SRabin Vincent STMPE_IDX_CHIP_ID, 570f4be8cfSPatrice Chotard STMPE_IDX_SYS_CTRL, 580f4be8cfSPatrice Chotard STMPE_IDX_SYS_CTRL2, 5927e34995SRabin Vincent STMPE_IDX_ICR_LSB, 6027e34995SRabin Vincent STMPE_IDX_IER_LSB, 61897ac667SPatrice Chotard STMPE_IDX_IER_MSB, 62230f13a5SJean-Nicolas Graux STMPE_IDX_ISR_LSB, 6327e34995SRabin Vincent STMPE_IDX_ISR_MSB, 6427e34995SRabin Vincent STMPE_IDX_GPMR_LSB, 65897ac667SPatrice Chotard STMPE_IDX_GPMR_CSB, 66897ac667SPatrice Chotard STMPE_IDX_GPMR_MSB, 6727e34995SRabin Vincent STMPE_IDX_GPSR_LSB, 68897ac667SPatrice Chotard STMPE_IDX_GPSR_CSB, 69897ac667SPatrice Chotard STMPE_IDX_GPSR_MSB, 7027e34995SRabin Vincent STMPE_IDX_GPCR_LSB, 71897ac667SPatrice Chotard STMPE_IDX_GPCR_CSB, 72897ac667SPatrice Chotard STMPE_IDX_GPCR_MSB, 7327e34995SRabin Vincent STMPE_IDX_GPDR_LSB, 74897ac667SPatrice Chotard STMPE_IDX_GPDR_CSB, 75897ac667SPatrice Chotard STMPE_IDX_GPDR_MSB, 76897ac667SPatrice Chotard STMPE_IDX_GPEDR_LSB, 77897ac667SPatrice Chotard STMPE_IDX_GPEDR_CSB, 7827e34995SRabin Vincent STMPE_IDX_GPEDR_MSB, 7927e34995SRabin Vincent STMPE_IDX_GPRER_LSB, 80897ac667SPatrice Chotard STMPE_IDX_GPRER_CSB, 81897ac667SPatrice Chotard STMPE_IDX_GPRER_MSB, 8227e34995SRabin Vincent STMPE_IDX_GPFER_LSB, 83897ac667SPatrice Chotard STMPE_IDX_GPFER_CSB, 84897ac667SPatrice Chotard STMPE_IDX_GPFER_MSB, 8580e1dd82SLinus Walleij STMPE_IDX_GPPUR_LSB, 8680e1dd82SLinus Walleij STMPE_IDX_GPPDR_LSB, 8727e34995SRabin Vincent STMPE_IDX_GPAFR_U_MSB, 8827e34995SRabin Vincent STMPE_IDX_IEGPIOR_LSB, 89897ac667SPatrice Chotard STMPE_IDX_IEGPIOR_CSB, 90897ac667SPatrice Chotard STMPE_IDX_IEGPIOR_MSB, 91230f13a5SJean-Nicolas Graux STMPE_IDX_ISGPIOR_LSB, 92897ac667SPatrice Chotard STMPE_IDX_ISGPIOR_CSB, 9327e34995SRabin Vincent STMPE_IDX_ISGPIOR_MSB, 9427e34995SRabin Vincent STMPE_IDX_MAX, 9527e34995SRabin Vincent }; 9627e34995SRabin Vincent 9727e34995SRabin Vincent 9827e34995SRabin Vincent struct stmpe_variant_info; 991a6e4b74SViresh Kumar struct stmpe_client_info; 100fc1882dcSLinus Walleij struct stmpe_platform_data; 10127e34995SRabin Vincent 10227e34995SRabin Vincent /** 10327e34995SRabin Vincent * struct stmpe - STMPE MFD structure 1049c9e3214SLinus Walleij * @vcc: optional VCC regulator 1059c9e3214SLinus Walleij * @vio: optional VIO regulator 10627e34995SRabin Vincent * @lock: lock protecting I/O operations 10727e34995SRabin Vincent * @irq_lock: IRQ bus lock 10827e34995SRabin Vincent * @dev: device, mostly for dev_dbg() 10976f93992SLee Jones * @irq_domain: IRQ domain 1101a6e4b74SViresh Kumar * @client: client - i2c or spi 1111a6e4b74SViresh Kumar * @ci: client specific information 1124dcaa6b6SOm Prakash * @partnum: part number 11327e34995SRabin Vincent * @variant: the detected STMPE model number 11427e34995SRabin Vincent * @regs: list of addresses of registers which are at different addresses on 11527e34995SRabin Vincent * different variants. Indexed by one of STMPE_IDX_*. 11673de16dbSViresh Kumar * @irq: irq number for stmpe 11727e34995SRabin Vincent * @num_gpios: number of gpios, differs for variants 11827e34995SRabin Vincent * @ier: cache of IER registers for bus_lock 11927e34995SRabin Vincent * @oldier: cache of IER registers for bus_lock 12027e34995SRabin Vincent * @pdata: platform data 12127e34995SRabin Vincent */ 12227e34995SRabin Vincent struct stmpe { 1239c9e3214SLinus Walleij struct regulator *vcc; 1249c9e3214SLinus Walleij struct regulator *vio; 12527e34995SRabin Vincent struct mutex lock; 12627e34995SRabin Vincent struct mutex irq_lock; 12727e34995SRabin Vincent struct device *dev; 12876f93992SLee Jones struct irq_domain *domain; 1291a6e4b74SViresh Kumar void *client; 1301a6e4b74SViresh Kumar struct stmpe_client_info *ci; 13127e34995SRabin Vincent enum stmpe_partnum partnum; 13227e34995SRabin Vincent struct stmpe_variant_info *variant; 13327e34995SRabin Vincent const u8 *regs; 13427e34995SRabin Vincent 13573de16dbSViresh Kumar int irq; 13627e34995SRabin Vincent int num_gpios; 13727e34995SRabin Vincent u8 ier[2]; 13827e34995SRabin Vincent u8 oldier[2]; 13927e34995SRabin Vincent struct stmpe_platform_data *pdata; 1406377cfa3SStefan Agner 1416377cfa3SStefan Agner /* For devices that use an ADC */ 1426377cfa3SStefan Agner u8 sample_time; 1436377cfa3SStefan Agner u8 mod_12b; 1446377cfa3SStefan Agner u8 ref_sel; 1456377cfa3SStefan Agner u8 adc_freq; 14627e34995SRabin Vincent }; 14727e34995SRabin Vincent 14827e34995SRabin Vincent extern int stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 data); 14927e34995SRabin Vincent extern int stmpe_reg_read(struct stmpe *stmpe, u8 reg); 15027e34995SRabin Vincent extern int stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length, 15127e34995SRabin Vincent u8 *values); 15227e34995SRabin Vincent extern int stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length, 15327e34995SRabin Vincent const u8 *values); 15427e34995SRabin Vincent extern int stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val); 15527e34995SRabin Vincent extern int stmpe_set_altfunc(struct stmpe *stmpe, u32 pins, 15627e34995SRabin Vincent enum stmpe_block block); 15727e34995SRabin Vincent extern int stmpe_enable(struct stmpe *stmpe, unsigned int blocks); 15827e34995SRabin Vincent extern int stmpe_disable(struct stmpe *stmpe, unsigned int blocks); 1596377cfa3SStefan Agner extern int stmpe811_adc_common_init(struct stmpe *stmpe); 16027e34995SRabin Vincent 161b8e9cf0bSWolfram Sang #define STMPE_GPIO_NOREQ_811_TOUCH (0xf0) 162b8e9cf0bSWolfram Sang 16327e34995SRabin Vincent #endif 164