1 /* 2 * Copyright (c) 2013 Samsung Electronics Co., Ltd 3 * http://www.samsung.com 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License as published by the 7 * Free Software Foundation; either version 2 of the License, or (at your 8 * option) any later version. 9 * 10 */ 11 12 #ifndef __LINUX_MFD_S2MPA01_H 13 #define __LINUX_MFD_S2MPA01_H 14 15 /* S2MPA01 registers */ 16 enum s2mpa01_reg { 17 S2MPA01_REG_ID, 18 S2MPA01_REG_INT1, 19 S2MPA01_REG_INT2, 20 S2MPA01_REG_INT3, 21 S2MPA01_REG_INT1M, 22 S2MPA01_REG_INT2M, 23 S2MPA01_REG_INT3M, 24 S2MPA01_REG_ST1, 25 S2MPA01_REG_ST2, 26 S2MPA01_REG_PWRONSRC, 27 S2MPA01_REG_OFFSRC, 28 S2MPA01_REG_RTC_BUF, 29 S2MPA01_REG_CTRL1, 30 S2MPA01_REG_ETC_TEST, 31 S2MPA01_REG_RSVD1, 32 S2MPA01_REG_BU_CHG, 33 S2MPA01_REG_RAMP1, 34 S2MPA01_REG_RAMP2, 35 S2MPA01_REG_LDO_DSCH1, 36 S2MPA01_REG_LDO_DSCH2, 37 S2MPA01_REG_LDO_DSCH3, 38 S2MPA01_REG_LDO_DSCH4, 39 S2MPA01_REG_OTP_ADRL, 40 S2MPA01_REG_OTP_ADRH, 41 S2MPA01_REG_OTP_DATA, 42 S2MPA01_REG_MON1SEL, 43 S2MPA01_REG_MON2SEL, 44 S2MPA01_REG_LEE, 45 S2MPA01_REG_RSVD2, 46 S2MPA01_REG_RSVD3, 47 S2MPA01_REG_RSVD4, 48 S2MPA01_REG_RSVD5, 49 S2MPA01_REG_RSVD6, 50 S2MPA01_REG_TOP_RSVD, 51 S2MPA01_REG_DVS_SEL, 52 S2MPA01_REG_DVS_PTR, 53 S2MPA01_REG_DVS_DATA, 54 S2MPA01_REG_RSVD_NO, 55 S2MPA01_REG_UVLO, 56 S2MPA01_REG_LEE_NO, 57 S2MPA01_REG_B1CTRL1, 58 S2MPA01_REG_B1CTRL2, 59 S2MPA01_REG_B2CTRL1, 60 S2MPA01_REG_B2CTRL2, 61 S2MPA01_REG_B3CTRL1, 62 S2MPA01_REG_B3CTRL2, 63 S2MPA01_REG_B4CTRL1, 64 S2MPA01_REG_B4CTRL2, 65 S2MPA01_REG_B5CTRL1, 66 S2MPA01_REG_B5CTRL2, 67 S2MPA01_REG_B5CTRL3, 68 S2MPA01_REG_B5CTRL4, 69 S2MPA01_REG_B5CTRL5, 70 S2MPA01_REG_B5CTRL6, 71 S2MPA01_REG_B6CTRL1, 72 S2MPA01_REG_B6CTRL2, 73 S2MPA01_REG_B7CTRL1, 74 S2MPA01_REG_B7CTRL2, 75 S2MPA01_REG_B8CTRL1, 76 S2MPA01_REG_B8CTRL2, 77 S2MPA01_REG_B9CTRL1, 78 S2MPA01_REG_B9CTRL2, 79 S2MPA01_REG_B10CTRL1, 80 S2MPA01_REG_B10CTRL2, 81 S2MPA01_REG_L1CTRL, 82 S2MPA01_REG_L2CTRL, 83 S2MPA01_REG_L3CTRL, 84 S2MPA01_REG_L4CTRL, 85 S2MPA01_REG_L5CTRL, 86 S2MPA01_REG_L6CTRL, 87 S2MPA01_REG_L7CTRL, 88 S2MPA01_REG_L8CTRL, 89 S2MPA01_REG_L9CTRL, 90 S2MPA01_REG_L10CTRL, 91 S2MPA01_REG_L11CTRL, 92 S2MPA01_REG_L12CTRL, 93 S2MPA01_REG_L13CTRL, 94 S2MPA01_REG_L14CTRL, 95 S2MPA01_REG_L15CTRL, 96 S2MPA01_REG_L16CTRL, 97 S2MPA01_REG_L17CTRL, 98 S2MPA01_REG_L18CTRL, 99 S2MPA01_REG_L19CTRL, 100 S2MPA01_REG_L20CTRL, 101 S2MPA01_REG_L21CTRL, 102 S2MPA01_REG_L22CTRL, 103 S2MPA01_REG_L23CTRL, 104 S2MPA01_REG_L24CTRL, 105 S2MPA01_REG_L25CTRL, 106 S2MPA01_REG_L26CTRL, 107 108 S2MPA01_REG_LDO_OVCB1, 109 S2MPA01_REG_LDO_OVCB2, 110 S2MPA01_REG_LDO_OVCB3, 111 S2MPA01_REG_LDO_OVCB4, 112 113 }; 114 115 /* S2MPA01 regulator ids */ 116 enum s2mpa01_regulators { 117 S2MPA01_LDO1, 118 S2MPA01_LDO2, 119 S2MPA01_LDO3, 120 S2MPA01_LDO4, 121 S2MPA01_LDO5, 122 S2MPA01_LDO6, 123 S2MPA01_LDO7, 124 S2MPA01_LDO8, 125 S2MPA01_LDO9, 126 S2MPA01_LDO10, 127 S2MPA01_LDO11, 128 S2MPA01_LDO12, 129 S2MPA01_LDO13, 130 S2MPA01_LDO14, 131 S2MPA01_LDO15, 132 S2MPA01_LDO16, 133 S2MPA01_LDO17, 134 S2MPA01_LDO18, 135 S2MPA01_LDO19, 136 S2MPA01_LDO20, 137 S2MPA01_LDO21, 138 S2MPA01_LDO22, 139 S2MPA01_LDO23, 140 S2MPA01_LDO24, 141 S2MPA01_LDO25, 142 S2MPA01_LDO26, 143 144 S2MPA01_BUCK1, 145 S2MPA01_BUCK2, 146 S2MPA01_BUCK3, 147 S2MPA01_BUCK4, 148 S2MPA01_BUCK5, 149 S2MPA01_BUCK6, 150 S2MPA01_BUCK7, 151 S2MPA01_BUCK8, 152 S2MPA01_BUCK9, 153 S2MPA01_BUCK10, 154 155 S2MPA01_REGULATOR_MAX, 156 }; 157 158 #define S2MPA01_LDO_VSEL_MASK 0x3F 159 #define S2MPA01_BUCK_VSEL_MASK 0xFF 160 #define S2MPA01_ENABLE_MASK (0x03 << S2MPA01_ENABLE_SHIFT) 161 #define S2MPA01_ENABLE_SHIFT 0x06 162 #define S2MPA01_LDO_N_VOLTAGES (S2MPA01_LDO_VSEL_MASK + 1) 163 #define S2MPA01_BUCK_N_VOLTAGES (S2MPA01_BUCK_VSEL_MASK + 1) 164 165 #define S2MPA01_RAMP_DELAY 12500 /* uV/us */ 166 167 #define S2MPA01_BUCK16_RAMP_SHIFT 4 168 #define S2MPA01_BUCK24_RAMP_SHIFT 6 169 #define S2MPA01_BUCK3_RAMP_SHIFT 4 170 #define S2MPA01_BUCK5_RAMP_SHIFT 6 171 #define S2MPA01_BUCK7_RAMP_SHIFT 2 172 #define S2MPA01_BUCK8910_RAMP_SHIFT 0 173 174 #define S2MPA01_BUCK1_RAMP_EN_SHIFT 3 175 #define S2MPA01_BUCK2_RAMP_EN_SHIFT 2 176 #define S2MPA01_BUCK3_RAMP_EN_SHIFT 1 177 #define S2MPA01_BUCK4_RAMP_EN_SHIFT 0 178 #define S2MPA01_PMIC_EN_SHIFT 6 179 180 #endif /*__LINUX_MFD_S2MPA01_H */ 181