1*de58cee8SFabien Parent /* SPDX-License-Identifier: GPL-2.0-only */ 2*de58cee8SFabien Parent /* 3*de58cee8SFabien Parent * Copyright (c) 2022 BayLibre, SAS 4*de58cee8SFabien Parent * Author: Fabien Parent <fparent@baylibre.com> 5*de58cee8SFabien Parent */ 6*de58cee8SFabien Parent 7*de58cee8SFabien Parent #ifndef __MFD_MT6357_CORE_H__ 8*de58cee8SFabien Parent #define __MFD_MT6357_CORE_H__ 9*de58cee8SFabien Parent 10*de58cee8SFabien Parent enum mt6357_irq_top_status_shift { 11*de58cee8SFabien Parent MT6357_BUCK_TOP = 0, 12*de58cee8SFabien Parent MT6357_LDO_TOP, 13*de58cee8SFabien Parent MT6357_PSC_TOP, 14*de58cee8SFabien Parent MT6357_SCK_TOP, 15*de58cee8SFabien Parent MT6357_BM_TOP, 16*de58cee8SFabien Parent MT6357_HK_TOP, 17*de58cee8SFabien Parent MT6357_XPP_TOP, 18*de58cee8SFabien Parent MT6357_AUD_TOP, 19*de58cee8SFabien Parent MT6357_MISC_TOP, 20*de58cee8SFabien Parent }; 21*de58cee8SFabien Parent 22*de58cee8SFabien Parent enum mt6357_irq_numbers { 23*de58cee8SFabien Parent MT6357_IRQ_VPROC_OC = 0, 24*de58cee8SFabien Parent MT6357_IRQ_VCORE_OC, 25*de58cee8SFabien Parent MT6357_IRQ_VMODEM_OC, 26*de58cee8SFabien Parent MT6357_IRQ_VS1_OC, 27*de58cee8SFabien Parent MT6357_IRQ_VPA_OC, 28*de58cee8SFabien Parent MT6357_IRQ_VCORE_PREOC, 29*de58cee8SFabien Parent MT6357_IRQ_VFE28_OC = 16, 30*de58cee8SFabien Parent MT6357_IRQ_VXO22_OC, 31*de58cee8SFabien Parent MT6357_IRQ_VRF18_OC, 32*de58cee8SFabien Parent MT6357_IRQ_VRF12_OC, 33*de58cee8SFabien Parent MT6357_IRQ_VEFUSE_OC, 34*de58cee8SFabien Parent MT6357_IRQ_VCN33_OC, 35*de58cee8SFabien Parent MT6357_IRQ_VCN28_OC, 36*de58cee8SFabien Parent MT6357_IRQ_VCN18_OC, 37*de58cee8SFabien Parent MT6357_IRQ_VCAMA_OC, 38*de58cee8SFabien Parent MT6357_IRQ_VCAMD_OC, 39*de58cee8SFabien Parent MT6357_IRQ_VCAMIO_OC, 40*de58cee8SFabien Parent MT6357_IRQ_VLDO28_OC, 41*de58cee8SFabien Parent MT6357_IRQ_VUSB33_OC, 42*de58cee8SFabien Parent MT6357_IRQ_VAUX18_OC, 43*de58cee8SFabien Parent MT6357_IRQ_VAUD28_OC, 44*de58cee8SFabien Parent MT6357_IRQ_VIO28_OC, 45*de58cee8SFabien Parent MT6357_IRQ_VIO18_OC, 46*de58cee8SFabien Parent MT6357_IRQ_VSRAM_PROC_OC, 47*de58cee8SFabien Parent MT6357_IRQ_VSRAM_OTHERS_OC, 48*de58cee8SFabien Parent MT6357_IRQ_VIBR_OC, 49*de58cee8SFabien Parent MT6357_IRQ_VDRAM_OC, 50*de58cee8SFabien Parent MT6357_IRQ_VMC_OC, 51*de58cee8SFabien Parent MT6357_IRQ_VMCH_OC, 52*de58cee8SFabien Parent MT6357_IRQ_VEMC_OC, 53*de58cee8SFabien Parent MT6357_IRQ_VSIM1_OC, 54*de58cee8SFabien Parent MT6357_IRQ_VSIM2_OC, 55*de58cee8SFabien Parent MT6357_IRQ_PWRKEY = 48, 56*de58cee8SFabien Parent MT6357_IRQ_HOMEKEY, 57*de58cee8SFabien Parent MT6357_IRQ_PWRKEY_R, 58*de58cee8SFabien Parent MT6357_IRQ_HOMEKEY_R, 59*de58cee8SFabien Parent MT6357_IRQ_NI_LBAT_INT, 60*de58cee8SFabien Parent MT6357_IRQ_CHRDET, 61*de58cee8SFabien Parent MT6357_IRQ_CHRDET_EDGE, 62*de58cee8SFabien Parent MT6357_IRQ_VCDT_HV_DET, 63*de58cee8SFabien Parent MT6357_IRQ_WATCHDOG, 64*de58cee8SFabien Parent MT6357_IRQ_VBATON_UNDET, 65*de58cee8SFabien Parent MT6357_IRQ_BVALID_DET, 66*de58cee8SFabien Parent MT6357_IRQ_OV, 67*de58cee8SFabien Parent MT6357_IRQ_RTC = 64, 68*de58cee8SFabien Parent MT6357_IRQ_FG_BAT0_H = 80, 69*de58cee8SFabien Parent MT6357_IRQ_FG_BAT0_L, 70*de58cee8SFabien Parent MT6357_IRQ_FG_CUR_H, 71*de58cee8SFabien Parent MT6357_IRQ_FG_CUR_L, 72*de58cee8SFabien Parent MT6357_IRQ_FG_ZCV, 73*de58cee8SFabien Parent MT6357_IRQ_BATON_LV = 96, 74*de58cee8SFabien Parent MT6357_IRQ_BATON_HT, 75*de58cee8SFabien Parent MT6357_IRQ_BAT_H = 112, 76*de58cee8SFabien Parent MT6357_IRQ_BAT_L, 77*de58cee8SFabien Parent MT6357_IRQ_AUXADC_IMP, 78*de58cee8SFabien Parent MT6357_IRQ_NAG_C_DLTV, 79*de58cee8SFabien Parent MT6357_IRQ_AUDIO = 128, 80*de58cee8SFabien Parent MT6357_IRQ_ACCDET = 133, 81*de58cee8SFabien Parent MT6357_IRQ_ACCDET_EINT0, 82*de58cee8SFabien Parent MT6357_IRQ_ACCDET_EINT1, 83*de58cee8SFabien Parent MT6357_IRQ_SPI_CMD_ALERT = 144, 84*de58cee8SFabien Parent MT6357_IRQ_NR, 85*de58cee8SFabien Parent }; 86*de58cee8SFabien Parent 87*de58cee8SFabien Parent #define MT6357_IRQ_BUCK_BASE MT6357_IRQ_VPROC_OC 88*de58cee8SFabien Parent #define MT6357_IRQ_LDO_BASE MT6357_IRQ_VFE28_OC 89*de58cee8SFabien Parent #define MT6357_IRQ_PSC_BASE MT6357_IRQ_PWRKEY 90*de58cee8SFabien Parent #define MT6357_IRQ_SCK_BASE MT6357_IRQ_RTC 91*de58cee8SFabien Parent #define MT6357_IRQ_BM_BASE MT6357_IRQ_FG_BAT0_H 92*de58cee8SFabien Parent #define MT6357_IRQ_HK_BASE MT6357_IRQ_BAT_H 93*de58cee8SFabien Parent #define MT6357_IRQ_AUD_BASE MT6357_IRQ_AUDIO 94*de58cee8SFabien Parent #define MT6357_IRQ_MISC_BASE MT6357_IRQ_SPI_CMD_ALERT 95*de58cee8SFabien Parent 96*de58cee8SFabien Parent #define MT6357_IRQ_BUCK_BITS (MT6357_IRQ_VCORE_PREOC - MT6357_IRQ_BUCK_BASE + 1) 97*de58cee8SFabien Parent #define MT6357_IRQ_LDO_BITS (MT6357_IRQ_VSIM2_OC - MT6357_IRQ_LDO_BASE + 1) 98*de58cee8SFabien Parent #define MT6357_IRQ_PSC_BITS (MT6357_IRQ_VCDT_HV_DET - MT6357_IRQ_PSC_BASE + 1) 99*de58cee8SFabien Parent #define MT6357_IRQ_SCK_BITS (MT6357_IRQ_RTC - MT6357_IRQ_SCK_BASE + 1) 100*de58cee8SFabien Parent #define MT6357_IRQ_BM_BITS (MT6357_IRQ_BATON_HT - MT6357_IRQ_BM_BASE + 1) 101*de58cee8SFabien Parent #define MT6357_IRQ_HK_BITS (MT6357_IRQ_NAG_C_DLTV - MT6357_IRQ_HK_BASE + 1) 102*de58cee8SFabien Parent #define MT6357_IRQ_AUD_BITS (MT6357_IRQ_ACCDET_EINT1 - MT6357_IRQ_AUD_BASE + 1) 103*de58cee8SFabien Parent #define MT6357_IRQ_MISC_BITS \ 104*de58cee8SFabien Parent (MT6357_IRQ_SPI_CMD_ALERT - MT6357_IRQ_MISC_BASE + 1) 105*de58cee8SFabien Parent 106*de58cee8SFabien Parent #define MT6357_TOP_GEN(sp) \ 107*de58cee8SFabien Parent { \ 108*de58cee8SFabien Parent .hwirq_base = MT6357_IRQ_##sp##_BASE, \ 109*de58cee8SFabien Parent .num_int_regs = \ 110*de58cee8SFabien Parent ((MT6357_IRQ_##sp##_BITS - 1) / \ 111*de58cee8SFabien Parent MTK_PMIC_REG_WIDTH) + 1, \ 112*de58cee8SFabien Parent .en_reg = MT6357_##sp##_TOP_INT_CON0, \ 113*de58cee8SFabien Parent .en_reg_shift = 0x6, \ 114*de58cee8SFabien Parent .sta_reg = MT6357_##sp##_TOP_INT_STATUS0, \ 115*de58cee8SFabien Parent .sta_reg_shift = 0x2, \ 116*de58cee8SFabien Parent .top_offset = MT6357_##sp##_TOP, \ 117*de58cee8SFabien Parent } 118*de58cee8SFabien Parent 119*de58cee8SFabien Parent #endif /* __MFD_MT6357_CORE_H__ */ 120