xref: /linux/include/linux/mfd/ac100.h (revision d2912cb15bdda8ba4a5dd73396ad62641af2f520)
1*d2912cb1SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */
2585083c5SChen-Yu Tsai /*
3585083c5SChen-Yu Tsai  * Functions and registers to access AC100 codec / RTC combo IC.
4585083c5SChen-Yu Tsai  *
5585083c5SChen-Yu Tsai  * Copyright (C) 2016 Chen-Yu Tsai
6585083c5SChen-Yu Tsai  *
7585083c5SChen-Yu Tsai  * Chen-Yu Tsai <wens@csie.org>
8585083c5SChen-Yu Tsai  */
9585083c5SChen-Yu Tsai 
10585083c5SChen-Yu Tsai #ifndef __LINUX_MFD_AC100_H
11585083c5SChen-Yu Tsai #define __LINUX_MFD_AC100_H
12585083c5SChen-Yu Tsai 
13585083c5SChen-Yu Tsai #include <linux/regmap.h>
14585083c5SChen-Yu Tsai 
15585083c5SChen-Yu Tsai struct ac100_dev {
16585083c5SChen-Yu Tsai 	struct device			*dev;
17585083c5SChen-Yu Tsai 	struct regmap			*regmap;
18585083c5SChen-Yu Tsai };
19585083c5SChen-Yu Tsai 
20585083c5SChen-Yu Tsai /* Audio codec related registers */
21585083c5SChen-Yu Tsai #define AC100_CHIP_AUDIO_RST		0x00
22585083c5SChen-Yu Tsai #define AC100_PLL_CTRL1			0x01
23585083c5SChen-Yu Tsai #define AC100_PLL_CTRL2			0x02
24585083c5SChen-Yu Tsai #define AC100_SYSCLK_CTRL		0x03
25585083c5SChen-Yu Tsai #define AC100_MOD_CLK_ENA		0x04
26585083c5SChen-Yu Tsai #define AC100_MOD_RST_CTRL		0x05
27585083c5SChen-Yu Tsai #define AC100_I2S_SR_CTRL		0x06
28585083c5SChen-Yu Tsai 
29585083c5SChen-Yu Tsai /* I2S1 interface */
30585083c5SChen-Yu Tsai #define AC100_I2S1_CLK_CTRL		0x10
31585083c5SChen-Yu Tsai #define AC100_I2S1_SND_OUT_CTRL		0x11
32585083c5SChen-Yu Tsai #define AC100_I2S1_SND_IN_CTRL		0x12
33585083c5SChen-Yu Tsai #define AC100_I2S1_MXR_SRC		0x13
34585083c5SChen-Yu Tsai #define AC100_I2S1_VOL_CTRL1		0x14
35585083c5SChen-Yu Tsai #define AC100_I2S1_VOL_CTRL2		0x15
36585083c5SChen-Yu Tsai #define AC100_I2S1_VOL_CTRL3		0x16
37585083c5SChen-Yu Tsai #define AC100_I2S1_VOL_CTRL4		0x17
38585083c5SChen-Yu Tsai #define AC100_I2S1_MXR_GAIN		0x18
39585083c5SChen-Yu Tsai 
40585083c5SChen-Yu Tsai /* I2S2 interface */
41585083c5SChen-Yu Tsai #define AC100_I2S2_CLK_CTRL		0x20
42585083c5SChen-Yu Tsai #define AC100_I2S2_SND_OUT_CTRL		0x21
43585083c5SChen-Yu Tsai #define AC100_I2S2_SND_IN_CTRL		0x22
44585083c5SChen-Yu Tsai #define AC100_I2S2_MXR_SRC		0x23
45585083c5SChen-Yu Tsai #define AC100_I2S2_VOL_CTRL1		0x24
46585083c5SChen-Yu Tsai #define AC100_I2S2_VOL_CTRL2		0x25
47585083c5SChen-Yu Tsai #define AC100_I2S2_VOL_CTRL3		0x26
48585083c5SChen-Yu Tsai #define AC100_I2S2_VOL_CTRL4		0x27
49585083c5SChen-Yu Tsai #define AC100_I2S2_MXR_GAIN		0x28
50585083c5SChen-Yu Tsai 
51585083c5SChen-Yu Tsai /* I2S3 interface */
52585083c5SChen-Yu Tsai #define AC100_I2S3_CLK_CTRL		0x30
53585083c5SChen-Yu Tsai #define AC100_I2S3_SND_OUT_CTRL		0x31
54585083c5SChen-Yu Tsai #define AC100_I2S3_SND_IN_CTRL		0x32
55585083c5SChen-Yu Tsai #define AC100_I2S3_SIG_PATH_CTRL	0x33
56585083c5SChen-Yu Tsai 
57585083c5SChen-Yu Tsai /* ADC digital controls */
58585083c5SChen-Yu Tsai #define AC100_ADC_DIG_CTRL		0x40
59585083c5SChen-Yu Tsai #define AC100_ADC_VOL_CTRL		0x41
60585083c5SChen-Yu Tsai 
61585083c5SChen-Yu Tsai /* HMIC plug sensing / key detection */
62585083c5SChen-Yu Tsai #define AC100_HMIC_CTRL1		0x44
63585083c5SChen-Yu Tsai #define AC100_HMIC_CTRL2		0x45
64585083c5SChen-Yu Tsai #define AC100_HMIC_STATUS		0x46
65585083c5SChen-Yu Tsai 
66585083c5SChen-Yu Tsai /* DAC digital controls */
67585083c5SChen-Yu Tsai #define AC100_DAC_DIG_CTRL		0x48
68585083c5SChen-Yu Tsai #define AC100_DAC_VOL_CTRL		0x49
69585083c5SChen-Yu Tsai #define AC100_DAC_MXR_SRC		0x4c
70585083c5SChen-Yu Tsai #define AC100_DAC_MXR_GAIN		0x4d
71585083c5SChen-Yu Tsai 
72585083c5SChen-Yu Tsai /* Analog controls */
73585083c5SChen-Yu Tsai #define AC100_ADC_APC_CTRL		0x50
74585083c5SChen-Yu Tsai #define AC100_ADC_SRC			0x51
75585083c5SChen-Yu Tsai #define AC100_ADC_SRC_BST_CTRL		0x52
76585083c5SChen-Yu Tsai #define AC100_OUT_MXR_DAC_A_CTRL	0x53
77585083c5SChen-Yu Tsai #define AC100_OUT_MXR_SRC		0x54
78585083c5SChen-Yu Tsai #define AC100_OUT_MXR_SRC_BST		0x55
79585083c5SChen-Yu Tsai #define AC100_HPOUT_CTRL		0x56
80585083c5SChen-Yu Tsai #define AC100_ERPOUT_CTRL		0x57
81585083c5SChen-Yu Tsai #define AC100_SPKOUT_CTRL		0x58
82585083c5SChen-Yu Tsai #define AC100_LINEOUT_CTRL		0x59
83585083c5SChen-Yu Tsai 
84585083c5SChen-Yu Tsai /* ADC digital audio processing (high pass filter & auto gain control */
85585083c5SChen-Yu Tsai #define AC100_ADC_DAP_L_STA		0x80
86585083c5SChen-Yu Tsai #define AC100_ADC_DAP_R_STA		0x81
87585083c5SChen-Yu Tsai #define AC100_ADC_DAP_L_CTRL		0x82
88585083c5SChen-Yu Tsai #define AC100_ADC_DAP_R_CTRL		0x83
89585083c5SChen-Yu Tsai #define AC100_ADC_DAP_L_T_L		0x84 /* Left Target Level */
90585083c5SChen-Yu Tsai #define AC100_ADC_DAP_R_T_L		0x85 /* Right Target Level */
91585083c5SChen-Yu Tsai #define AC100_ADC_DAP_L_H_A_C		0x86 /* Left High Avg. Coef */
92585083c5SChen-Yu Tsai #define AC100_ADC_DAP_L_L_A_C		0x87 /* Left Low Avg. Coef */
93585083c5SChen-Yu Tsai #define AC100_ADC_DAP_R_H_A_C		0x88 /* Right High Avg. Coef */
94585083c5SChen-Yu Tsai #define AC100_ADC_DAP_R_L_A_C		0x89 /* Right Low Avg. Coef */
95585083c5SChen-Yu Tsai #define AC100_ADC_DAP_L_D_T		0x8a /* Left Decay Time */
96585083c5SChen-Yu Tsai #define AC100_ADC_DAP_L_A_T		0x8b /* Left Attack Time */
97585083c5SChen-Yu Tsai #define AC100_ADC_DAP_R_D_T		0x8c /* Right Decay Time */
98585083c5SChen-Yu Tsai #define AC100_ADC_DAP_R_A_T		0x8d /* Right Attack Time */
99585083c5SChen-Yu Tsai #define AC100_ADC_DAP_N_TH		0x8e /* Noise Threshold */
100585083c5SChen-Yu Tsai #define AC100_ADC_DAP_L_H_N_A_C		0x8f /* Left High Noise Avg. Coef */
101585083c5SChen-Yu Tsai #define AC100_ADC_DAP_L_L_N_A_C		0x90 /* Left Low Noise Avg. Coef */
102585083c5SChen-Yu Tsai #define AC100_ADC_DAP_R_H_N_A_C		0x91 /* Right High Noise Avg. Coef */
103585083c5SChen-Yu Tsai #define AC100_ADC_DAP_R_L_N_A_C		0x92 /* Right Low Noise Avg. Coef */
104585083c5SChen-Yu Tsai #define AC100_ADC_DAP_H_HPF_C		0x93 /* High High-Pass-Filter Coef */
105585083c5SChen-Yu Tsai #define AC100_ADC_DAP_L_HPF_C		0x94 /* Low High-Pass-Filter Coef */
106585083c5SChen-Yu Tsai #define AC100_ADC_DAP_OPT		0x95 /* AGC Optimum */
107585083c5SChen-Yu Tsai 
108585083c5SChen-Yu Tsai /* DAC digital audio processing (high pass filter & dynamic range control) */
109585083c5SChen-Yu Tsai #define AC100_DAC_DAP_CTRL		0xa0
110585083c5SChen-Yu Tsai #define AC100_DAC_DAP_H_HPF_C		0xa1 /* High High-Pass-Filter Coef */
111585083c5SChen-Yu Tsai #define AC100_DAC_DAP_L_HPF_C		0xa2 /* Low High-Pass-Filter Coef */
112585083c5SChen-Yu Tsai #define AC100_DAC_DAP_L_H_E_A_C		0xa3 /* Left High Energy Avg Coef */
113585083c5SChen-Yu Tsai #define AC100_DAC_DAP_L_L_E_A_C		0xa4 /* Left Low Energy Avg Coef */
114585083c5SChen-Yu Tsai #define AC100_DAC_DAP_R_H_E_A_C		0xa5 /* Right High Energy Avg Coef */
115585083c5SChen-Yu Tsai #define AC100_DAC_DAP_R_L_E_A_C		0xa6 /* Right Low Energy Avg Coef */
116585083c5SChen-Yu Tsai #define AC100_DAC_DAP_H_G_D_T_C		0xa7 /* High Gain Delay Time Coef */
117585083c5SChen-Yu Tsai #define AC100_DAC_DAP_L_G_D_T_C		0xa8 /* Low Gain Delay Time Coef */
118585083c5SChen-Yu Tsai #define AC100_DAC_DAP_H_G_A_T_C		0xa9 /* High Gain Attack Time Coef */
119585083c5SChen-Yu Tsai #define AC100_DAC_DAP_L_G_A_T_C		0xaa /* Low Gain Attack Time Coef */
120585083c5SChen-Yu Tsai #define AC100_DAC_DAP_H_E_TH		0xab /* High Energy Threshold */
121585083c5SChen-Yu Tsai #define AC100_DAC_DAP_L_E_TH		0xac /* Low Energy Threshold */
122585083c5SChen-Yu Tsai #define AC100_DAC_DAP_H_G_K		0xad /* High Gain K parameter */
123585083c5SChen-Yu Tsai #define AC100_DAC_DAP_L_G_K		0xae /* Low Gain K parameter */
124585083c5SChen-Yu Tsai #define AC100_DAC_DAP_H_G_OFF		0xaf /* High Gain offset */
125585083c5SChen-Yu Tsai #define AC100_DAC_DAP_L_G_OFF		0xb0 /* Low Gain offset */
126585083c5SChen-Yu Tsai #define AC100_DAC_DAP_OPT		0xb1 /* DRC optimum */
127585083c5SChen-Yu Tsai 
128585083c5SChen-Yu Tsai /* Digital audio processing enable */
129585083c5SChen-Yu Tsai #define AC100_ADC_DAP_ENA		0xb4
130585083c5SChen-Yu Tsai #define AC100_DAC_DAP_ENA		0xb5
131585083c5SChen-Yu Tsai 
132585083c5SChen-Yu Tsai /* SRC control */
133585083c5SChen-Yu Tsai #define AC100_SRC1_CTRL1		0xb8
134585083c5SChen-Yu Tsai #define AC100_SRC1_CTRL2		0xb9
135585083c5SChen-Yu Tsai #define AC100_SRC1_CTRL3		0xba
136585083c5SChen-Yu Tsai #define AC100_SRC1_CTRL4		0xbb
137585083c5SChen-Yu Tsai #define AC100_SRC2_CTRL1		0xbc
138585083c5SChen-Yu Tsai #define AC100_SRC2_CTRL2		0xbd
139585083c5SChen-Yu Tsai #define AC100_SRC2_CTRL3		0xbe
140585083c5SChen-Yu Tsai #define AC100_SRC2_CTRL4		0xbf
141585083c5SChen-Yu Tsai 
142585083c5SChen-Yu Tsai /* RTC clk control */
143585083c5SChen-Yu Tsai #define AC100_CLK32K_ANALOG_CTRL	0xc0
144585083c5SChen-Yu Tsai #define AC100_CLKOUT_CTRL1		0xc1
145585083c5SChen-Yu Tsai #define AC100_CLKOUT_CTRL2		0xc2
146585083c5SChen-Yu Tsai #define AC100_CLKOUT_CTRL3		0xc3
147585083c5SChen-Yu Tsai 
148585083c5SChen-Yu Tsai /* RTC module */
149585083c5SChen-Yu Tsai #define AC100_RTC_RST			0xc6
150585083c5SChen-Yu Tsai #define AC100_RTC_CTRL			0xc7
151585083c5SChen-Yu Tsai #define AC100_RTC_SEC			0xc8 /* second */
152585083c5SChen-Yu Tsai #define AC100_RTC_MIN			0xc9 /* minute */
153585083c5SChen-Yu Tsai #define AC100_RTC_HOU			0xca /* hour */
154585083c5SChen-Yu Tsai #define AC100_RTC_WEE			0xcb /* weekday */
155585083c5SChen-Yu Tsai #define AC100_RTC_DAY			0xcc /* day */
156585083c5SChen-Yu Tsai #define AC100_RTC_MON			0xcd /* month */
157585083c5SChen-Yu Tsai #define AC100_RTC_YEA			0xce /* year */
158585083c5SChen-Yu Tsai #define AC100_RTC_UPD			0xcf /* update trigger */
159585083c5SChen-Yu Tsai 
160585083c5SChen-Yu Tsai /* RTC alarm */
161585083c5SChen-Yu Tsai #define AC100_ALM_INT_ENA		0xd0
162585083c5SChen-Yu Tsai #define	AC100_ALM_INT_STA		0xd1
163585083c5SChen-Yu Tsai #define AC100_ALM_SEC			0xd8
164585083c5SChen-Yu Tsai #define AC100_ALM_MIN			0xd9
165585083c5SChen-Yu Tsai #define AC100_ALM_HOU			0xda
166585083c5SChen-Yu Tsai #define AC100_ALM_WEE			0xdb
167585083c5SChen-Yu Tsai #define AC100_ALM_DAY			0xdc
168585083c5SChen-Yu Tsai #define AC100_ALM_MON			0xdd
169585083c5SChen-Yu Tsai #define AC100_ALM_YEA			0xde
170585083c5SChen-Yu Tsai #define AC100_ALM_UPD			0xdf
171585083c5SChen-Yu Tsai 
172585083c5SChen-Yu Tsai /* RTC general purpose register 0 ~ 15 */
173585083c5SChen-Yu Tsai #define AC100_RTC_GP(x)			(0xe0 + (x))
174585083c5SChen-Yu Tsai 
175585083c5SChen-Yu Tsai #endif /* __LINUX_MFD_AC100_H */
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