xref: /linux/include/linux/mfd/ac100.h (revision 585083c539ca3f5fb3d00057b25f9be3304d54c6)
1*585083c5SChen-Yu Tsai /*
2*585083c5SChen-Yu Tsai  * Functions and registers to access AC100 codec / RTC combo IC.
3*585083c5SChen-Yu Tsai  *
4*585083c5SChen-Yu Tsai  * Copyright (C) 2016 Chen-Yu Tsai
5*585083c5SChen-Yu Tsai  *
6*585083c5SChen-Yu Tsai  * Chen-Yu Tsai <wens@csie.org>
7*585083c5SChen-Yu Tsai  *
8*585083c5SChen-Yu Tsai  * This program is free software; you can redistribute it and/or modify
9*585083c5SChen-Yu Tsai  * it under the terms of the GNU General Public License version 2 as
10*585083c5SChen-Yu Tsai  * published by the Free Software Foundation.
11*585083c5SChen-Yu Tsai  */
12*585083c5SChen-Yu Tsai 
13*585083c5SChen-Yu Tsai #ifndef __LINUX_MFD_AC100_H
14*585083c5SChen-Yu Tsai #define __LINUX_MFD_AC100_H
15*585083c5SChen-Yu Tsai 
16*585083c5SChen-Yu Tsai #include <linux/regmap.h>
17*585083c5SChen-Yu Tsai 
18*585083c5SChen-Yu Tsai struct ac100_dev {
19*585083c5SChen-Yu Tsai 	struct device			*dev;
20*585083c5SChen-Yu Tsai 	struct regmap			*regmap;
21*585083c5SChen-Yu Tsai };
22*585083c5SChen-Yu Tsai 
23*585083c5SChen-Yu Tsai /* Audio codec related registers */
24*585083c5SChen-Yu Tsai #define AC100_CHIP_AUDIO_RST		0x00
25*585083c5SChen-Yu Tsai #define AC100_PLL_CTRL1			0x01
26*585083c5SChen-Yu Tsai #define AC100_PLL_CTRL2			0x02
27*585083c5SChen-Yu Tsai #define AC100_SYSCLK_CTRL		0x03
28*585083c5SChen-Yu Tsai #define AC100_MOD_CLK_ENA		0x04
29*585083c5SChen-Yu Tsai #define AC100_MOD_RST_CTRL		0x05
30*585083c5SChen-Yu Tsai #define AC100_I2S_SR_CTRL		0x06
31*585083c5SChen-Yu Tsai 
32*585083c5SChen-Yu Tsai /* I2S1 interface */
33*585083c5SChen-Yu Tsai #define AC100_I2S1_CLK_CTRL		0x10
34*585083c5SChen-Yu Tsai #define AC100_I2S1_SND_OUT_CTRL		0x11
35*585083c5SChen-Yu Tsai #define AC100_I2S1_SND_IN_CTRL		0x12
36*585083c5SChen-Yu Tsai #define AC100_I2S1_MXR_SRC		0x13
37*585083c5SChen-Yu Tsai #define AC100_I2S1_VOL_CTRL1		0x14
38*585083c5SChen-Yu Tsai #define AC100_I2S1_VOL_CTRL2		0x15
39*585083c5SChen-Yu Tsai #define AC100_I2S1_VOL_CTRL3		0x16
40*585083c5SChen-Yu Tsai #define AC100_I2S1_VOL_CTRL4		0x17
41*585083c5SChen-Yu Tsai #define AC100_I2S1_MXR_GAIN		0x18
42*585083c5SChen-Yu Tsai 
43*585083c5SChen-Yu Tsai /* I2S2 interface */
44*585083c5SChen-Yu Tsai #define AC100_I2S2_CLK_CTRL		0x20
45*585083c5SChen-Yu Tsai #define AC100_I2S2_SND_OUT_CTRL		0x21
46*585083c5SChen-Yu Tsai #define AC100_I2S2_SND_IN_CTRL		0x22
47*585083c5SChen-Yu Tsai #define AC100_I2S2_MXR_SRC		0x23
48*585083c5SChen-Yu Tsai #define AC100_I2S2_VOL_CTRL1		0x24
49*585083c5SChen-Yu Tsai #define AC100_I2S2_VOL_CTRL2		0x25
50*585083c5SChen-Yu Tsai #define AC100_I2S2_VOL_CTRL3		0x26
51*585083c5SChen-Yu Tsai #define AC100_I2S2_VOL_CTRL4		0x27
52*585083c5SChen-Yu Tsai #define AC100_I2S2_MXR_GAIN		0x28
53*585083c5SChen-Yu Tsai 
54*585083c5SChen-Yu Tsai /* I2S3 interface */
55*585083c5SChen-Yu Tsai #define AC100_I2S3_CLK_CTRL		0x30
56*585083c5SChen-Yu Tsai #define AC100_I2S3_SND_OUT_CTRL		0x31
57*585083c5SChen-Yu Tsai #define AC100_I2S3_SND_IN_CTRL		0x32
58*585083c5SChen-Yu Tsai #define AC100_I2S3_SIG_PATH_CTRL	0x33
59*585083c5SChen-Yu Tsai 
60*585083c5SChen-Yu Tsai /* ADC digital controls */
61*585083c5SChen-Yu Tsai #define AC100_ADC_DIG_CTRL		0x40
62*585083c5SChen-Yu Tsai #define AC100_ADC_VOL_CTRL		0x41
63*585083c5SChen-Yu Tsai 
64*585083c5SChen-Yu Tsai /* HMIC plug sensing / key detection */
65*585083c5SChen-Yu Tsai #define AC100_HMIC_CTRL1		0x44
66*585083c5SChen-Yu Tsai #define AC100_HMIC_CTRL2		0x45
67*585083c5SChen-Yu Tsai #define AC100_HMIC_STATUS		0x46
68*585083c5SChen-Yu Tsai 
69*585083c5SChen-Yu Tsai /* DAC digital controls */
70*585083c5SChen-Yu Tsai #define AC100_DAC_DIG_CTRL		0x48
71*585083c5SChen-Yu Tsai #define AC100_DAC_VOL_CTRL		0x49
72*585083c5SChen-Yu Tsai #define AC100_DAC_MXR_SRC		0x4c
73*585083c5SChen-Yu Tsai #define AC100_DAC_MXR_GAIN		0x4d
74*585083c5SChen-Yu Tsai 
75*585083c5SChen-Yu Tsai /* Analog controls */
76*585083c5SChen-Yu Tsai #define AC100_ADC_APC_CTRL		0x50
77*585083c5SChen-Yu Tsai #define AC100_ADC_SRC			0x51
78*585083c5SChen-Yu Tsai #define AC100_ADC_SRC_BST_CTRL		0x52
79*585083c5SChen-Yu Tsai #define AC100_OUT_MXR_DAC_A_CTRL	0x53
80*585083c5SChen-Yu Tsai #define AC100_OUT_MXR_SRC		0x54
81*585083c5SChen-Yu Tsai #define AC100_OUT_MXR_SRC_BST		0x55
82*585083c5SChen-Yu Tsai #define AC100_HPOUT_CTRL		0x56
83*585083c5SChen-Yu Tsai #define AC100_ERPOUT_CTRL		0x57
84*585083c5SChen-Yu Tsai #define AC100_SPKOUT_CTRL		0x58
85*585083c5SChen-Yu Tsai #define AC100_LINEOUT_CTRL		0x59
86*585083c5SChen-Yu Tsai 
87*585083c5SChen-Yu Tsai /* ADC digital audio processing (high pass filter & auto gain control */
88*585083c5SChen-Yu Tsai #define AC100_ADC_DAP_L_STA		0x80
89*585083c5SChen-Yu Tsai #define AC100_ADC_DAP_R_STA		0x81
90*585083c5SChen-Yu Tsai #define AC100_ADC_DAP_L_CTRL		0x82
91*585083c5SChen-Yu Tsai #define AC100_ADC_DAP_R_CTRL		0x83
92*585083c5SChen-Yu Tsai #define AC100_ADC_DAP_L_T_L		0x84 /* Left Target Level */
93*585083c5SChen-Yu Tsai #define AC100_ADC_DAP_R_T_L		0x85 /* Right Target Level */
94*585083c5SChen-Yu Tsai #define AC100_ADC_DAP_L_H_A_C		0x86 /* Left High Avg. Coef */
95*585083c5SChen-Yu Tsai #define AC100_ADC_DAP_L_L_A_C		0x87 /* Left Low Avg. Coef */
96*585083c5SChen-Yu Tsai #define AC100_ADC_DAP_R_H_A_C		0x88 /* Right High Avg. Coef */
97*585083c5SChen-Yu Tsai #define AC100_ADC_DAP_R_L_A_C		0x89 /* Right Low Avg. Coef */
98*585083c5SChen-Yu Tsai #define AC100_ADC_DAP_L_D_T		0x8a /* Left Decay Time */
99*585083c5SChen-Yu Tsai #define AC100_ADC_DAP_L_A_T		0x8b /* Left Attack Time */
100*585083c5SChen-Yu Tsai #define AC100_ADC_DAP_R_D_T		0x8c /* Right Decay Time */
101*585083c5SChen-Yu Tsai #define AC100_ADC_DAP_R_A_T		0x8d /* Right Attack Time */
102*585083c5SChen-Yu Tsai #define AC100_ADC_DAP_N_TH		0x8e /* Noise Threshold */
103*585083c5SChen-Yu Tsai #define AC100_ADC_DAP_L_H_N_A_C		0x8f /* Left High Noise Avg. Coef */
104*585083c5SChen-Yu Tsai #define AC100_ADC_DAP_L_L_N_A_C		0x90 /* Left Low Noise Avg. Coef */
105*585083c5SChen-Yu Tsai #define AC100_ADC_DAP_R_H_N_A_C		0x91 /* Right High Noise Avg. Coef */
106*585083c5SChen-Yu Tsai #define AC100_ADC_DAP_R_L_N_A_C		0x92 /* Right Low Noise Avg. Coef */
107*585083c5SChen-Yu Tsai #define AC100_ADC_DAP_H_HPF_C		0x93 /* High High-Pass-Filter Coef */
108*585083c5SChen-Yu Tsai #define AC100_ADC_DAP_L_HPF_C		0x94 /* Low High-Pass-Filter Coef */
109*585083c5SChen-Yu Tsai #define AC100_ADC_DAP_OPT		0x95 /* AGC Optimum */
110*585083c5SChen-Yu Tsai 
111*585083c5SChen-Yu Tsai /* DAC digital audio processing (high pass filter & dynamic range control) */
112*585083c5SChen-Yu Tsai #define AC100_DAC_DAP_CTRL		0xa0
113*585083c5SChen-Yu Tsai #define AC100_DAC_DAP_H_HPF_C		0xa1 /* High High-Pass-Filter Coef */
114*585083c5SChen-Yu Tsai #define AC100_DAC_DAP_L_HPF_C		0xa2 /* Low High-Pass-Filter Coef */
115*585083c5SChen-Yu Tsai #define AC100_DAC_DAP_L_H_E_A_C		0xa3 /* Left High Energy Avg Coef */
116*585083c5SChen-Yu Tsai #define AC100_DAC_DAP_L_L_E_A_C		0xa4 /* Left Low Energy Avg Coef */
117*585083c5SChen-Yu Tsai #define AC100_DAC_DAP_R_H_E_A_C		0xa5 /* Right High Energy Avg Coef */
118*585083c5SChen-Yu Tsai #define AC100_DAC_DAP_R_L_E_A_C		0xa6 /* Right Low Energy Avg Coef */
119*585083c5SChen-Yu Tsai #define AC100_DAC_DAP_H_G_D_T_C		0xa7 /* High Gain Delay Time Coef */
120*585083c5SChen-Yu Tsai #define AC100_DAC_DAP_L_G_D_T_C		0xa8 /* Low Gain Delay Time Coef */
121*585083c5SChen-Yu Tsai #define AC100_DAC_DAP_H_G_A_T_C		0xa9 /* High Gain Attack Time Coef */
122*585083c5SChen-Yu Tsai #define AC100_DAC_DAP_L_G_A_T_C		0xaa /* Low Gain Attack Time Coef */
123*585083c5SChen-Yu Tsai #define AC100_DAC_DAP_H_E_TH		0xab /* High Energy Threshold */
124*585083c5SChen-Yu Tsai #define AC100_DAC_DAP_L_E_TH		0xac /* Low Energy Threshold */
125*585083c5SChen-Yu Tsai #define AC100_DAC_DAP_H_G_K		0xad /* High Gain K parameter */
126*585083c5SChen-Yu Tsai #define AC100_DAC_DAP_L_G_K		0xae /* Low Gain K parameter */
127*585083c5SChen-Yu Tsai #define AC100_DAC_DAP_H_G_OFF		0xaf /* High Gain offset */
128*585083c5SChen-Yu Tsai #define AC100_DAC_DAP_L_G_OFF		0xb0 /* Low Gain offset */
129*585083c5SChen-Yu Tsai #define AC100_DAC_DAP_OPT		0xb1 /* DRC optimum */
130*585083c5SChen-Yu Tsai 
131*585083c5SChen-Yu Tsai /* Digital audio processing enable */
132*585083c5SChen-Yu Tsai #define AC100_ADC_DAP_ENA		0xb4
133*585083c5SChen-Yu Tsai #define AC100_DAC_DAP_ENA		0xb5
134*585083c5SChen-Yu Tsai 
135*585083c5SChen-Yu Tsai /* SRC control */
136*585083c5SChen-Yu Tsai #define AC100_SRC1_CTRL1		0xb8
137*585083c5SChen-Yu Tsai #define AC100_SRC1_CTRL2		0xb9
138*585083c5SChen-Yu Tsai #define AC100_SRC1_CTRL3		0xba
139*585083c5SChen-Yu Tsai #define AC100_SRC1_CTRL4		0xbb
140*585083c5SChen-Yu Tsai #define AC100_SRC2_CTRL1		0xbc
141*585083c5SChen-Yu Tsai #define AC100_SRC2_CTRL2		0xbd
142*585083c5SChen-Yu Tsai #define AC100_SRC2_CTRL3		0xbe
143*585083c5SChen-Yu Tsai #define AC100_SRC2_CTRL4		0xbf
144*585083c5SChen-Yu Tsai 
145*585083c5SChen-Yu Tsai /* RTC clk control */
146*585083c5SChen-Yu Tsai #define AC100_CLK32K_ANALOG_CTRL	0xc0
147*585083c5SChen-Yu Tsai #define AC100_CLKOUT_CTRL1		0xc1
148*585083c5SChen-Yu Tsai #define AC100_CLKOUT_CTRL2		0xc2
149*585083c5SChen-Yu Tsai #define AC100_CLKOUT_CTRL3		0xc3
150*585083c5SChen-Yu Tsai 
151*585083c5SChen-Yu Tsai /* RTC module */
152*585083c5SChen-Yu Tsai #define AC100_RTC_RST			0xc6
153*585083c5SChen-Yu Tsai #define AC100_RTC_CTRL			0xc7
154*585083c5SChen-Yu Tsai #define AC100_RTC_SEC			0xc8 /* second */
155*585083c5SChen-Yu Tsai #define AC100_RTC_MIN			0xc9 /* minute */
156*585083c5SChen-Yu Tsai #define AC100_RTC_HOU			0xca /* hour */
157*585083c5SChen-Yu Tsai #define AC100_RTC_WEE			0xcb /* weekday */
158*585083c5SChen-Yu Tsai #define AC100_RTC_DAY			0xcc /* day */
159*585083c5SChen-Yu Tsai #define AC100_RTC_MON			0xcd /* month */
160*585083c5SChen-Yu Tsai #define AC100_RTC_YEA			0xce /* year */
161*585083c5SChen-Yu Tsai #define AC100_RTC_UPD			0xcf /* update trigger */
162*585083c5SChen-Yu Tsai 
163*585083c5SChen-Yu Tsai /* RTC alarm */
164*585083c5SChen-Yu Tsai #define AC100_ALM_INT_ENA		0xd0
165*585083c5SChen-Yu Tsai #define	AC100_ALM_INT_STA		0xd1
166*585083c5SChen-Yu Tsai #define AC100_ALM_SEC			0xd8
167*585083c5SChen-Yu Tsai #define AC100_ALM_MIN			0xd9
168*585083c5SChen-Yu Tsai #define AC100_ALM_HOU			0xda
169*585083c5SChen-Yu Tsai #define AC100_ALM_WEE			0xdb
170*585083c5SChen-Yu Tsai #define AC100_ALM_DAY			0xdc
171*585083c5SChen-Yu Tsai #define AC100_ALM_MON			0xdd
172*585083c5SChen-Yu Tsai #define AC100_ALM_YEA			0xde
173*585083c5SChen-Yu Tsai #define AC100_ALM_UPD			0xdf
174*585083c5SChen-Yu Tsai 
175*585083c5SChen-Yu Tsai /* RTC general purpose register 0 ~ 15 */
176*585083c5SChen-Yu Tsai #define AC100_RTC_GP(x)			(0xe0 + (x))
177*585083c5SChen-Yu Tsai 
178*585083c5SChen-Yu Tsai #endif /* __LINUX_MFD_AC100_H */
179