1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef __IO_PGTABLE_H 3 #define __IO_PGTABLE_H 4 5 #include <linux/bitops.h> 6 #include <linux/iommu.h> 7 8 /* 9 * Public API for use by IOMMU drivers 10 */ 11 enum io_pgtable_fmt { 12 ARM_32_LPAE_S1, 13 ARM_32_LPAE_S2, 14 ARM_64_LPAE_S1, 15 ARM_64_LPAE_S2, 16 ARM_V7S, 17 ARM_MALI_LPAE, 18 AMD_IOMMU_V1, 19 AMD_IOMMU_V2, 20 APPLE_DART, 21 APPLE_DART2, 22 IO_PGTABLE_NUM_FMTS, 23 }; 24 25 /** 26 * struct iommu_flush_ops - IOMMU callbacks for TLB and page table management. 27 * 28 * @tlb_flush_all: Synchronously invalidate the entire TLB context. 29 * @tlb_flush_walk: Synchronously invalidate all intermediate TLB state 30 * (sometimes referred to as the "walk cache") for a virtual 31 * address range. 32 * @tlb_add_page: Optional callback to queue up leaf TLB invalidation for a 33 * single page. IOMMUs that cannot batch TLB invalidation 34 * operations efficiently will typically issue them here, but 35 * others may decide to update the iommu_iotlb_gather structure 36 * and defer the invalidation until iommu_iotlb_sync() instead. 37 * 38 * Note that these can all be called in atomic context and must therefore 39 * not block. 40 */ 41 struct iommu_flush_ops { 42 void (*tlb_flush_all)(void *cookie); 43 void (*tlb_flush_walk)(unsigned long iova, size_t size, size_t granule, 44 void *cookie); 45 void (*tlb_add_page)(struct iommu_iotlb_gather *gather, 46 unsigned long iova, size_t granule, void *cookie); 47 }; 48 49 /** 50 * struct io_pgtable_cfg - Configuration data for a set of page tables. 51 * 52 * @quirks: A bitmap of hardware quirks that require some special 53 * action by the low-level page table allocator. 54 * @pgsize_bitmap: A bitmap of page sizes supported by this set of page 55 * tables. 56 * @ias: Input address (iova) size, in bits. 57 * @oas: Output address (paddr) size, in bits. 58 * @coherent_walk A flag to indicate whether or not page table walks made 59 * by the IOMMU are coherent with the CPU caches. 60 * @tlb: TLB management callbacks for this set of tables. 61 * @iommu_dev: The device representing the DMA configuration for the 62 * page table walker. 63 */ 64 struct io_pgtable_cfg { 65 /* 66 * IO_PGTABLE_QUIRK_ARM_NS: (ARM formats) Set NS and NSTABLE bits in 67 * stage 1 PTEs, for hardware which insists on validating them 68 * even in non-secure state where they should normally be ignored. 69 * 70 * IO_PGTABLE_QUIRK_NO_PERMS: Ignore the IOMMU_READ, IOMMU_WRITE and 71 * IOMMU_NOEXEC flags and map everything with full access, for 72 * hardware which does not implement the permissions of a given 73 * format, and/or requires some format-specific default value. 74 * 75 * IO_PGTABLE_QUIRK_ARM_MTK_EXT: (ARM v7s format) MediaTek IOMMUs extend 76 * to support up to 35 bits PA where the bit32, bit33 and bit34 are 77 * encoded in the bit9, bit4 and bit5 of the PTE respectively. 78 * 79 * IO_PGTABLE_QUIRK_ARM_MTK_TTBR_EXT: (ARM v7s format) MediaTek IOMMUs 80 * extend the translation table base support up to 35 bits PA, the 81 * encoding format is same with IO_PGTABLE_QUIRK_ARM_MTK_EXT. 82 * 83 * IO_PGTABLE_QUIRK_ARM_TTBR1: (ARM LPAE format) Configure the table 84 * for use in the upper half of a split address space. 85 * 86 * IO_PGTABLE_QUIRK_ARM_OUTER_WBWA: Override the outer-cacheability 87 * attributes set in the TCR for a non-coherent page-table walker. 88 * 89 * IO_PGTABLE_QUIRK_ARM_HD: Enables dirty tracking in stage 1 pagetable. 90 */ 91 #define IO_PGTABLE_QUIRK_ARM_NS BIT(0) 92 #define IO_PGTABLE_QUIRK_NO_PERMS BIT(1) 93 #define IO_PGTABLE_QUIRK_ARM_MTK_EXT BIT(3) 94 #define IO_PGTABLE_QUIRK_ARM_MTK_TTBR_EXT BIT(4) 95 #define IO_PGTABLE_QUIRK_ARM_TTBR1 BIT(5) 96 #define IO_PGTABLE_QUIRK_ARM_OUTER_WBWA BIT(6) 97 #define IO_PGTABLE_QUIRK_ARM_HD BIT(7) 98 unsigned long quirks; 99 unsigned long pgsize_bitmap; 100 unsigned int ias; 101 unsigned int oas; 102 bool coherent_walk; 103 const struct iommu_flush_ops *tlb; 104 struct device *iommu_dev; 105 106 /** 107 * @alloc: Custom page allocator. 108 * 109 * Optional hook used to allocate page tables. If this function is NULL, 110 * @free must be NULL too. 111 * 112 * Memory returned should be zeroed and suitable for dma_map_single() and 113 * virt_to_phys(). 114 * 115 * Not all formats support custom page allocators. Before considering 116 * passing a non-NULL value, make sure the chosen page format supports 117 * this feature. 118 */ 119 void *(*alloc)(void *cookie, size_t size, gfp_t gfp); 120 121 /** 122 * @free: Custom page de-allocator. 123 * 124 * Optional hook used to free page tables allocated with the @alloc 125 * hook. Must be non-NULL if @alloc is not NULL, must be NULL 126 * otherwise. 127 */ 128 void (*free)(void *cookie, void *pages, size_t size); 129 130 /* Low-level data specific to the table format */ 131 union { 132 struct { 133 u64 ttbr; 134 struct { 135 u32 ips:3; 136 u32 tg:2; 137 u32 sh:2; 138 u32 orgn:2; 139 u32 irgn:2; 140 u32 tsz:6; 141 } tcr; 142 u64 mair; 143 } arm_lpae_s1_cfg; 144 145 struct { 146 u64 vttbr; 147 struct { 148 u32 ps:3; 149 u32 tg:2; 150 u32 sh:2; 151 u32 orgn:2; 152 u32 irgn:2; 153 u32 sl:2; 154 u32 tsz:6; 155 } vtcr; 156 } arm_lpae_s2_cfg; 157 158 struct { 159 u32 ttbr; 160 u32 tcr; 161 u32 nmrr; 162 u32 prrr; 163 } arm_v7s_cfg; 164 165 struct { 166 u64 transtab; 167 u64 memattr; 168 } arm_mali_lpae_cfg; 169 170 struct { 171 u64 ttbr[4]; 172 u32 n_ttbrs; 173 } apple_dart_cfg; 174 175 struct { 176 int nid; 177 } amd; 178 }; 179 }; 180 181 /** 182 * struct io_pgtable_ops - Page table manipulation API for IOMMU drivers. 183 * 184 * @map_pages: Map a physically contiguous range of pages of the same size. 185 * @unmap_pages: Unmap a range of virtually contiguous pages of the same size. 186 * @iova_to_phys: Translate iova to physical address. 187 * 188 * These functions map directly onto the iommu_ops member functions with 189 * the same names. 190 */ 191 struct io_pgtable_ops { 192 int (*map_pages)(struct io_pgtable_ops *ops, unsigned long iova, 193 phys_addr_t paddr, size_t pgsize, size_t pgcount, 194 int prot, gfp_t gfp, size_t *mapped); 195 size_t (*unmap_pages)(struct io_pgtable_ops *ops, unsigned long iova, 196 size_t pgsize, size_t pgcount, 197 struct iommu_iotlb_gather *gather); 198 phys_addr_t (*iova_to_phys)(struct io_pgtable_ops *ops, 199 unsigned long iova); 200 int (*read_and_clear_dirty)(struct io_pgtable_ops *ops, 201 unsigned long iova, size_t size, 202 unsigned long flags, 203 struct iommu_dirty_bitmap *dirty); 204 }; 205 206 /** 207 * alloc_io_pgtable_ops() - Allocate a page table allocator for use by an IOMMU. 208 * 209 * @fmt: The page table format. 210 * @cfg: The page table configuration. This will be modified to represent 211 * the configuration actually provided by the allocator (e.g. the 212 * pgsize_bitmap may be restricted). 213 * @cookie: An opaque token provided by the IOMMU driver and passed back to 214 * the callback routines in cfg->tlb. 215 */ 216 struct io_pgtable_ops *alloc_io_pgtable_ops(enum io_pgtable_fmt fmt, 217 struct io_pgtable_cfg *cfg, 218 void *cookie); 219 220 /** 221 * free_io_pgtable_ops() - Free an io_pgtable_ops structure. The caller 222 * *must* ensure that the page table is no longer 223 * live, but the TLB can be dirty. 224 * 225 * @ops: The ops returned from alloc_io_pgtable_ops. 226 */ 227 void free_io_pgtable_ops(struct io_pgtable_ops *ops); 228 229 230 /* 231 * Internal structures for page table allocator implementations. 232 */ 233 234 /** 235 * struct io_pgtable - Internal structure describing a set of page tables. 236 * 237 * @fmt: The page table format. 238 * @cookie: An opaque token provided by the IOMMU driver and passed back to 239 * any callback routines. 240 * @cfg: A copy of the page table configuration. 241 * @ops: The page table operations in use for this set of page tables. 242 */ 243 struct io_pgtable { 244 enum io_pgtable_fmt fmt; 245 void *cookie; 246 struct io_pgtable_cfg cfg; 247 struct io_pgtable_ops ops; 248 }; 249 250 #define io_pgtable_ops_to_pgtable(x) container_of((x), struct io_pgtable, ops) 251 252 static inline void io_pgtable_tlb_flush_all(struct io_pgtable *iop) 253 { 254 if (iop->cfg.tlb && iop->cfg.tlb->tlb_flush_all) 255 iop->cfg.tlb->tlb_flush_all(iop->cookie); 256 } 257 258 static inline void 259 io_pgtable_tlb_flush_walk(struct io_pgtable *iop, unsigned long iova, 260 size_t size, size_t granule) 261 { 262 if (iop->cfg.tlb && iop->cfg.tlb->tlb_flush_walk) 263 iop->cfg.tlb->tlb_flush_walk(iova, size, granule, iop->cookie); 264 } 265 266 static inline void 267 io_pgtable_tlb_add_page(struct io_pgtable *iop, 268 struct iommu_iotlb_gather * gather, unsigned long iova, 269 size_t granule) 270 { 271 if (iop->cfg.tlb && iop->cfg.tlb->tlb_add_page) 272 iop->cfg.tlb->tlb_add_page(gather, iova, granule, iop->cookie); 273 } 274 275 /** 276 * enum io_pgtable_caps - IO page table backend capabilities. 277 */ 278 enum io_pgtable_caps { 279 /** @IO_PGTABLE_CAP_CUSTOM_ALLOCATOR: Backend accepts custom page table allocators. */ 280 IO_PGTABLE_CAP_CUSTOM_ALLOCATOR = BIT(0), 281 }; 282 283 /** 284 * struct io_pgtable_init_fns - Alloc/free a set of page tables for a 285 * particular format. 286 * 287 * @alloc: Allocate a set of page tables described by cfg. 288 * @free: Free the page tables associated with iop. 289 * @caps: Combination of @io_pgtable_caps flags encoding the backend capabilities. 290 */ 291 struct io_pgtable_init_fns { 292 struct io_pgtable *(*alloc)(struct io_pgtable_cfg *cfg, void *cookie); 293 void (*free)(struct io_pgtable *iop); 294 u32 caps; 295 }; 296 297 extern struct io_pgtable_init_fns io_pgtable_arm_32_lpae_s1_init_fns; 298 extern struct io_pgtable_init_fns io_pgtable_arm_32_lpae_s2_init_fns; 299 extern struct io_pgtable_init_fns io_pgtable_arm_64_lpae_s1_init_fns; 300 extern struct io_pgtable_init_fns io_pgtable_arm_64_lpae_s2_init_fns; 301 extern struct io_pgtable_init_fns io_pgtable_arm_v7s_init_fns; 302 extern struct io_pgtable_init_fns io_pgtable_arm_mali_lpae_init_fns; 303 extern struct io_pgtable_init_fns io_pgtable_amd_iommu_v1_init_fns; 304 extern struct io_pgtable_init_fns io_pgtable_amd_iommu_v2_init_fns; 305 extern struct io_pgtable_init_fns io_pgtable_apple_dart_init_fns; 306 307 #endif /* __IO_PGTABLE_H */ 308