xref: /linux/include/linux/io-pgtable.h (revision 7f71507851fc7764b36a3221839607d3a45c2025)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __IO_PGTABLE_H
3 #define __IO_PGTABLE_H
4 
5 #include <linux/bitops.h>
6 #include <linux/iommu.h>
7 
8 /*
9  * Public API for use by IOMMU drivers
10  */
11 enum io_pgtable_fmt {
12 	ARM_32_LPAE_S1,
13 	ARM_32_LPAE_S2,
14 	ARM_64_LPAE_S1,
15 	ARM_64_LPAE_S2,
16 	ARM_V7S,
17 	ARM_MALI_LPAE,
18 	AMD_IOMMU_V1,
19 	AMD_IOMMU_V2,
20 	APPLE_DART,
21 	APPLE_DART2,
22 	IO_PGTABLE_NUM_FMTS,
23 };
24 
25 /**
26  * struct iommu_flush_ops - IOMMU callbacks for TLB and page table management.
27  *
28  * @tlb_flush_all:  Synchronously invalidate the entire TLB context.
29  * @tlb_flush_walk: Synchronously invalidate all intermediate TLB state
30  *                  (sometimes referred to as the "walk cache") for a virtual
31  *                  address range.
32  * @tlb_add_page:   Optional callback to queue up leaf TLB invalidation for a
33  *                  single page.  IOMMUs that cannot batch TLB invalidation
34  *                  operations efficiently will typically issue them here, but
35  *                  others may decide to update the iommu_iotlb_gather structure
36  *                  and defer the invalidation until iommu_iotlb_sync() instead.
37  *
38  * Note that these can all be called in atomic context and must therefore
39  * not block.
40  */
41 struct iommu_flush_ops {
42 	void (*tlb_flush_all)(void *cookie);
43 	void (*tlb_flush_walk)(unsigned long iova, size_t size, size_t granule,
44 			       void *cookie);
45 	void (*tlb_add_page)(struct iommu_iotlb_gather *gather,
46 			     unsigned long iova, size_t granule, void *cookie);
47 };
48 
49 /**
50  * struct io_pgtable_cfg - Configuration data for a set of page tables.
51  *
52  * @quirks:        A bitmap of hardware quirks that require some special
53  *                 action by the low-level page table allocator.
54  * @pgsize_bitmap: A bitmap of page sizes supported by this set of page
55  *                 tables.
56  * @ias:           Input address (iova) size, in bits.
57  * @oas:           Output address (paddr) size, in bits.
58  * @coherent_walk  A flag to indicate whether or not page table walks made
59  *                 by the IOMMU are coherent with the CPU caches.
60  * @tlb:           TLB management callbacks for this set of tables.
61  * @iommu_dev:     The device representing the DMA configuration for the
62  *                 page table walker.
63  */
64 struct io_pgtable_cfg {
65 	/*
66 	 * IO_PGTABLE_QUIRK_ARM_NS: (ARM formats) Set NS and NSTABLE bits in
67 	 *	stage 1 PTEs, for hardware which insists on validating them
68 	 *	even in	non-secure state where they should normally be ignored.
69 	 *
70 	 * IO_PGTABLE_QUIRK_NO_PERMS: Ignore the IOMMU_READ, IOMMU_WRITE and
71 	 *	IOMMU_NOEXEC flags and map everything with full access, for
72 	 *	hardware which does not implement the permissions of a given
73 	 *	format, and/or requires some format-specific default value.
74 	 *
75 	 * IO_PGTABLE_QUIRK_ARM_MTK_EXT: (ARM v7s format) MediaTek IOMMUs extend
76 	 *	to support up to 35 bits PA where the bit32, bit33 and bit34 are
77 	 *	encoded in the bit9, bit4 and bit5 of the PTE respectively.
78 	 *
79 	 * IO_PGTABLE_QUIRK_ARM_MTK_TTBR_EXT: (ARM v7s format) MediaTek IOMMUs
80 	 *	extend the translation table base support up to 35 bits PA, the
81 	 *	encoding format is same with IO_PGTABLE_QUIRK_ARM_MTK_EXT.
82 	 *
83 	 * IO_PGTABLE_QUIRK_ARM_TTBR1: (ARM LPAE format) Configure the table
84 	 *	for use in the upper half of a split address space.
85 	 *
86 	 * IO_PGTABLE_QUIRK_ARM_OUTER_WBWA: Override the outer-cacheability
87 	 *	attributes set in the TCR for a non-coherent page-table walker.
88 	 *
89 	 * IO_PGTABLE_QUIRK_ARM_HD: Enables dirty tracking in stage 1 pagetable.
90 	 * IO_PGTABLE_QUIRK_ARM_S2FWB: Use the FWB format for the MemAttrs bits
91 	 */
92 	#define IO_PGTABLE_QUIRK_ARM_NS			BIT(0)
93 	#define IO_PGTABLE_QUIRK_NO_PERMS		BIT(1)
94 	#define IO_PGTABLE_QUIRK_ARM_MTK_EXT		BIT(3)
95 	#define IO_PGTABLE_QUIRK_ARM_MTK_TTBR_EXT	BIT(4)
96 	#define IO_PGTABLE_QUIRK_ARM_TTBR1		BIT(5)
97 	#define IO_PGTABLE_QUIRK_ARM_OUTER_WBWA		BIT(6)
98 	#define IO_PGTABLE_QUIRK_ARM_HD			BIT(7)
99 	#define IO_PGTABLE_QUIRK_ARM_S2FWB		BIT(8)
100 	unsigned long			quirks;
101 	unsigned long			pgsize_bitmap;
102 	unsigned int			ias;
103 	unsigned int			oas;
104 	bool				coherent_walk;
105 	const struct iommu_flush_ops	*tlb;
106 	struct device			*iommu_dev;
107 
108 	/**
109 	 * @alloc: Custom page allocator.
110 	 *
111 	 * Optional hook used to allocate page tables. If this function is NULL,
112 	 * @free must be NULL too.
113 	 *
114 	 * Memory returned should be zeroed and suitable for dma_map_single() and
115 	 * virt_to_phys().
116 	 *
117 	 * Not all formats support custom page allocators. Before considering
118 	 * passing a non-NULL value, make sure the chosen page format supports
119 	 * this feature.
120 	 */
121 	void *(*alloc)(void *cookie, size_t size, gfp_t gfp);
122 
123 	/**
124 	 * @free: Custom page de-allocator.
125 	 *
126 	 * Optional hook used to free page tables allocated with the @alloc
127 	 * hook. Must be non-NULL if @alloc is not NULL, must be NULL
128 	 * otherwise.
129 	 */
130 	void (*free)(void *cookie, void *pages, size_t size);
131 
132 	/* Low-level data specific to the table format */
133 	union {
134 		struct {
135 			u64	ttbr;
136 			struct {
137 				u32	ips:3;
138 				u32	tg:2;
139 				u32	sh:2;
140 				u32	orgn:2;
141 				u32	irgn:2;
142 				u32	tsz:6;
143 			}	tcr;
144 			u64	mair;
145 		} arm_lpae_s1_cfg;
146 
147 		struct {
148 			u64	vttbr;
149 			struct {
150 				u32	ps:3;
151 				u32	tg:2;
152 				u32	sh:2;
153 				u32	orgn:2;
154 				u32	irgn:2;
155 				u32	sl:2;
156 				u32	tsz:6;
157 			}	vtcr;
158 		} arm_lpae_s2_cfg;
159 
160 		struct {
161 			u32	ttbr;
162 			u32	tcr;
163 			u32	nmrr;
164 			u32	prrr;
165 		} arm_v7s_cfg;
166 
167 		struct {
168 			u64	transtab;
169 			u64	memattr;
170 		} arm_mali_lpae_cfg;
171 
172 		struct {
173 			u64 ttbr[4];
174 			u32 n_ttbrs;
175 		} apple_dart_cfg;
176 
177 		struct {
178 			int nid;
179 		} amd;
180 	};
181 };
182 
183 /**
184  * struct io_pgtable_ops - Page table manipulation API for IOMMU drivers.
185  *
186  * @map_pages:    Map a physically contiguous range of pages of the same size.
187  * @unmap_pages:  Unmap a range of virtually contiguous pages of the same size.
188  * @iova_to_phys: Translate iova to physical address.
189  *
190  * These functions map directly onto the iommu_ops member functions with
191  * the same names.
192  */
193 struct io_pgtable_ops {
194 	int (*map_pages)(struct io_pgtable_ops *ops, unsigned long iova,
195 			 phys_addr_t paddr, size_t pgsize, size_t pgcount,
196 			 int prot, gfp_t gfp, size_t *mapped);
197 	size_t (*unmap_pages)(struct io_pgtable_ops *ops, unsigned long iova,
198 			      size_t pgsize, size_t pgcount,
199 			      struct iommu_iotlb_gather *gather);
200 	phys_addr_t (*iova_to_phys)(struct io_pgtable_ops *ops,
201 				    unsigned long iova);
202 	int (*read_and_clear_dirty)(struct io_pgtable_ops *ops,
203 				    unsigned long iova, size_t size,
204 				    unsigned long flags,
205 				    struct iommu_dirty_bitmap *dirty);
206 };
207 
208 /**
209  * alloc_io_pgtable_ops() - Allocate a page table allocator for use by an IOMMU.
210  *
211  * @fmt:    The page table format.
212  * @cfg:    The page table configuration. This will be modified to represent
213  *          the configuration actually provided by the allocator (e.g. the
214  *          pgsize_bitmap may be restricted).
215  * @cookie: An opaque token provided by the IOMMU driver and passed back to
216  *          the callback routines in cfg->tlb.
217  */
218 struct io_pgtable_ops *alloc_io_pgtable_ops(enum io_pgtable_fmt fmt,
219 					    struct io_pgtable_cfg *cfg,
220 					    void *cookie);
221 
222 /**
223  * free_io_pgtable_ops() - Free an io_pgtable_ops structure. The caller
224  *                         *must* ensure that the page table is no longer
225  *                         live, but the TLB can be dirty.
226  *
227  * @ops: The ops returned from alloc_io_pgtable_ops.
228  */
229 void free_io_pgtable_ops(struct io_pgtable_ops *ops);
230 
231 
232 /*
233  * Internal structures for page table allocator implementations.
234  */
235 
236 /**
237  * struct io_pgtable - Internal structure describing a set of page tables.
238  *
239  * @fmt:    The page table format.
240  * @cookie: An opaque token provided by the IOMMU driver and passed back to
241  *          any callback routines.
242  * @cfg:    A copy of the page table configuration.
243  * @ops:    The page table operations in use for this set of page tables.
244  */
245 struct io_pgtable {
246 	enum io_pgtable_fmt	fmt;
247 	void			*cookie;
248 	struct io_pgtable_cfg	cfg;
249 	struct io_pgtable_ops	ops;
250 };
251 
252 #define io_pgtable_ops_to_pgtable(x) container_of((x), struct io_pgtable, ops)
253 
254 static inline void io_pgtable_tlb_flush_all(struct io_pgtable *iop)
255 {
256 	if (iop->cfg.tlb && iop->cfg.tlb->tlb_flush_all)
257 		iop->cfg.tlb->tlb_flush_all(iop->cookie);
258 }
259 
260 static inline void
261 io_pgtable_tlb_flush_walk(struct io_pgtable *iop, unsigned long iova,
262 			  size_t size, size_t granule)
263 {
264 	if (iop->cfg.tlb && iop->cfg.tlb->tlb_flush_walk)
265 		iop->cfg.tlb->tlb_flush_walk(iova, size, granule, iop->cookie);
266 }
267 
268 static inline void
269 io_pgtable_tlb_add_page(struct io_pgtable *iop,
270 			struct iommu_iotlb_gather * gather, unsigned long iova,
271 			size_t granule)
272 {
273 	if (iop->cfg.tlb && iop->cfg.tlb->tlb_add_page)
274 		iop->cfg.tlb->tlb_add_page(gather, iova, granule, iop->cookie);
275 }
276 
277 /**
278  * enum io_pgtable_caps - IO page table backend capabilities.
279  */
280 enum io_pgtable_caps {
281 	/** @IO_PGTABLE_CAP_CUSTOM_ALLOCATOR: Backend accepts custom page table allocators. */
282 	IO_PGTABLE_CAP_CUSTOM_ALLOCATOR = BIT(0),
283 };
284 
285 /**
286  * struct io_pgtable_init_fns - Alloc/free a set of page tables for a
287  *                              particular format.
288  *
289  * @alloc: Allocate a set of page tables described by cfg.
290  * @free:  Free the page tables associated with iop.
291  * @caps:  Combination of @io_pgtable_caps flags encoding the backend capabilities.
292  */
293 struct io_pgtable_init_fns {
294 	struct io_pgtable *(*alloc)(struct io_pgtable_cfg *cfg, void *cookie);
295 	void (*free)(struct io_pgtable *iop);
296 	u32 caps;
297 };
298 
299 extern struct io_pgtable_init_fns io_pgtable_arm_32_lpae_s1_init_fns;
300 extern struct io_pgtable_init_fns io_pgtable_arm_32_lpae_s2_init_fns;
301 extern struct io_pgtable_init_fns io_pgtable_arm_64_lpae_s1_init_fns;
302 extern struct io_pgtable_init_fns io_pgtable_arm_64_lpae_s2_init_fns;
303 extern struct io_pgtable_init_fns io_pgtable_arm_v7s_init_fns;
304 extern struct io_pgtable_init_fns io_pgtable_arm_mali_lpae_init_fns;
305 extern struct io_pgtable_init_fns io_pgtable_amd_iommu_v1_init_fns;
306 extern struct io_pgtable_init_fns io_pgtable_amd_iommu_v2_init_fns;
307 extern struct io_pgtable_init_fns io_pgtable_apple_dart_init_fns;
308 
309 #endif /* __IO_PGTABLE_H */
310