1b77cf11fSRob Herring /* SPDX-License-Identifier: GPL-2.0 */ 2b77cf11fSRob Herring #ifndef __IO_PGTABLE_H 3b77cf11fSRob Herring #define __IO_PGTABLE_H 4b77cf11fSRob Herring #include <linux/bitops.h> 5b77cf11fSRob Herring 6b77cf11fSRob Herring /* 7b77cf11fSRob Herring * Public API for use by IOMMU drivers 8b77cf11fSRob Herring */ 9b77cf11fSRob Herring enum io_pgtable_fmt { 10b77cf11fSRob Herring ARM_32_LPAE_S1, 11b77cf11fSRob Herring ARM_32_LPAE_S2, 12b77cf11fSRob Herring ARM_64_LPAE_S1, 13b77cf11fSRob Herring ARM_64_LPAE_S2, 14b77cf11fSRob Herring ARM_V7S, 15d08d42deSRob Herring ARM_MALI_LPAE, 16b77cf11fSRob Herring IO_PGTABLE_NUM_FMTS, 17b77cf11fSRob Herring }; 18b77cf11fSRob Herring 19b77cf11fSRob Herring /** 20298f7889SWill Deacon * struct iommu_flush_ops - IOMMU callbacks for TLB and page table management. 21b77cf11fSRob Herring * 22b77cf11fSRob Herring * @tlb_flush_all: Synchronously invalidate the entire TLB context. 233445545bSWill Deacon * @tlb_flush_walk: Synchronously invalidate all intermediate TLB state 243445545bSWill Deacon * (sometimes referred to as the "walk cache") for a virtual 253445545bSWill Deacon * address range. 263445545bSWill Deacon * @tlb_flush_leaf: Synchronously invalidate all leaf TLB state for a virtual 273445545bSWill Deacon * address range. 28*abfd6fe0SWill Deacon * @tlb_add_page: Optional callback to queue up leaf TLB invalidation for a 29*abfd6fe0SWill Deacon * single page. This function exists purely as an optimisation 30*abfd6fe0SWill Deacon * for IOMMUs that cannot batch TLB invalidation operations 31*abfd6fe0SWill Deacon * efficiently and are therefore better suited to issuing them 32*abfd6fe0SWill Deacon * early rather than deferring them until iommu_tlb_sync(). 33b77cf11fSRob Herring * @tlb_sync: Ensure any queued TLB invalidation has taken effect, and 34b77cf11fSRob Herring * any corresponding page table updates are visible to the 35b77cf11fSRob Herring * IOMMU. 36b77cf11fSRob Herring * 37b77cf11fSRob Herring * Note that these can all be called in atomic context and must therefore 38b77cf11fSRob Herring * not block. 39b77cf11fSRob Herring */ 40298f7889SWill Deacon struct iommu_flush_ops { 41b77cf11fSRob Herring void (*tlb_flush_all)(void *cookie); 423445545bSWill Deacon void (*tlb_flush_walk)(unsigned long iova, size_t size, size_t granule, 433445545bSWill Deacon void *cookie); 443445545bSWill Deacon void (*tlb_flush_leaf)(unsigned long iova, size_t size, size_t granule, 453445545bSWill Deacon void *cookie); 46*abfd6fe0SWill Deacon void (*tlb_add_page)(unsigned long iova, size_t granule, void *cookie); 47b77cf11fSRob Herring void (*tlb_sync)(void *cookie); 48b77cf11fSRob Herring }; 49b77cf11fSRob Herring 50b77cf11fSRob Herring /** 51b77cf11fSRob Herring * struct io_pgtable_cfg - Configuration data for a set of page tables. 52b77cf11fSRob Herring * 53b77cf11fSRob Herring * @quirks: A bitmap of hardware quirks that require some special 54b77cf11fSRob Herring * action by the low-level page table allocator. 55b77cf11fSRob Herring * @pgsize_bitmap: A bitmap of page sizes supported by this set of page 56b77cf11fSRob Herring * tables. 57b77cf11fSRob Herring * @ias: Input address (iova) size, in bits. 58b77cf11fSRob Herring * @oas: Output address (paddr) size, in bits. 594f41845bSWill Deacon * @coherent_walk A flag to indicate whether or not page table walks made 604f41845bSWill Deacon * by the IOMMU are coherent with the CPU caches. 61b77cf11fSRob Herring * @tlb: TLB management callbacks for this set of tables. 62b77cf11fSRob Herring * @iommu_dev: The device representing the DMA configuration for the 63b77cf11fSRob Herring * page table walker. 64b77cf11fSRob Herring */ 65b77cf11fSRob Herring struct io_pgtable_cfg { 66b77cf11fSRob Herring /* 67b77cf11fSRob Herring * IO_PGTABLE_QUIRK_ARM_NS: (ARM formats) Set NS and NSTABLE bits in 68b77cf11fSRob Herring * stage 1 PTEs, for hardware which insists on validating them 69b77cf11fSRob Herring * even in non-secure state where they should normally be ignored. 70b77cf11fSRob Herring * 71b77cf11fSRob Herring * IO_PGTABLE_QUIRK_NO_PERMS: Ignore the IOMMU_READ, IOMMU_WRITE and 72b77cf11fSRob Herring * IOMMU_NOEXEC flags and map everything with full access, for 73b77cf11fSRob Herring * hardware which does not implement the permissions of a given 74b77cf11fSRob Herring * format, and/or requires some format-specific default value. 75b77cf11fSRob Herring * 76b77cf11fSRob Herring * IO_PGTABLE_QUIRK_TLBI_ON_MAP: If the format forbids caching invalid 77b77cf11fSRob Herring * (unmapped) entries but the hardware might do so anyway, perform 78b77cf11fSRob Herring * TLB maintenance when mapping as well as when unmapping. 79b77cf11fSRob Herring * 80b77cf11fSRob Herring * IO_PGTABLE_QUIRK_ARM_MTK_4GB: (ARM v7s format) Set bit 9 in all 81b77cf11fSRob Herring * PTEs, for Mediatek IOMMUs which treat it as a 33rd address bit 82b77cf11fSRob Herring * when the SoC is in "4GB mode" and they can only access the high 83b77cf11fSRob Herring * remap of DRAM (0x1_00000000 to 0x1_ffffffff). 84b77cf11fSRob Herring * 85b77cf11fSRob Herring * IO_PGTABLE_QUIRK_NON_STRICT: Skip issuing synchronous leaf TLBIs 86b77cf11fSRob Herring * on unmap, for DMA domains using the flush queue mechanism for 87b77cf11fSRob Herring * delayed invalidation. 88b77cf11fSRob Herring */ 89b77cf11fSRob Herring #define IO_PGTABLE_QUIRK_ARM_NS BIT(0) 90b77cf11fSRob Herring #define IO_PGTABLE_QUIRK_NO_PERMS BIT(1) 91b77cf11fSRob Herring #define IO_PGTABLE_QUIRK_TLBI_ON_MAP BIT(2) 92b77cf11fSRob Herring #define IO_PGTABLE_QUIRK_ARM_MTK_4GB BIT(3) 934f41845bSWill Deacon #define IO_PGTABLE_QUIRK_NON_STRICT BIT(4) 94b77cf11fSRob Herring unsigned long quirks; 95b77cf11fSRob Herring unsigned long pgsize_bitmap; 96b77cf11fSRob Herring unsigned int ias; 97b77cf11fSRob Herring unsigned int oas; 984f41845bSWill Deacon bool coherent_walk; 99298f7889SWill Deacon const struct iommu_flush_ops *tlb; 100b77cf11fSRob Herring struct device *iommu_dev; 101b77cf11fSRob Herring 102b77cf11fSRob Herring /* Low-level data specific to the table format */ 103b77cf11fSRob Herring union { 104b77cf11fSRob Herring struct { 105b77cf11fSRob Herring u64 ttbr[2]; 106b77cf11fSRob Herring u64 tcr; 107b77cf11fSRob Herring u64 mair[2]; 108b77cf11fSRob Herring } arm_lpae_s1_cfg; 109b77cf11fSRob Herring 110b77cf11fSRob Herring struct { 111b77cf11fSRob Herring u64 vttbr; 112b77cf11fSRob Herring u64 vtcr; 113b77cf11fSRob Herring } arm_lpae_s2_cfg; 114b77cf11fSRob Herring 115b77cf11fSRob Herring struct { 116b77cf11fSRob Herring u32 ttbr[2]; 117b77cf11fSRob Herring u32 tcr; 118b77cf11fSRob Herring u32 nmrr; 119b77cf11fSRob Herring u32 prrr; 120b77cf11fSRob Herring } arm_v7s_cfg; 121d08d42deSRob Herring 122d08d42deSRob Herring struct { 123d08d42deSRob Herring u64 transtab; 124d08d42deSRob Herring u64 memattr; 125d08d42deSRob Herring } arm_mali_lpae_cfg; 126b77cf11fSRob Herring }; 127b77cf11fSRob Herring }; 128b77cf11fSRob Herring 129b77cf11fSRob Herring /** 130b77cf11fSRob Herring * struct io_pgtable_ops - Page table manipulation API for IOMMU drivers. 131b77cf11fSRob Herring * 132b77cf11fSRob Herring * @map: Map a physically contiguous memory region. 133b77cf11fSRob Herring * @unmap: Unmap a physically contiguous memory region. 134b77cf11fSRob Herring * @iova_to_phys: Translate iova to physical address. 135b77cf11fSRob Herring * 136b77cf11fSRob Herring * These functions map directly onto the iommu_ops member functions with 137b77cf11fSRob Herring * the same names. 138b77cf11fSRob Herring */ 139b77cf11fSRob Herring struct io_pgtable_ops { 140b77cf11fSRob Herring int (*map)(struct io_pgtable_ops *ops, unsigned long iova, 141b77cf11fSRob Herring phys_addr_t paddr, size_t size, int prot); 142b77cf11fSRob Herring size_t (*unmap)(struct io_pgtable_ops *ops, unsigned long iova, 143b77cf11fSRob Herring size_t size); 144b77cf11fSRob Herring phys_addr_t (*iova_to_phys)(struct io_pgtable_ops *ops, 145b77cf11fSRob Herring unsigned long iova); 146b77cf11fSRob Herring }; 147b77cf11fSRob Herring 148b77cf11fSRob Herring /** 149b77cf11fSRob Herring * alloc_io_pgtable_ops() - Allocate a page table allocator for use by an IOMMU. 150b77cf11fSRob Herring * 151b77cf11fSRob Herring * @fmt: The page table format. 152b77cf11fSRob Herring * @cfg: The page table configuration. This will be modified to represent 153b77cf11fSRob Herring * the configuration actually provided by the allocator (e.g. the 154b77cf11fSRob Herring * pgsize_bitmap may be restricted). 155b77cf11fSRob Herring * @cookie: An opaque token provided by the IOMMU driver and passed back to 156b77cf11fSRob Herring * the callback routines in cfg->tlb. 157b77cf11fSRob Herring */ 158b77cf11fSRob Herring struct io_pgtable_ops *alloc_io_pgtable_ops(enum io_pgtable_fmt fmt, 159b77cf11fSRob Herring struct io_pgtable_cfg *cfg, 160b77cf11fSRob Herring void *cookie); 161b77cf11fSRob Herring 162b77cf11fSRob Herring /** 163b77cf11fSRob Herring * free_io_pgtable_ops() - Free an io_pgtable_ops structure. The caller 164b77cf11fSRob Herring * *must* ensure that the page table is no longer 165b77cf11fSRob Herring * live, but the TLB can be dirty. 166b77cf11fSRob Herring * 167b77cf11fSRob Herring * @ops: The ops returned from alloc_io_pgtable_ops. 168b77cf11fSRob Herring */ 169b77cf11fSRob Herring void free_io_pgtable_ops(struct io_pgtable_ops *ops); 170b77cf11fSRob Herring 171b77cf11fSRob Herring 172b77cf11fSRob Herring /* 173b77cf11fSRob Herring * Internal structures for page table allocator implementations. 174b77cf11fSRob Herring */ 175b77cf11fSRob Herring 176b77cf11fSRob Herring /** 177b77cf11fSRob Herring * struct io_pgtable - Internal structure describing a set of page tables. 178b77cf11fSRob Herring * 179b77cf11fSRob Herring * @fmt: The page table format. 180b77cf11fSRob Herring * @cookie: An opaque token provided by the IOMMU driver and passed back to 181b77cf11fSRob Herring * any callback routines. 182b77cf11fSRob Herring * @cfg: A copy of the page table configuration. 183b77cf11fSRob Herring * @ops: The page table operations in use for this set of page tables. 184b77cf11fSRob Herring */ 185b77cf11fSRob Herring struct io_pgtable { 186b77cf11fSRob Herring enum io_pgtable_fmt fmt; 187b77cf11fSRob Herring void *cookie; 188b77cf11fSRob Herring struct io_pgtable_cfg cfg; 189b77cf11fSRob Herring struct io_pgtable_ops ops; 190b77cf11fSRob Herring }; 191b77cf11fSRob Herring 192b77cf11fSRob Herring #define io_pgtable_ops_to_pgtable(x) container_of((x), struct io_pgtable, ops) 193b77cf11fSRob Herring 194b77cf11fSRob Herring static inline void io_pgtable_tlb_flush_all(struct io_pgtable *iop) 195b77cf11fSRob Herring { 196b77cf11fSRob Herring iop->cfg.tlb->tlb_flush_all(iop->cookie); 197b77cf11fSRob Herring } 198b77cf11fSRob Herring 19910b7a7d9SWill Deacon static inline void 20010b7a7d9SWill Deacon io_pgtable_tlb_flush_walk(struct io_pgtable *iop, unsigned long iova, 20110b7a7d9SWill Deacon size_t size, size_t granule) 20210b7a7d9SWill Deacon { 20310b7a7d9SWill Deacon iop->cfg.tlb->tlb_flush_walk(iova, size, granule, iop->cookie); 20410b7a7d9SWill Deacon } 20510b7a7d9SWill Deacon 20610b7a7d9SWill Deacon static inline void 20710b7a7d9SWill Deacon io_pgtable_tlb_flush_leaf(struct io_pgtable *iop, unsigned long iova, 20810b7a7d9SWill Deacon size_t size, size_t granule) 20910b7a7d9SWill Deacon { 21010b7a7d9SWill Deacon iop->cfg.tlb->tlb_flush_leaf(iova, size, granule, iop->cookie); 21110b7a7d9SWill Deacon } 21210b7a7d9SWill Deacon 213*abfd6fe0SWill Deacon static inline void 214*abfd6fe0SWill Deacon io_pgtable_tlb_add_page(struct io_pgtable *iop, unsigned long iova, 215*abfd6fe0SWill Deacon size_t granule) 216b77cf11fSRob Herring { 217*abfd6fe0SWill Deacon if (iop->cfg.tlb->tlb_add_page) 218*abfd6fe0SWill Deacon iop->cfg.tlb->tlb_add_page(iova, granule, iop->cookie); 219b77cf11fSRob Herring } 220b77cf11fSRob Herring 221b77cf11fSRob Herring static inline void io_pgtable_tlb_sync(struct io_pgtable *iop) 222b77cf11fSRob Herring { 223b77cf11fSRob Herring iop->cfg.tlb->tlb_sync(iop->cookie); 224b77cf11fSRob Herring } 225b77cf11fSRob Herring 226b77cf11fSRob Herring /** 227b77cf11fSRob Herring * struct io_pgtable_init_fns - Alloc/free a set of page tables for a 228b77cf11fSRob Herring * particular format. 229b77cf11fSRob Herring * 230b77cf11fSRob Herring * @alloc: Allocate a set of page tables described by cfg. 231b77cf11fSRob Herring * @free: Free the page tables associated with iop. 232b77cf11fSRob Herring */ 233b77cf11fSRob Herring struct io_pgtable_init_fns { 234b77cf11fSRob Herring struct io_pgtable *(*alloc)(struct io_pgtable_cfg *cfg, void *cookie); 235b77cf11fSRob Herring void (*free)(struct io_pgtable *iop); 236b77cf11fSRob Herring }; 237b77cf11fSRob Herring 238b77cf11fSRob Herring extern struct io_pgtable_init_fns io_pgtable_arm_32_lpae_s1_init_fns; 239b77cf11fSRob Herring extern struct io_pgtable_init_fns io_pgtable_arm_32_lpae_s2_init_fns; 240b77cf11fSRob Herring extern struct io_pgtable_init_fns io_pgtable_arm_64_lpae_s1_init_fns; 241b77cf11fSRob Herring extern struct io_pgtable_init_fns io_pgtable_arm_64_lpae_s2_init_fns; 242b77cf11fSRob Herring extern struct io_pgtable_init_fns io_pgtable_arm_v7s_init_fns; 243d08d42deSRob Herring extern struct io_pgtable_init_fns io_pgtable_arm_mali_lpae_init_fns; 244b77cf11fSRob Herring 245b77cf11fSRob Herring #endif /* __IO_PGTABLE_H */ 246