xref: /linux/include/linux/coresight.h (revision fcc8487d477a3452a1d0ccbdd4c5e0e1e3cb8bed)
1 /* Copyright (c) 2012, The Linux Foundation. All rights reserved.
2  *
3  * This program is free software; you can redistribute it and/or modify
4  * it under the terms of the GNU General Public License version 2 and
5  * only version 2 as published by the Free Software Foundation.
6  *
7  * This program is distributed in the hope that it will be useful,
8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
10  * GNU General Public License for more details.
11  */
12 
13 #ifndef _LINUX_CORESIGHT_H
14 #define _LINUX_CORESIGHT_H
15 
16 #include <linux/device.h>
17 #include <linux/perf_event.h>
18 #include <linux/sched.h>
19 
20 /* Peripheral id registers (0xFD0-0xFEC) */
21 #define CORESIGHT_PERIPHIDR4	0xfd0
22 #define CORESIGHT_PERIPHIDR5	0xfd4
23 #define CORESIGHT_PERIPHIDR6	0xfd8
24 #define CORESIGHT_PERIPHIDR7	0xfdC
25 #define CORESIGHT_PERIPHIDR0	0xfe0
26 #define CORESIGHT_PERIPHIDR1	0xfe4
27 #define CORESIGHT_PERIPHIDR2	0xfe8
28 #define CORESIGHT_PERIPHIDR3	0xfeC
29 /* Component id registers (0xFF0-0xFFC) */
30 #define CORESIGHT_COMPIDR0	0xff0
31 #define CORESIGHT_COMPIDR1	0xff4
32 #define CORESIGHT_COMPIDR2	0xff8
33 #define CORESIGHT_COMPIDR3	0xffC
34 
35 #define ETM_ARCH_V3_3		0x23
36 #define ETM_ARCH_V3_5		0x25
37 #define PFT_ARCH_V1_0		0x30
38 #define PFT_ARCH_V1_1		0x31
39 
40 #define CORESIGHT_UNLOCK	0xc5acce55
41 
42 extern struct bus_type coresight_bustype;
43 
44 enum coresight_dev_type {
45 	CORESIGHT_DEV_TYPE_NONE,
46 	CORESIGHT_DEV_TYPE_SINK,
47 	CORESIGHT_DEV_TYPE_LINK,
48 	CORESIGHT_DEV_TYPE_LINKSINK,
49 	CORESIGHT_DEV_TYPE_SOURCE,
50 };
51 
52 enum coresight_dev_subtype_sink {
53 	CORESIGHT_DEV_SUBTYPE_SINK_NONE,
54 	CORESIGHT_DEV_SUBTYPE_SINK_PORT,
55 	CORESIGHT_DEV_SUBTYPE_SINK_BUFFER,
56 };
57 
58 enum coresight_dev_subtype_link {
59 	CORESIGHT_DEV_SUBTYPE_LINK_NONE,
60 	CORESIGHT_DEV_SUBTYPE_LINK_MERG,
61 	CORESIGHT_DEV_SUBTYPE_LINK_SPLIT,
62 	CORESIGHT_DEV_SUBTYPE_LINK_FIFO,
63 };
64 
65 enum coresight_dev_subtype_source {
66 	CORESIGHT_DEV_SUBTYPE_SOURCE_NONE,
67 	CORESIGHT_DEV_SUBTYPE_SOURCE_PROC,
68 	CORESIGHT_DEV_SUBTYPE_SOURCE_BUS,
69 	CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE,
70 };
71 
72 /**
73  * struct coresight_dev_subtype - further characterisation of a type
74  * @sink_subtype:	type of sink this component is, as defined
75 			by @coresight_dev_subtype_sink.
76  * @link_subtype:	type of link this component is, as defined
77 			by @coresight_dev_subtype_link.
78  * @source_subtype:	type of source this component is, as defined
79 			by @coresight_dev_subtype_source.
80  */
81 struct coresight_dev_subtype {
82 	enum coresight_dev_subtype_sink sink_subtype;
83 	enum coresight_dev_subtype_link link_subtype;
84 	enum coresight_dev_subtype_source source_subtype;
85 };
86 
87 /**
88  * struct coresight_platform_data - data harvested from the DT specification
89  * @cpu:	the CPU a source belongs to. Only applicable for ETM/PTMs.
90  * @name:	name of the component as shown under sysfs.
91  * @nr_inport:	number of input ports for this component.
92  * @outports:	list of remote endpoint port number.
93  * @child_names:name of all child components connected to this device.
94  * @child_ports:child component port number the current component is
95 		connected  to.
96  * @nr_outport:	number of output ports for this component.
97  * @clk:	The clock this component is associated to.
98  */
99 struct coresight_platform_data {
100 	int cpu;
101 	const char *name;
102 	int nr_inport;
103 	int *outports;
104 	const char **child_names;
105 	int *child_ports;
106 	int nr_outport;
107 	struct clk *clk;
108 };
109 
110 /**
111  * struct coresight_desc - description of a component required from drivers
112  * @type:	as defined by @coresight_dev_type.
113  * @subtype:	as defined by @coresight_dev_subtype.
114  * @ops:	generic operations for this component, as defined
115 		by @coresight_ops.
116  * @pdata:	platform data collected from DT.
117  * @dev:	The device entity associated to this component.
118  * @groups:	operations specific to this component. These will end up
119 		in the component's sysfs sub-directory.
120  */
121 struct coresight_desc {
122 	enum coresight_dev_type type;
123 	struct coresight_dev_subtype subtype;
124 	const struct coresight_ops *ops;
125 	struct coresight_platform_data *pdata;
126 	struct device *dev;
127 	const struct attribute_group **groups;
128 };
129 
130 /**
131  * struct coresight_connection - representation of a single connection
132  * @outport:	a connection's output port number.
133  * @chid_name:	remote component's name.
134  * @child_port:	remote component's port number @output is connected to.
135  * @child_dev:	a @coresight_device representation of the component
136 		connected to @outport.
137  */
138 struct coresight_connection {
139 	int outport;
140 	const char *child_name;
141 	int child_port;
142 	struct coresight_device *child_dev;
143 };
144 
145 /**
146  * struct coresight_device - representation of a device as used by the framework
147  * @conns:	array of coresight_connections associated to this component.
148  * @nr_inport:	number of input port associated to this component.
149  * @nr_outport:	number of output port associated to this component.
150  * @type:	as defined by @coresight_dev_type.
151  * @subtype:	as defined by @coresight_dev_subtype.
152  * @ops:	generic operations for this component, as defined
153 		by @coresight_ops.
154  * @dev:	The device entity associated to this component.
155  * @refcnt:	keep track of what is in use.
156  * @orphan:	true if the component has connections that haven't been linked.
157  * @enable:	'true' if component is currently part of an active path.
158  * @activated:	'true' only if a _sink_ has been activated.  A sink can be
159 		activated but not yet enabled.  Enabling for a _sink_
160 		happens when a source has been selected for that it.
161  */
162 struct coresight_device {
163 	struct coresight_connection *conns;
164 	int nr_inport;
165 	int nr_outport;
166 	enum coresight_dev_type type;
167 	struct coresight_dev_subtype subtype;
168 	const struct coresight_ops *ops;
169 	struct device dev;
170 	atomic_t *refcnt;
171 	bool orphan;
172 	bool enable;	/* true only if configured as part of a path */
173 	bool activated;	/* true only if a sink is part of a path */
174 };
175 
176 #define to_coresight_device(d) container_of(d, struct coresight_device, dev)
177 
178 #define source_ops(csdev)	csdev->ops->source_ops
179 #define sink_ops(csdev)		csdev->ops->sink_ops
180 #define link_ops(csdev)		csdev->ops->link_ops
181 
182 /**
183  * struct coresight_ops_sink - basic operations for a sink
184  * Operations available for sinks
185  * @enable:		enables the sink.
186  * @disable:		disables the sink.
187  * @alloc_buffer:	initialises perf's ring buffer for trace collection.
188  * @free_buffer:	release memory allocated in @get_config.
189  * @set_buffer:		initialises buffer mechanic before a trace session.
190  * @reset_buffer:	finalises buffer mechanic after a trace session.
191  * @update_buffer:	update buffer pointers after a trace session.
192  */
193 struct coresight_ops_sink {
194 	int (*enable)(struct coresight_device *csdev, u32 mode);
195 	void (*disable)(struct coresight_device *csdev);
196 	void *(*alloc_buffer)(struct coresight_device *csdev, int cpu,
197 			      void **pages, int nr_pages, bool overwrite);
198 	void (*free_buffer)(void *config);
199 	int (*set_buffer)(struct coresight_device *csdev,
200 			  struct perf_output_handle *handle,
201 			  void *sink_config);
202 	unsigned long (*reset_buffer)(struct coresight_device *csdev,
203 				      struct perf_output_handle *handle,
204 				      void *sink_config);
205 	void (*update_buffer)(struct coresight_device *csdev,
206 			      struct perf_output_handle *handle,
207 			      void *sink_config);
208 };
209 
210 /**
211  * struct coresight_ops_link - basic operations for a link
212  * Operations available for links.
213  * @enable:	enables flow between iport and oport.
214  * @disable:	disables flow between iport and oport.
215  */
216 struct coresight_ops_link {
217 	int (*enable)(struct coresight_device *csdev, int iport, int oport);
218 	void (*disable)(struct coresight_device *csdev, int iport, int oport);
219 };
220 
221 /**
222  * struct coresight_ops_source - basic operations for a source
223  * Operations available for sources.
224  * @cpu_id:	returns the value of the CPU number this component
225  *		is associated to.
226  * @trace_id:	returns the value of the component's trace ID as known
227  *		to the HW.
228  * @enable:	enables tracing for a source.
229  * @disable:	disables tracing for a source.
230  */
231 struct coresight_ops_source {
232 	int (*cpu_id)(struct coresight_device *csdev);
233 	int (*trace_id)(struct coresight_device *csdev);
234 	int (*enable)(struct coresight_device *csdev,
235 		      struct perf_event *event,  u32 mode);
236 	void (*disable)(struct coresight_device *csdev,
237 			struct perf_event *event);
238 };
239 
240 struct coresight_ops {
241 	const struct coresight_ops_sink *sink_ops;
242 	const struct coresight_ops_link *link_ops;
243 	const struct coresight_ops_source *source_ops;
244 };
245 
246 #ifdef CONFIG_CORESIGHT
247 extern struct coresight_device *
248 coresight_register(struct coresight_desc *desc);
249 extern void coresight_unregister(struct coresight_device *csdev);
250 extern int coresight_enable(struct coresight_device *csdev);
251 extern void coresight_disable(struct coresight_device *csdev);
252 extern int coresight_timeout(void __iomem *addr, u32 offset,
253 			     int position, int value);
254 #else
255 static inline struct coresight_device *
256 coresight_register(struct coresight_desc *desc) { return NULL; }
257 static inline void coresight_unregister(struct coresight_device *csdev) {}
258 static inline int
259 coresight_enable(struct coresight_device *csdev) { return -ENOSYS; }
260 static inline void coresight_disable(struct coresight_device *csdev) {}
261 static inline int coresight_timeout(void __iomem *addr, u32 offset,
262 				     int position, int value) { return 1; }
263 #endif
264 
265 #ifdef CONFIG_OF
266 extern struct coresight_platform_data *of_get_coresight_platform_data(
267 				struct device *dev, struct device_node *node);
268 #else
269 static inline struct coresight_platform_data *of_get_coresight_platform_data(
270 	struct device *dev, struct device_node *node) { return NULL; }
271 #endif
272 
273 #ifdef CONFIG_PID_NS
274 static inline unsigned long
275 coresight_vpid_to_pid(unsigned long vpid)
276 {
277 	struct task_struct *task = NULL;
278 	unsigned long pid = 0;
279 
280 	rcu_read_lock();
281 	task = find_task_by_vpid(vpid);
282 	if (task)
283 		pid = task_pid_nr(task);
284 	rcu_read_unlock();
285 
286 	return pid;
287 }
288 #else
289 static inline unsigned long
290 coresight_vpid_to_pid(unsigned long vpid) { return vpid; }
291 #endif
292 
293 #endif
294