xref: /linux/include/linux/coresight.h (revision f79e4d5f92a129a1159c973735007d4ddc8541f3)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (c) 2012, The Linux Foundation. All rights reserved.
4  */
5 
6 #ifndef _LINUX_CORESIGHT_H
7 #define _LINUX_CORESIGHT_H
8 
9 #include <linux/device.h>
10 #include <linux/perf_event.h>
11 #include <linux/sched.h>
12 
13 /* Peripheral id registers (0xFD0-0xFEC) */
14 #define CORESIGHT_PERIPHIDR4	0xfd0
15 #define CORESIGHT_PERIPHIDR5	0xfd4
16 #define CORESIGHT_PERIPHIDR6	0xfd8
17 #define CORESIGHT_PERIPHIDR7	0xfdC
18 #define CORESIGHT_PERIPHIDR0	0xfe0
19 #define CORESIGHT_PERIPHIDR1	0xfe4
20 #define CORESIGHT_PERIPHIDR2	0xfe8
21 #define CORESIGHT_PERIPHIDR3	0xfeC
22 /* Component id registers (0xFF0-0xFFC) */
23 #define CORESIGHT_COMPIDR0	0xff0
24 #define CORESIGHT_COMPIDR1	0xff4
25 #define CORESIGHT_COMPIDR2	0xff8
26 #define CORESIGHT_COMPIDR3	0xffC
27 
28 #define ETM_ARCH_V3_3		0x23
29 #define ETM_ARCH_V3_5		0x25
30 #define PFT_ARCH_V1_0		0x30
31 #define PFT_ARCH_V1_1		0x31
32 
33 #define CORESIGHT_UNLOCK	0xc5acce55
34 
35 extern struct bus_type coresight_bustype;
36 
37 enum coresight_dev_type {
38 	CORESIGHT_DEV_TYPE_NONE,
39 	CORESIGHT_DEV_TYPE_SINK,
40 	CORESIGHT_DEV_TYPE_LINK,
41 	CORESIGHT_DEV_TYPE_LINKSINK,
42 	CORESIGHT_DEV_TYPE_SOURCE,
43 };
44 
45 enum coresight_dev_subtype_sink {
46 	CORESIGHT_DEV_SUBTYPE_SINK_NONE,
47 	CORESIGHT_DEV_SUBTYPE_SINK_PORT,
48 	CORESIGHT_DEV_SUBTYPE_SINK_BUFFER,
49 };
50 
51 enum coresight_dev_subtype_link {
52 	CORESIGHT_DEV_SUBTYPE_LINK_NONE,
53 	CORESIGHT_DEV_SUBTYPE_LINK_MERG,
54 	CORESIGHT_DEV_SUBTYPE_LINK_SPLIT,
55 	CORESIGHT_DEV_SUBTYPE_LINK_FIFO,
56 };
57 
58 enum coresight_dev_subtype_source {
59 	CORESIGHT_DEV_SUBTYPE_SOURCE_NONE,
60 	CORESIGHT_DEV_SUBTYPE_SOURCE_PROC,
61 	CORESIGHT_DEV_SUBTYPE_SOURCE_BUS,
62 	CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE,
63 };
64 
65 /**
66  * struct coresight_dev_subtype - further characterisation of a type
67  * @sink_subtype:	type of sink this component is, as defined
68 			by @coresight_dev_subtype_sink.
69  * @link_subtype:	type of link this component is, as defined
70 			by @coresight_dev_subtype_link.
71  * @source_subtype:	type of source this component is, as defined
72 			by @coresight_dev_subtype_source.
73  */
74 struct coresight_dev_subtype {
75 	enum coresight_dev_subtype_sink sink_subtype;
76 	enum coresight_dev_subtype_link link_subtype;
77 	enum coresight_dev_subtype_source source_subtype;
78 };
79 
80 /**
81  * struct coresight_platform_data - data harvested from the DT specification
82  * @cpu:	the CPU a source belongs to. Only applicable for ETM/PTMs.
83  * @name:	name of the component as shown under sysfs.
84  * @nr_inport:	number of input ports for this component.
85  * @outports:	list of remote endpoint port number.
86  * @child_names:name of all child components connected to this device.
87  * @child_ports:child component port number the current component is
88 		connected  to.
89  * @nr_outport:	number of output ports for this component.
90  * @clk:	The clock this component is associated to.
91  */
92 struct coresight_platform_data {
93 	int cpu;
94 	const char *name;
95 	int nr_inport;
96 	int *outports;
97 	const char **child_names;
98 	int *child_ports;
99 	int nr_outport;
100 	struct clk *clk;
101 };
102 
103 /**
104  * struct coresight_desc - description of a component required from drivers
105  * @type:	as defined by @coresight_dev_type.
106  * @subtype:	as defined by @coresight_dev_subtype.
107  * @ops:	generic operations for this component, as defined
108 		by @coresight_ops.
109  * @pdata:	platform data collected from DT.
110  * @dev:	The device entity associated to this component.
111  * @groups:	operations specific to this component. These will end up
112 		in the component's sysfs sub-directory.
113  */
114 struct coresight_desc {
115 	enum coresight_dev_type type;
116 	struct coresight_dev_subtype subtype;
117 	const struct coresight_ops *ops;
118 	struct coresight_platform_data *pdata;
119 	struct device *dev;
120 	const struct attribute_group **groups;
121 };
122 
123 /**
124  * struct coresight_connection - representation of a single connection
125  * @outport:	a connection's output port number.
126  * @chid_name:	remote component's name.
127  * @child_port:	remote component's port number @output is connected to.
128  * @child_dev:	a @coresight_device representation of the component
129 		connected to @outport.
130  */
131 struct coresight_connection {
132 	int outport;
133 	const char *child_name;
134 	int child_port;
135 	struct coresight_device *child_dev;
136 };
137 
138 /**
139  * struct coresight_device - representation of a device as used by the framework
140  * @conns:	array of coresight_connections associated to this component.
141  * @nr_inport:	number of input port associated to this component.
142  * @nr_outport:	number of output port associated to this component.
143  * @type:	as defined by @coresight_dev_type.
144  * @subtype:	as defined by @coresight_dev_subtype.
145  * @ops:	generic operations for this component, as defined
146 		by @coresight_ops.
147  * @dev:	The device entity associated to this component.
148  * @refcnt:	keep track of what is in use.
149  * @orphan:	true if the component has connections that haven't been linked.
150  * @enable:	'true' if component is currently part of an active path.
151  * @activated:	'true' only if a _sink_ has been activated.  A sink can be
152 		activated but not yet enabled.  Enabling for a _sink_
153 		happens when a source has been selected for that it.
154  */
155 struct coresight_device {
156 	struct coresight_connection *conns;
157 	int nr_inport;
158 	int nr_outport;
159 	enum coresight_dev_type type;
160 	struct coresight_dev_subtype subtype;
161 	const struct coresight_ops *ops;
162 	struct device dev;
163 	atomic_t *refcnt;
164 	bool orphan;
165 	bool enable;	/* true only if configured as part of a path */
166 	bool activated;	/* true only if a sink is part of a path */
167 };
168 
169 #define to_coresight_device(d) container_of(d, struct coresight_device, dev)
170 
171 #define source_ops(csdev)	csdev->ops->source_ops
172 #define sink_ops(csdev)		csdev->ops->sink_ops
173 #define link_ops(csdev)		csdev->ops->link_ops
174 
175 /**
176  * struct coresight_ops_sink - basic operations for a sink
177  * Operations available for sinks
178  * @enable:		enables the sink.
179  * @disable:		disables the sink.
180  * @alloc_buffer:	initialises perf's ring buffer for trace collection.
181  * @free_buffer:	release memory allocated in @get_config.
182  * @set_buffer:		initialises buffer mechanic before a trace session.
183  * @reset_buffer:	finalises buffer mechanic after a trace session.
184  * @update_buffer:	update buffer pointers after a trace session.
185  */
186 struct coresight_ops_sink {
187 	int (*enable)(struct coresight_device *csdev, u32 mode);
188 	void (*disable)(struct coresight_device *csdev);
189 	void *(*alloc_buffer)(struct coresight_device *csdev, int cpu,
190 			      void **pages, int nr_pages, bool overwrite);
191 	void (*free_buffer)(void *config);
192 	int (*set_buffer)(struct coresight_device *csdev,
193 			  struct perf_output_handle *handle,
194 			  void *sink_config);
195 	unsigned long (*reset_buffer)(struct coresight_device *csdev,
196 				      struct perf_output_handle *handle,
197 				      void *sink_config);
198 	void (*update_buffer)(struct coresight_device *csdev,
199 			      struct perf_output_handle *handle,
200 			      void *sink_config);
201 };
202 
203 /**
204  * struct coresight_ops_link - basic operations for a link
205  * Operations available for links.
206  * @enable:	enables flow between iport and oport.
207  * @disable:	disables flow between iport and oport.
208  */
209 struct coresight_ops_link {
210 	int (*enable)(struct coresight_device *csdev, int iport, int oport);
211 	void (*disable)(struct coresight_device *csdev, int iport, int oport);
212 };
213 
214 /**
215  * struct coresight_ops_source - basic operations for a source
216  * Operations available for sources.
217  * @cpu_id:	returns the value of the CPU number this component
218  *		is associated to.
219  * @trace_id:	returns the value of the component's trace ID as known
220  *		to the HW.
221  * @enable:	enables tracing for a source.
222  * @disable:	disables tracing for a source.
223  */
224 struct coresight_ops_source {
225 	int (*cpu_id)(struct coresight_device *csdev);
226 	int (*trace_id)(struct coresight_device *csdev);
227 	int (*enable)(struct coresight_device *csdev,
228 		      struct perf_event *event,  u32 mode);
229 	void (*disable)(struct coresight_device *csdev,
230 			struct perf_event *event);
231 };
232 
233 struct coresight_ops {
234 	const struct coresight_ops_sink *sink_ops;
235 	const struct coresight_ops_link *link_ops;
236 	const struct coresight_ops_source *source_ops;
237 };
238 
239 #ifdef CONFIG_CORESIGHT
240 extern struct coresight_device *
241 coresight_register(struct coresight_desc *desc);
242 extern void coresight_unregister(struct coresight_device *csdev);
243 extern int coresight_enable(struct coresight_device *csdev);
244 extern void coresight_disable(struct coresight_device *csdev);
245 extern int coresight_timeout(void __iomem *addr, u32 offset,
246 			     int position, int value);
247 #else
248 static inline struct coresight_device *
249 coresight_register(struct coresight_desc *desc) { return NULL; }
250 static inline void coresight_unregister(struct coresight_device *csdev) {}
251 static inline int
252 coresight_enable(struct coresight_device *csdev) { return -ENOSYS; }
253 static inline void coresight_disable(struct coresight_device *csdev) {}
254 static inline int coresight_timeout(void __iomem *addr, u32 offset,
255 				     int position, int value) { return 1; }
256 #endif
257 
258 #ifdef CONFIG_OF
259 extern int of_coresight_get_cpu(const struct device_node *node);
260 extern struct coresight_platform_data *
261 of_get_coresight_platform_data(struct device *dev,
262 			       const struct device_node *node);
263 #else
264 static inline int of_coresight_get_cpu(const struct device_node *node)
265 { return 0; }
266 static inline struct coresight_platform_data *of_get_coresight_platform_data(
267 	struct device *dev, const struct device_node *node) { return NULL; }
268 #endif
269 
270 #ifdef CONFIG_PID_NS
271 static inline unsigned long
272 coresight_vpid_to_pid(unsigned long vpid)
273 {
274 	struct task_struct *task = NULL;
275 	unsigned long pid = 0;
276 
277 	rcu_read_lock();
278 	task = find_task_by_vpid(vpid);
279 	if (task)
280 		pid = task_pid_nr(task);
281 	rcu_read_unlock();
282 
283 	return pid;
284 }
285 #else
286 static inline unsigned long
287 coresight_vpid_to_pid(unsigned long vpid) { return vpid; }
288 #endif
289 
290 #endif
291