1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2015 Linaro Ltd. 4 * Author: Shannon Zhao <shannon.zhao@linaro.org> 5 */ 6 7 #ifndef __ASM_ARM_KVM_PMU_H 8 #define __ASM_ARM_KVM_PMU_H 9 10 #include <linux/perf_event.h> 11 #include <linux/perf/arm_pmuv3.h> 12 13 #define KVM_ARMV8_PMU_MAX_COUNTERS 32 14 15 /* PPI #23 - architecturally specified for GICv5 */ 16 #define KVM_ARMV8_PMU_GICV5_IRQ 0x20000017 17 18 #if IS_ENABLED(CONFIG_HW_PERF_EVENTS) && IS_ENABLED(CONFIG_KVM) 19 struct kvm_pmc { 20 u8 idx; /* index into the pmu->pmc array */ 21 struct perf_event *perf_event; 22 }; 23 24 struct kvm_pmu_events { 25 u64 events_host; 26 u64 events_guest; 27 }; 28 29 struct kvm_pmu { 30 struct irq_work overflow_work; 31 struct kvm_pmu_events events; 32 struct kvm_pmc pmc[KVM_ARMV8_PMU_MAX_COUNTERS]; 33 int irq_num; 34 bool created; 35 }; 36 37 struct arm_pmu_entry { 38 struct list_head entry; 39 struct arm_pmu *arm_pmu; 40 }; 41 42 bool kvm_supports_guest_pmuv3(void); 43 #define kvm_arm_pmu_irq_initialized(v) ((v)->arch.pmu.irq_num != 0) 44 u64 kvm_pmu_get_counter_value(struct kvm_vcpu *vcpu, u64 select_idx); 45 void kvm_pmu_set_counter_value(struct kvm_vcpu *vcpu, u64 select_idx, u64 val); 46 void kvm_pmu_set_counter_value_user(struct kvm_vcpu *vcpu, u64 select_idx, u64 val); 47 u64 kvm_pmu_implemented_counter_mask(struct kvm_vcpu *vcpu); 48 u64 kvm_pmu_accessible_counter_mask(struct kvm_vcpu *vcpu); 49 u64 kvm_pmu_get_pmceid(struct kvm_vcpu *vcpu, bool pmceid1); 50 void kvm_pmu_vcpu_init(struct kvm_vcpu *vcpu); 51 void kvm_pmu_vcpu_destroy(struct kvm_vcpu *vcpu); 52 void kvm_pmu_reprogram_counter_mask(struct kvm_vcpu *vcpu, u64 val); 53 void kvm_pmu_flush_hwstate(struct kvm_vcpu *vcpu); 54 void kvm_pmu_sync_hwstate(struct kvm_vcpu *vcpu); 55 bool kvm_pmu_should_notify_user(struct kvm_vcpu *vcpu); 56 bool kvm_pmu_update_run(struct kvm_vcpu *vcpu); 57 void kvm_pmu_software_increment(struct kvm_vcpu *vcpu, u64 val); 58 void kvm_pmu_handle_pmcr(struct kvm_vcpu *vcpu, u64 val); 59 void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu, u64 data, 60 u64 select_idx); 61 void kvm_vcpu_reload_pmu(struct kvm_vcpu *vcpu); 62 int kvm_arm_pmu_v3_set_attr(struct kvm_vcpu *vcpu, 63 struct kvm_device_attr *attr); 64 int kvm_arm_pmu_v3_get_attr(struct kvm_vcpu *vcpu, 65 struct kvm_device_attr *attr); 66 int kvm_arm_pmu_v3_has_attr(struct kvm_vcpu *vcpu, 67 struct kvm_device_attr *attr); 68 int kvm_arm_pmu_v3_enable(struct kvm_vcpu *vcpu); 69 70 struct kvm_pmu_events *kvm_get_pmu_events(void); 71 void kvm_vcpu_pmu_restore_guest(struct kvm_vcpu *vcpu); 72 void kvm_vcpu_pmu_restore_host(struct kvm_vcpu *vcpu); 73 void kvm_vcpu_pmu_resync_el0(void); 74 75 #define kvm_vcpu_has_pmu(vcpu) \ 76 (vcpu_has_feature(vcpu, KVM_ARM_VCPU_PMU_V3)) 77 78 /* 79 * Updates the vcpu's view of the pmu events for this cpu. 80 * Must be called before every vcpu run after disabling interrupts, to ensure 81 * that an interrupt cannot fire and update the structure. 82 */ 83 #define kvm_pmu_update_vcpu_events(vcpu) \ 84 do { \ 85 if (!has_vhe() && system_supports_pmuv3()) \ 86 vcpu->arch.pmu.events = *kvm_get_pmu_events(); \ 87 } while (0) 88 89 u8 kvm_arm_pmu_get_pmuver_limit(void); 90 u64 kvm_pmu_evtyper_mask(struct kvm *kvm); 91 int kvm_arm_set_default_pmu(struct kvm *kvm); 92 u8 kvm_arm_pmu_get_max_counters(struct kvm *kvm); 93 94 u64 kvm_vcpu_read_pmcr(struct kvm_vcpu *vcpu); 95 bool kvm_pmu_counter_is_hyp(struct kvm_vcpu *vcpu, unsigned int idx); 96 void kvm_pmu_nested_transition(struct kvm_vcpu *vcpu); 97 #else 98 struct kvm_pmu { 99 }; 100 101 static inline bool kvm_supports_guest_pmuv3(void) 102 { 103 return false; 104 } 105 106 #define kvm_arm_pmu_irq_initialized(v) (false) 107 static inline u64 kvm_pmu_get_counter_value(struct kvm_vcpu *vcpu, 108 u64 select_idx) 109 { 110 return 0; 111 } 112 static inline void kvm_pmu_set_counter_value(struct kvm_vcpu *vcpu, 113 u64 select_idx, u64 val) {} 114 static inline void kvm_pmu_set_counter_value_user(struct kvm_vcpu *vcpu, 115 u64 select_idx, u64 val) {} 116 static inline u64 kvm_pmu_implemented_counter_mask(struct kvm_vcpu *vcpu) 117 { 118 return 0; 119 } 120 static inline u64 kvm_pmu_accessible_counter_mask(struct kvm_vcpu *vcpu) 121 { 122 return 0; 123 } 124 static inline void kvm_pmu_vcpu_init(struct kvm_vcpu *vcpu) {} 125 static inline void kvm_pmu_vcpu_destroy(struct kvm_vcpu *vcpu) {} 126 static inline void kvm_pmu_reprogram_counter_mask(struct kvm_vcpu *vcpu, u64 val) {} 127 static inline void kvm_pmu_flush_hwstate(struct kvm_vcpu *vcpu) {} 128 static inline void kvm_pmu_sync_hwstate(struct kvm_vcpu *vcpu) {} 129 static inline bool kvm_pmu_should_notify_user(struct kvm_vcpu *vcpu) 130 { 131 return false; 132 } 133 static inline bool kvm_pmu_update_run(struct kvm_vcpu *vcpu) { return false; } 134 static inline void kvm_pmu_software_increment(struct kvm_vcpu *vcpu, u64 val) {} 135 static inline void kvm_pmu_handle_pmcr(struct kvm_vcpu *vcpu, u64 val) {} 136 static inline void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu, 137 u64 data, u64 select_idx) {} 138 static inline int kvm_arm_pmu_v3_set_attr(struct kvm_vcpu *vcpu, 139 struct kvm_device_attr *attr) 140 { 141 return -ENXIO; 142 } 143 static inline int kvm_arm_pmu_v3_get_attr(struct kvm_vcpu *vcpu, 144 struct kvm_device_attr *attr) 145 { 146 return -ENXIO; 147 } 148 static inline int kvm_arm_pmu_v3_has_attr(struct kvm_vcpu *vcpu, 149 struct kvm_device_attr *attr) 150 { 151 return -ENXIO; 152 } 153 static inline int kvm_arm_pmu_v3_enable(struct kvm_vcpu *vcpu) 154 { 155 return 0; 156 } 157 static inline u64 kvm_pmu_get_pmceid(struct kvm_vcpu *vcpu, bool pmceid1) 158 { 159 return 0; 160 } 161 162 #define kvm_vcpu_has_pmu(vcpu) ({ false; }) 163 static inline void kvm_pmu_update_vcpu_events(struct kvm_vcpu *vcpu) {} 164 static inline void kvm_vcpu_pmu_restore_guest(struct kvm_vcpu *vcpu) {} 165 static inline void kvm_vcpu_pmu_restore_host(struct kvm_vcpu *vcpu) {} 166 static inline void kvm_vcpu_reload_pmu(struct kvm_vcpu *vcpu) {} 167 static inline u8 kvm_arm_pmu_get_pmuver_limit(void) 168 { 169 return 0; 170 } 171 static inline u64 kvm_pmu_evtyper_mask(struct kvm *kvm) 172 { 173 return 0; 174 } 175 static inline void kvm_vcpu_pmu_resync_el0(void) {} 176 177 static inline int kvm_arm_set_default_pmu(struct kvm *kvm) 178 { 179 return -ENODEV; 180 } 181 182 static inline u8 kvm_arm_pmu_get_max_counters(struct kvm *kvm) 183 { 184 return 0; 185 } 186 187 static inline u64 kvm_vcpu_read_pmcr(struct kvm_vcpu *vcpu) 188 { 189 return 0; 190 } 191 192 static inline bool kvm_pmu_counter_is_hyp(struct kvm_vcpu *vcpu, unsigned int idx) 193 { 194 return false; 195 } 196 197 static inline void kvm_pmu_nested_transition(struct kvm_vcpu *vcpu) {} 198 199 #endif 200 201 #endif 202