1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (C) 2015 Linaro Ltd. 4 * Author: Shannon Zhao <shannon.zhao@linaro.org> 5 */ 6 7 #ifndef __ASM_ARM_KVM_PMU_H 8 #define __ASM_ARM_KVM_PMU_H 9 10 #include <linux/perf_event.h> 11 #include <linux/perf/arm_pmuv3.h> 12 13 #define KVM_ARMV8_PMU_MAX_COUNTERS 32 14 15 /* PPI #23 - architecturally specified for GICv5 */ 16 #define KVM_ARMV8_PMU_GICV5_IRQ 0x20000017 17 18 #if IS_ENABLED(CONFIG_HW_PERF_EVENTS) && IS_ENABLED(CONFIG_KVM) 19 struct kvm_pmc { 20 u8 idx; /* index into the pmu->pmc array */ 21 struct perf_event *perf_event; 22 }; 23 24 struct kvm_pmu_events { 25 u64 events_host; 26 u64 events_guest; 27 }; 28 29 struct kvm_pmu { 30 struct irq_work overflow_work; 31 struct kvm_pmu_events events; 32 struct kvm_pmc pmc[KVM_ARMV8_PMU_MAX_COUNTERS]; 33 int irq_num; 34 bool created; 35 }; 36 37 struct arm_pmu_entry { 38 struct list_head entry; 39 struct arm_pmu *arm_pmu; 40 }; 41 42 bool kvm_supports_guest_pmuv3(void); 43 #define kvm_arm_pmu_irq_initialized(v) ((v)->arch.pmu.irq_num != 0) 44 u64 kvm_pmu_get_counter_value(struct kvm_vcpu *vcpu, u64 select_idx); 45 void kvm_pmu_set_counter_value(struct kvm_vcpu *vcpu, u64 select_idx, u64 val); 46 void kvm_pmu_set_counter_value_user(struct kvm_vcpu *vcpu, u64 select_idx, u64 val); 47 u64 kvm_pmu_implemented_counter_mask(struct kvm_vcpu *vcpu); 48 u64 kvm_pmu_accessible_counter_mask(struct kvm_vcpu *vcpu); 49 u64 kvm_pmu_get_pmceid(struct kvm_vcpu *vcpu, bool pmceid1); 50 void kvm_pmu_vcpu_init(struct kvm_vcpu *vcpu); 51 void kvm_pmu_vcpu_destroy(struct kvm_vcpu *vcpu); 52 void kvm_pmu_reprogram_counter_mask(struct kvm_vcpu *vcpu, u64 val); 53 void kvm_pmu_flush_hwstate(struct kvm_vcpu *vcpu); 54 void kvm_pmu_sync_hwstate(struct kvm_vcpu *vcpu); 55 bool kvm_pmu_should_notify_user(struct kvm_vcpu *vcpu); 56 bool kvm_pmu_update_run(struct kvm_vcpu *vcpu); 57 void kvm_pmu_software_increment(struct kvm_vcpu *vcpu, u64 val); 58 void kvm_pmu_handle_pmcr(struct kvm_vcpu *vcpu, u64 val); 59 void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu, u64 data, 60 u64 select_idx); 61 void kvm_vcpu_reload_pmu(struct kvm_vcpu *vcpu); 62 int kvm_arm_pmu_v3_set_attr(struct kvm_vcpu *vcpu, 63 struct kvm_device_attr *attr); 64 int kvm_arm_pmu_v3_get_attr(struct kvm_vcpu *vcpu, 65 struct kvm_device_attr *attr); 66 int kvm_arm_pmu_v3_has_attr(struct kvm_vcpu *vcpu, 67 struct kvm_device_attr *attr); 68 int kvm_arm_pmu_v3_enable(struct kvm_vcpu *vcpu); 69 70 struct kvm_pmu_events *kvm_get_pmu_events(void); 71 void kvm_vcpu_pmu_restore_guest(struct kvm_vcpu *vcpu); 72 void kvm_vcpu_pmu_restore_host(struct kvm_vcpu *vcpu); 73 void kvm_vcpu_pmu_resync_el0(void); 74 75 #define kvm_vcpu_has_pmu(vcpu) \ 76 (vcpu_has_feature(vcpu, KVM_ARM_VCPU_PMU_V3)) 77 78 #define kvm_vcpu_has_pmuv3_strict(vcpu) \ 79 (vcpu_has_feature(vcpu, KVM_ARM_VCPU_PMU_V3_STRICT)) 80 81 /* 82 * Updates the vcpu's view of the pmu events for this cpu. 83 * Must be called before every vcpu run after disabling interrupts, to ensure 84 * that an interrupt cannot fire and update the structure. 85 */ 86 #define kvm_pmu_update_vcpu_events(vcpu) \ 87 do { \ 88 if (!has_vhe() && system_supports_pmuv3()) \ 89 vcpu->arch.pmu.events = *kvm_get_pmu_events(); \ 90 } while (0) 91 92 u8 kvm_arm_pmu_get_pmuver_limit(void); 93 u64 kvm_pmu_evtyper_mask(struct kvm *kvm); 94 int kvm_arm_set_default_pmu(struct kvm *kvm); 95 u8 kvm_arm_pmu_get_max_counters(struct kvm *kvm); 96 97 u64 kvm_vcpu_read_pmcr(struct kvm_vcpu *vcpu); 98 bool kvm_pmu_counter_is_hyp(struct kvm_vcpu *vcpu, unsigned int idx); 99 void kvm_pmu_nested_transition(struct kvm_vcpu *vcpu); 100 #else 101 struct kvm_pmu { 102 }; 103 104 static inline bool kvm_supports_guest_pmuv3(void) 105 { 106 return false; 107 } 108 109 #define kvm_arm_pmu_irq_initialized(v) (false) 110 static inline u64 kvm_pmu_get_counter_value(struct kvm_vcpu *vcpu, 111 u64 select_idx) 112 { 113 return 0; 114 } 115 static inline void kvm_pmu_set_counter_value(struct kvm_vcpu *vcpu, 116 u64 select_idx, u64 val) {} 117 static inline void kvm_pmu_set_counter_value_user(struct kvm_vcpu *vcpu, 118 u64 select_idx, u64 val) {} 119 static inline u64 kvm_pmu_implemented_counter_mask(struct kvm_vcpu *vcpu) 120 { 121 return 0; 122 } 123 static inline u64 kvm_pmu_accessible_counter_mask(struct kvm_vcpu *vcpu) 124 { 125 return 0; 126 } 127 static inline void kvm_pmu_vcpu_init(struct kvm_vcpu *vcpu) {} 128 static inline void kvm_pmu_vcpu_destroy(struct kvm_vcpu *vcpu) {} 129 static inline void kvm_pmu_reprogram_counter_mask(struct kvm_vcpu *vcpu, u64 val) {} 130 static inline void kvm_pmu_flush_hwstate(struct kvm_vcpu *vcpu) {} 131 static inline void kvm_pmu_sync_hwstate(struct kvm_vcpu *vcpu) {} 132 static inline bool kvm_pmu_should_notify_user(struct kvm_vcpu *vcpu) 133 { 134 return false; 135 } 136 static inline bool kvm_pmu_update_run(struct kvm_vcpu *vcpu) { return false; } 137 static inline void kvm_pmu_software_increment(struct kvm_vcpu *vcpu, u64 val) {} 138 static inline void kvm_pmu_handle_pmcr(struct kvm_vcpu *vcpu, u64 val) {} 139 static inline void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu, 140 u64 data, u64 select_idx) {} 141 static inline int kvm_arm_pmu_v3_set_attr(struct kvm_vcpu *vcpu, 142 struct kvm_device_attr *attr) 143 { 144 return -ENXIO; 145 } 146 static inline int kvm_arm_pmu_v3_get_attr(struct kvm_vcpu *vcpu, 147 struct kvm_device_attr *attr) 148 { 149 return -ENXIO; 150 } 151 static inline int kvm_arm_pmu_v3_has_attr(struct kvm_vcpu *vcpu, 152 struct kvm_device_attr *attr) 153 { 154 return -ENXIO; 155 } 156 static inline int kvm_arm_pmu_v3_enable(struct kvm_vcpu *vcpu) 157 { 158 return 0; 159 } 160 static inline u64 kvm_pmu_get_pmceid(struct kvm_vcpu *vcpu, bool pmceid1) 161 { 162 return 0; 163 } 164 165 #define kvm_vcpu_has_pmu(vcpu) ({ false; }) 166 #define kvm_vcpu_has_pmuv3_strict(vcpu) ({ false; }) 167 static inline void kvm_pmu_update_vcpu_events(struct kvm_vcpu *vcpu) {} 168 static inline void kvm_vcpu_pmu_restore_guest(struct kvm_vcpu *vcpu) {} 169 static inline void kvm_vcpu_pmu_restore_host(struct kvm_vcpu *vcpu) {} 170 static inline void kvm_vcpu_reload_pmu(struct kvm_vcpu *vcpu) {} 171 static inline u8 kvm_arm_pmu_get_pmuver_limit(void) 172 { 173 return 0; 174 } 175 static inline u64 kvm_pmu_evtyper_mask(struct kvm *kvm) 176 { 177 return 0; 178 } 179 static inline void kvm_vcpu_pmu_resync_el0(void) {} 180 181 static inline int kvm_arm_set_default_pmu(struct kvm *kvm) 182 { 183 return -ENODEV; 184 } 185 186 static inline u8 kvm_arm_pmu_get_max_counters(struct kvm *kvm) 187 { 188 return 0; 189 } 190 191 static inline u64 kvm_vcpu_read_pmcr(struct kvm_vcpu *vcpu) 192 { 193 return 0; 194 } 195 196 static inline bool kvm_pmu_counter_is_hyp(struct kvm_vcpu *vcpu, unsigned int idx) 197 { 198 return false; 199 } 200 201 static inline void kvm_pmu_nested_transition(struct kvm_vcpu *vcpu) {} 202 203 #endif 204 205 #endif 206