1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Type definitions for the Microsoft hypervisor. 4 */ 5 #ifndef _HV_HVHDK_H 6 #define _HV_HVHDK_H 7 8 #include <linux/build_bug.h> 9 10 #include "hvhdk_mini.h" 11 #include "hvgdk.h" 12 13 /* 14 * Hypervisor statistics page format 15 */ 16 struct hv_stats_page { 17 u64 data[HV_HYP_PAGE_SIZE / sizeof(u64)]; 18 } __packed; 19 20 /* Bits for dirty mask of hv_vp_register_page */ 21 #define HV_X64_REGISTER_CLASS_GENERAL 0 22 #define HV_X64_REGISTER_CLASS_IP 1 23 #define HV_X64_REGISTER_CLASS_XMM 2 24 #define HV_X64_REGISTER_CLASS_SEGMENT 3 25 #define HV_X64_REGISTER_CLASS_FLAGS 4 26 27 #define HV_VP_REGISTER_PAGE_VERSION_1 1u 28 29 #define HV_VP_REGISTER_PAGE_MAX_VECTOR_COUNT 7 30 31 union hv_vp_register_page_interrupt_vectors { 32 u64 as_uint64; 33 struct { 34 u8 vector_count; 35 u8 vector[HV_VP_REGISTER_PAGE_MAX_VECTOR_COUNT]; 36 } __packed; 37 }; 38 39 struct hv_vp_register_page { 40 u16 version; 41 u8 isvalid; 42 u8 rsvdz; 43 u32 dirty; 44 45 #if IS_ENABLED(CONFIG_X86) 46 47 union { 48 struct { 49 /* General purpose registers 50 * (HV_X64_REGISTER_CLASS_GENERAL) 51 */ 52 union { 53 struct { 54 u64 rax; 55 u64 rcx; 56 u64 rdx; 57 u64 rbx; 58 u64 rsp; 59 u64 rbp; 60 u64 rsi; 61 u64 rdi; 62 u64 r8; 63 u64 r9; 64 u64 r10; 65 u64 r11; 66 u64 r12; 67 u64 r13; 68 u64 r14; 69 u64 r15; 70 } __packed; 71 72 u64 gp_registers[16]; 73 }; 74 /* Instruction pointer (HV_X64_REGISTER_CLASS_IP) */ 75 u64 rip; 76 /* Flags (HV_X64_REGISTER_CLASS_FLAGS) */ 77 u64 rflags; 78 } __packed; 79 80 u64 registers[18]; 81 }; 82 /* Volatile XMM registers (HV_X64_REGISTER_CLASS_XMM) */ 83 union { 84 struct { 85 struct hv_u128 xmm0; 86 struct hv_u128 xmm1; 87 struct hv_u128 xmm2; 88 struct hv_u128 xmm3; 89 struct hv_u128 xmm4; 90 struct hv_u128 xmm5; 91 } __packed; 92 93 struct hv_u128 xmm_registers[6]; 94 }; 95 /* Segment registers (HV_X64_REGISTER_CLASS_SEGMENT) */ 96 union { 97 struct { 98 struct hv_x64_segment_register es; 99 struct hv_x64_segment_register cs; 100 struct hv_x64_segment_register ss; 101 struct hv_x64_segment_register ds; 102 struct hv_x64_segment_register fs; 103 struct hv_x64_segment_register gs; 104 } __packed; 105 106 struct hv_x64_segment_register segment_registers[6]; 107 }; 108 /* Misc. control registers (cannot be set via this interface) */ 109 u64 cr0; 110 u64 cr3; 111 u64 cr4; 112 u64 cr8; 113 u64 efer; 114 u64 dr7; 115 union hv_x64_pending_interruption_register pending_interruption; 116 union hv_x64_interrupt_state_register interrupt_state; 117 u64 instruction_emulation_hints; 118 u64 xfem; 119 120 /* 121 * Fields from this point are not included in the register page save chunk. 122 * The reserved field is intended to maintain alignment for unsaved fields. 123 */ 124 u8 reserved1[0x100]; 125 126 /* 127 * Interrupts injected as part of HvCallDispatchVp. 128 */ 129 union hv_vp_register_page_interrupt_vectors interrupt_vectors; 130 131 #elif IS_ENABLED(CONFIG_ARM64) 132 /* Not yet supported in ARM */ 133 #endif 134 } __packed; 135 136 #define HV_PARTITION_PROCESSOR_FEATURES_BANKS 2 137 138 union hv_partition_processor_features { 139 u64 as_uint64[HV_PARTITION_PROCESSOR_FEATURES_BANKS]; 140 struct { 141 u64 sse3_support : 1; 142 u64 lahf_sahf_support : 1; 143 u64 ssse3_support : 1; 144 u64 sse4_1_support : 1; 145 u64 sse4_2_support : 1; 146 u64 sse4a_support : 1; 147 u64 xop_support : 1; 148 u64 pop_cnt_support : 1; 149 u64 cmpxchg16b_support : 1; 150 u64 altmovcr8_support : 1; 151 u64 lzcnt_support : 1; 152 u64 mis_align_sse_support : 1; 153 u64 mmx_ext_support : 1; 154 u64 amd3dnow_support : 1; 155 u64 extended_amd3dnow_support : 1; 156 u64 page_1gb_support : 1; 157 u64 aes_support : 1; 158 u64 pclmulqdq_support : 1; 159 u64 pcid_support : 1; 160 u64 fma4_support : 1; 161 u64 f16c_support : 1; 162 u64 rd_rand_support : 1; 163 u64 rd_wr_fs_gs_support : 1; 164 u64 smep_support : 1; 165 u64 enhanced_fast_string_support : 1; 166 u64 bmi1_support : 1; 167 u64 bmi2_support : 1; 168 u64 hle_support_deprecated : 1; 169 u64 rtm_support_deprecated : 1; 170 u64 movbe_support : 1; 171 u64 npiep1_support : 1; 172 u64 dep_x87_fpu_save_support : 1; 173 u64 rd_seed_support : 1; 174 u64 adx_support : 1; 175 u64 intel_prefetch_support : 1; 176 u64 smap_support : 1; 177 u64 hle_support : 1; 178 u64 rtm_support : 1; 179 u64 rdtscp_support : 1; 180 u64 clflushopt_support : 1; 181 u64 clwb_support : 1; 182 u64 sha_support : 1; 183 u64 x87_pointers_saved_support : 1; 184 u64 invpcid_support : 1; 185 u64 ibrs_support : 1; 186 u64 stibp_support : 1; 187 u64 ibpb_support: 1; 188 u64 unrestricted_guest_support : 1; 189 u64 mdd_support : 1; 190 u64 fast_short_rep_mov_support : 1; 191 u64 l1dcache_flush_support : 1; 192 u64 rdcl_no_support : 1; 193 u64 ibrs_all_support : 1; 194 u64 skip_l1df_support : 1; 195 u64 ssb_no_support : 1; 196 u64 rsb_a_no_support : 1; 197 u64 virt_spec_ctrl_support : 1; 198 u64 rd_pid_support : 1; 199 u64 umip_support : 1; 200 u64 mbs_no_support : 1; 201 u64 mb_clear_support : 1; 202 u64 taa_no_support : 1; 203 u64 tsx_ctrl_support : 1; 204 /* 205 * N.B. The final processor feature bit in bank 0 is reserved to 206 * simplify potential downlevel backports. 207 */ 208 u64 reserved_bank0 : 1; 209 210 /* N.B. Begin bank 1 processor features. */ 211 u64 acount_mcount_support : 1; 212 u64 tsc_invariant_support : 1; 213 u64 cl_zero_support : 1; 214 u64 rdpru_support : 1; 215 u64 la57_support : 1; 216 u64 mbec_support : 1; 217 u64 nested_virt_support : 1; 218 u64 psfd_support : 1; 219 u64 cet_ss_support : 1; 220 u64 cet_ibt_support : 1; 221 u64 vmx_exception_inject_support : 1; 222 u64 enqcmd_support : 1; 223 u64 umwait_tpause_support : 1; 224 u64 movdiri_support : 1; 225 u64 movdir64b_support : 1; 226 u64 cldemote_support : 1; 227 u64 serialize_support : 1; 228 u64 tsc_deadline_tmr_support : 1; 229 u64 tsc_adjust_support : 1; 230 u64 fzlrep_movsb : 1; 231 u64 fsrep_stosb : 1; 232 u64 fsrep_cmpsb : 1; 233 u64 reserved_bank1 : 42; 234 } __packed; 235 }; 236 237 union hv_partition_processor_xsave_features { 238 struct { 239 u64 xsave_support : 1; 240 u64 xsaveopt_support : 1; 241 u64 avx_support : 1; 242 u64 reserved1 : 61; 243 } __packed; 244 u64 as_uint64; 245 }; 246 247 struct hv_partition_creation_properties { 248 union hv_partition_processor_features disabled_processor_features; 249 union hv_partition_processor_xsave_features 250 disabled_processor_xsave_features; 251 } __packed; 252 253 #define HV_PARTITION_SYNTHETIC_PROCESSOR_FEATURES_BANKS 1 254 255 union hv_partition_synthetic_processor_features { 256 u64 as_uint64[HV_PARTITION_SYNTHETIC_PROCESSOR_FEATURES_BANKS]; 257 258 struct { 259 u64 hypervisor_present : 1; 260 /* Support for HV#1: (CPUID leaves 0x40000000 - 0x40000006)*/ 261 u64 hv1 : 1; 262 u64 access_vp_run_time_reg : 1; /* HV_X64_MSR_VP_RUNTIME */ 263 u64 access_partition_reference_counter : 1; /* HV_X64_MSR_TIME_REF_COUNT */ 264 u64 access_synic_regs : 1; /* SINT-related registers */ 265 /* 266 * Access to HV_X64_MSR_STIMER0_CONFIG through 267 * HV_X64_MSR_STIMER3_COUNT. 268 */ 269 u64 access_synthetic_timer_regs : 1; 270 u64 access_intr_ctrl_regs : 1; /* APIC MSRs and VP assist page*/ 271 /* HV_X64_MSR_GUEST_OS_ID and HV_X64_MSR_HYPERCALL */ 272 u64 access_hypercall_regs : 1; 273 u64 access_vp_index : 1; 274 u64 access_partition_reference_tsc : 1; 275 u64 access_guest_idle_reg : 1; 276 u64 access_frequency_regs : 1; 277 u64 reserved_z12 : 1; 278 u64 reserved_z13 : 1; 279 u64 reserved_z14 : 1; 280 u64 enable_extended_gva_ranges_for_flush_virtual_address_list : 1; 281 u64 reserved_z16 : 1; 282 u64 reserved_z17 : 1; 283 /* Use fast hypercall output. Corresponds to privilege. */ 284 u64 fast_hypercall_output : 1; 285 u64 reserved_z19 : 1; 286 u64 start_virtual_processor : 1; /* Can start VPs */ 287 u64 reserved_z21 : 1; 288 /* Synthetic timers in direct mode. */ 289 u64 direct_synthetic_timers : 1; 290 u64 reserved_z23 : 1; 291 u64 extended_processor_masks : 1; 292 293 /* Enable various hypercalls */ 294 u64 tb_flush_hypercalls : 1; 295 u64 synthetic_cluster_ipi : 1; 296 u64 notify_long_spin_wait : 1; 297 u64 query_numa_distance : 1; 298 u64 signal_events : 1; 299 u64 retarget_device_interrupt : 1; 300 u64 restore_time : 1; 301 302 /* EnlightenedVmcs nested enlightenment is supported. */ 303 u64 enlightened_vmcs : 1; 304 u64 reserved : 31; 305 } __packed; 306 }; 307 308 #define HV_MAKE_COMPATIBILITY_VERSION(major_, minor_) \ 309 ((u32)((major_) << 8 | (minor_))) 310 311 #define HV_COMPATIBILITY_21_H2 HV_MAKE_COMPATIBILITY_VERSION(0X6, 0X9) 312 313 union hv_partition_isolation_properties { 314 u64 as_uint64; 315 struct { 316 u64 isolation_type: 5; 317 u64 isolation_host_type : 2; 318 u64 rsvd_z: 5; 319 u64 shared_gpa_boundary_page_number: 52; 320 } __packed; 321 }; 322 323 /* 324 * Various isolation types supported by MSHV. 325 */ 326 #define HV_PARTITION_ISOLATION_TYPE_NONE 0 327 #define HV_PARTITION_ISOLATION_TYPE_SNP 2 328 #define HV_PARTITION_ISOLATION_TYPE_TDX 3 329 330 /* 331 * Various host isolation types supported by MSHV. 332 */ 333 #define HV_PARTITION_ISOLATION_HOST_TYPE_NONE 0x0 334 #define HV_PARTITION_ISOLATION_HOST_TYPE_HARDWARE 0x1 335 #define HV_PARTITION_ISOLATION_HOST_TYPE_RESERVED 0x2 336 337 /* Note: Exo partition is enabled by default */ 338 #define HV_PARTITION_CREATION_FLAG_GPA_SUPER_PAGES_ENABLED BIT(4) 339 #define HV_PARTITION_CREATION_FLAG_EXO_PARTITION BIT(8) 340 #define HV_PARTITION_CREATION_FLAG_LAPIC_ENABLED BIT(13) 341 #define HV_PARTITION_CREATION_FLAG_INTERCEPT_MESSAGE_PAGE_ENABLED BIT(19) 342 #define HV_PARTITION_CREATION_FLAG_X2APIC_CAPABLE BIT(22) 343 344 struct hv_input_create_partition { 345 u64 flags; 346 struct hv_proximity_domain_info proximity_domain_info; 347 u32 compatibility_version; 348 u32 padding; 349 struct hv_partition_creation_properties partition_creation_properties; 350 union hv_partition_isolation_properties isolation_properties; 351 } __packed; 352 353 struct hv_output_create_partition { 354 u64 partition_id; 355 } __packed; 356 357 struct hv_input_initialize_partition { 358 u64 partition_id; 359 } __packed; 360 361 struct hv_input_finalize_partition { 362 u64 partition_id; 363 } __packed; 364 365 struct hv_input_delete_partition { 366 u64 partition_id; 367 } __packed; 368 369 struct hv_input_get_partition_property { 370 u64 partition_id; 371 u32 property_code; /* enum hv_partition_property_code */ 372 u32 padding; 373 } __packed; 374 375 struct hv_output_get_partition_property { 376 u64 property_value; 377 } __packed; 378 379 struct hv_input_set_partition_property { 380 u64 partition_id; 381 u32 property_code; /* enum hv_partition_property_code */ 382 u32 padding; 383 u64 property_value; 384 } __packed; 385 386 union hv_partition_property_arg { 387 u64 as_uint64; 388 struct { 389 union { 390 u32 arg; 391 u32 vp_index; 392 }; 393 u16 reserved0; 394 u8 reserved1; 395 u8 object_type; 396 } __packed; 397 }; 398 399 struct hv_input_get_partition_property_ex { 400 u64 partition_id; 401 u32 property_code; /* enum hv_partition_property_code */ 402 u32 padding; 403 union { 404 union hv_partition_property_arg arg_data; 405 u64 arg; 406 }; 407 } __packed; 408 409 /* 410 * NOTE: Should use hv_input_set_partition_property_ex_header to compute this 411 * size, but hv_input_get_partition_property_ex is identical so it suffices 412 */ 413 #define HV_PARTITION_PROPERTY_EX_MAX_VAR_SIZE \ 414 (HV_HYP_PAGE_SIZE - sizeof(struct hv_input_get_partition_property_ex)) 415 416 union hv_partition_property_ex { 417 u8 buffer[HV_PARTITION_PROPERTY_EX_MAX_VAR_SIZE]; 418 struct hv_partition_property_vmm_capabilities vmm_capabilities; 419 /* More fields to be filled in when needed */ 420 }; 421 422 struct hv_output_get_partition_property_ex { 423 union hv_partition_property_ex property_value; 424 } __packed; 425 426 enum hv_vp_state_page_type { 427 HV_VP_STATE_PAGE_REGISTERS = 0, 428 HV_VP_STATE_PAGE_INTERCEPT_MESSAGE = 1, 429 HV_VP_STATE_PAGE_GHCB = 2, 430 HV_VP_STATE_PAGE_COUNT 431 }; 432 433 struct hv_input_map_vp_state_page { 434 u64 partition_id; 435 u32 vp_index; 436 u16 type; /* enum hv_vp_state_page_type */ 437 union hv_input_vtl input_vtl; 438 union { 439 u8 as_uint8; 440 struct { 441 u8 map_location_provided : 1; 442 u8 reserved : 7; 443 }; 444 } flags; 445 u64 requested_map_location; 446 } __packed; 447 448 struct hv_output_map_vp_state_page { 449 u64 map_location; /* GPA page number */ 450 } __packed; 451 452 struct hv_input_unmap_vp_state_page { 453 u64 partition_id; 454 u32 vp_index; 455 u16 type; /* enum hv_vp_state_page_type */ 456 union hv_input_vtl input_vtl; 457 u8 reserved0; 458 } __packed; 459 460 struct hv_x64_apic_eoi_message { 461 u32 vp_index; 462 u32 interrupt_vector; 463 } __packed; 464 465 struct hv_opaque_intercept_message { 466 u32 vp_index; 467 } __packed; 468 469 enum hv_port_type { 470 HV_PORT_TYPE_MESSAGE = 1, 471 HV_PORT_TYPE_EVENT = 2, 472 HV_PORT_TYPE_MONITOR = 3, 473 HV_PORT_TYPE_DOORBELL = 4 /* Root Partition only */ 474 }; 475 476 struct hv_port_info { 477 u32 port_type; /* enum hv_port_type */ 478 u32 padding; 479 union { 480 struct { 481 u32 target_sint; 482 u32 target_vp; 483 u64 rsvdz; 484 } message_port_info; 485 struct { 486 u32 target_sint; 487 u32 target_vp; 488 u16 base_flag_number; 489 u16 flag_count; 490 u32 rsvdz; 491 } event_port_info; 492 struct { 493 u64 monitor_address; 494 u64 rsvdz; 495 } monitor_port_info; 496 struct { 497 u32 target_sint; 498 u32 target_vp; 499 u64 rsvdz; 500 } doorbell_port_info; 501 }; 502 } __packed; 503 504 struct hv_connection_info { 505 u32 port_type; 506 u32 padding; 507 union { 508 struct { 509 u64 rsvdz; 510 } message_connection_info; 511 struct { 512 u64 rsvdz; 513 } event_connection_info; 514 struct { 515 u64 monitor_address; 516 } monitor_connection_info; 517 struct { 518 u64 gpa; 519 u64 trigger_value; 520 u64 flags; 521 } doorbell_connection_info; 522 }; 523 } __packed; 524 525 /* Define synthetic interrupt controller flag constants. */ 526 #define HV_EVENT_FLAGS_COUNT (256 * 8) 527 #define HV_EVENT_FLAGS_BYTE_COUNT (256) 528 #define HV_EVENT_FLAGS32_COUNT (256 / sizeof(u32)) 529 530 /* linux side we create long version of flags to use long bit ops on flags */ 531 #define HV_EVENT_FLAGS_UL_COUNT (256 / sizeof(ulong)) 532 533 /* Define the synthetic interrupt controller event flags format. */ 534 union hv_synic_event_flags { 535 unsigned char flags8[HV_EVENT_FLAGS_BYTE_COUNT]; 536 u32 flags32[HV_EVENT_FLAGS32_COUNT]; 537 ulong flags[HV_EVENT_FLAGS_UL_COUNT]; /* linux only */ 538 }; 539 540 struct hv_synic_event_flags_page { 541 volatile union hv_synic_event_flags event_flags[HV_SYNIC_SINT_COUNT]; 542 }; 543 544 #define HV_SYNIC_EVENT_RING_MESSAGE_COUNT 63 545 546 struct hv_synic_event_ring { 547 u8 signal_masked; 548 u8 ring_full; 549 u16 reserved_z; 550 u32 data[HV_SYNIC_EVENT_RING_MESSAGE_COUNT]; 551 } __packed; 552 553 struct hv_synic_event_ring_page { 554 struct hv_synic_event_ring sint_event_ring[HV_SYNIC_SINT_COUNT]; 555 }; 556 557 /* Define SynIC control register. */ 558 union hv_synic_scontrol { 559 u64 as_uint64; 560 struct { 561 u64 enable : 1; 562 u64 reserved : 63; 563 } __packed; 564 }; 565 566 /* Define the format of the SIEFP register */ 567 union hv_synic_siefp { 568 u64 as_uint64; 569 struct { 570 u64 siefp_enabled : 1; 571 u64 preserved : 11; 572 u64 base_siefp_gpa : 52; 573 } __packed; 574 }; 575 576 union hv_synic_sirbp { 577 u64 as_uint64; 578 struct { 579 u64 sirbp_enabled : 1; 580 u64 preserved : 11; 581 u64 base_sirbp_gpa : 52; 582 } __packed; 583 }; 584 585 union hv_interrupt_control { 586 u64 as_uint64; 587 struct { 588 u32 interrupt_type; /* enum hv_interrupt_type */ 589 #if IS_ENABLED(CONFIG_X86) 590 u32 level_triggered : 1; 591 u32 logical_dest_mode : 1; 592 u32 rsvd : 30; 593 #elif IS_ENABLED(CONFIG_ARM64) 594 u32 rsvd1 : 2; 595 u32 asserted : 1; 596 u32 rsvd2 : 29; 597 #endif 598 } __packed; 599 }; 600 601 struct hv_stimer_state { 602 struct { 603 u32 undelivered_msg_pending : 1; 604 u32 reserved : 31; 605 } __packed flags; 606 u32 resvd; 607 u64 config; 608 u64 count; 609 u64 adjustment; 610 u64 undelivered_exp_time; 611 } __packed; 612 613 struct hv_synthetic_timers_state { 614 struct hv_stimer_state timers[HV_SYNIC_STIMER_COUNT]; 615 u64 reserved[5]; 616 } __packed; 617 618 struct hv_async_completion_message_payload { 619 u64 partition_id; 620 u32 status; 621 u32 completion_count; 622 u64 sub_status; 623 } __packed; 624 625 union hv_input_delete_vp { 626 u64 as_uint64[2]; 627 struct { 628 u64 partition_id; 629 u32 vp_index; 630 u8 reserved[4]; 631 } __packed; 632 } __packed; 633 634 struct hv_input_assert_virtual_interrupt { 635 u64 partition_id; 636 union hv_interrupt_control control; 637 u64 dest_addr; /* cpu's apic id */ 638 u32 vector; 639 u8 target_vtl; 640 u8 rsvd_z0; 641 u16 rsvd_z1; 642 } __packed; 643 644 struct hv_input_create_port { 645 u64 port_partition_id; 646 union hv_port_id port_id; 647 u8 port_vtl; 648 u8 min_connection_vtl; 649 u16 padding; 650 u64 connection_partition_id; 651 struct hv_port_info port_info; 652 struct hv_proximity_domain_info proximity_domain_info; 653 } __packed; 654 655 union hv_input_delete_port { 656 u64 as_uint64[2]; 657 struct { 658 u64 port_partition_id; 659 union hv_port_id port_id; 660 u32 reserved; 661 }; 662 } __packed; 663 664 struct hv_input_connect_port { 665 u64 connection_partition_id; 666 union hv_connection_id connection_id; 667 u8 connection_vtl; 668 u8 rsvdz0; 669 u16 rsvdz1; 670 u64 port_partition_id; 671 union hv_port_id port_id; 672 u32 reserved2; 673 struct hv_connection_info connection_info; 674 struct hv_proximity_domain_info proximity_domain_info; 675 } __packed; 676 677 union hv_input_disconnect_port { 678 u64 as_uint64[2]; 679 struct { 680 u64 connection_partition_id; 681 union hv_connection_id connection_id; 682 u32 is_doorbell: 1; 683 u32 reserved: 31; 684 } __packed; 685 } __packed; 686 687 union hv_input_notify_port_ring_empty { 688 u64 as_uint64; 689 struct { 690 u32 sint_index; 691 u32 reserved; 692 }; 693 } __packed; 694 695 struct hv_vp_state_data_xsave { 696 u64 flags; 697 union hv_x64_xsave_xfem_register states; 698 } __packed; 699 700 /* 701 * For getting and setting VP state, there are two options based on the state type: 702 * 703 * 1.) Data that is accessed by PFNs in the input hypercall page. This is used 704 * for state which may not fit into the hypercall pages. 705 * 2.) Data that is accessed directly in the input\output hypercall pages. 706 * This is used for state that will always fit into the hypercall pages. 707 * 708 * In the future this could be dynamic based on the size if needed. 709 * 710 * Note these hypercalls have an 8-byte aligned variable header size as per the tlfs 711 */ 712 713 #define HV_GET_SET_VP_STATE_TYPE_PFN BIT(31) 714 715 enum hv_get_set_vp_state_type { 716 /* HvGetSetVpStateLocalInterruptControllerState - APIC/GIC state */ 717 HV_GET_SET_VP_STATE_LAPIC_STATE = 0 | HV_GET_SET_VP_STATE_TYPE_PFN, 718 HV_GET_SET_VP_STATE_XSAVE = 1 | HV_GET_SET_VP_STATE_TYPE_PFN, 719 HV_GET_SET_VP_STATE_SIM_PAGE = 2 | HV_GET_SET_VP_STATE_TYPE_PFN, 720 HV_GET_SET_VP_STATE_SIEF_PAGE = 3 | HV_GET_SET_VP_STATE_TYPE_PFN, 721 HV_GET_SET_VP_STATE_SYNTHETIC_TIMERS = 4, 722 }; 723 724 struct hv_vp_state_data { 725 u32 type; 726 u32 rsvd; 727 struct hv_vp_state_data_xsave xsave; 728 } __packed; 729 730 struct hv_input_get_vp_state { 731 u64 partition_id; 732 u32 vp_index; 733 u8 input_vtl; 734 u8 rsvd0; 735 u16 rsvd1; 736 struct hv_vp_state_data state_data; 737 u64 output_data_pfns[]; 738 } __packed; 739 740 union hv_output_get_vp_state { 741 struct hv_synthetic_timers_state synthetic_timers_state; 742 } __packed; 743 744 union hv_input_set_vp_state_data { 745 u64 pfns; 746 u8 bytes; 747 } __packed; 748 749 struct hv_input_set_vp_state { 750 u64 partition_id; 751 u32 vp_index; 752 u8 input_vtl; 753 u8 rsvd0; 754 u16 rsvd1; 755 struct hv_vp_state_data state_data; 756 union hv_input_set_vp_state_data data[]; 757 } __packed; 758 759 union hv_x64_vp_execution_state { 760 u16 as_uint16; 761 struct { 762 u16 cpl:2; 763 u16 cr0_pe:1; 764 u16 cr0_am:1; 765 u16 efer_lma:1; 766 u16 debug_active:1; 767 u16 interruption_pending:1; 768 u16 vtl:4; 769 u16 enclave_mode:1; 770 u16 interrupt_shadow:1; 771 u16 virtualization_fault_active:1; 772 u16 reserved:2; 773 } __packed; 774 }; 775 776 struct hv_x64_intercept_message_header { 777 u32 vp_index; 778 u8 instruction_length:4; 779 u8 cr8:4; /* Only set for exo partitions */ 780 u8 intercept_access_type; 781 union hv_x64_vp_execution_state execution_state; 782 struct hv_x64_segment_register cs_segment; 783 u64 rip; 784 u64 rflags; 785 } __packed; 786 787 union hv_x64_memory_access_info { 788 u8 as_uint8; 789 struct { 790 u8 gva_valid:1; 791 u8 gva_gpa_valid:1; 792 u8 hypercall_output_pending:1; 793 u8 tlb_locked_no_overlay:1; 794 u8 reserved:4; 795 } __packed; 796 }; 797 798 struct hv_x64_memory_intercept_message { 799 struct hv_x64_intercept_message_header header; 800 u32 cache_type; /* enum hv_cache_type */ 801 u8 instruction_byte_count; 802 union hv_x64_memory_access_info memory_access_info; 803 u8 tpr_priority; 804 u8 reserved1; 805 u64 guest_virtual_address; 806 u64 guest_physical_address; 807 u8 instruction_bytes[16]; 808 } __packed; 809 810 #if IS_ENABLED(CONFIG_ARM64) 811 union hv_arm64_vp_execution_state { 812 u16 as_uint16; 813 struct { 814 u16 cpl:2; /* Exception Level (EL) */ 815 u16 debug_active:1; 816 u16 interruption_pending:1; 817 u16 vtl:4; 818 u16 virtualization_fault_active:1; 819 u16 reserved:7; 820 } __packed; 821 }; 822 823 struct hv_arm64_intercept_message_header { 824 u32 vp_index; 825 u8 instruction_length; 826 u8 intercept_access_type; 827 union hv_arm64_vp_execution_state execution_state; 828 u64 pc; 829 u64 cpsr; 830 } __packed; 831 832 union hv_arm64_memory_access_info { 833 u8 as_uint8; 834 struct { 835 u8 gva_valid:1; 836 u8 gva_gpa_valid:1; 837 u8 hypercall_output_pending:1; 838 u8 reserved:5; 839 } __packed; 840 }; 841 842 struct hv_arm64_memory_intercept_message { 843 struct hv_arm64_intercept_message_header header; 844 u32 cache_type; /* enum hv_cache_type */ 845 u8 instruction_byte_count; 846 union hv_arm64_memory_access_info memory_access_info; 847 u16 reserved1; 848 u8 instruction_bytes[4]; 849 u32 reserved2; 850 u64 guest_virtual_address; 851 u64 guest_physical_address; 852 u64 syndrome; 853 } __packed; 854 855 #endif /* CONFIG_ARM64 */ 856 857 /* 858 * Dispatch state for the VP communicated by the hypervisor to the 859 * VP-dispatching thread in the root on return from HVCALL_DISPATCH_VP. 860 */ 861 enum hv_vp_dispatch_state { 862 HV_VP_DISPATCH_STATE_INVALID = 0, 863 HV_VP_DISPATCH_STATE_BLOCKED = 1, 864 HV_VP_DISPATCH_STATE_READY = 2, 865 }; 866 867 /* 868 * Dispatch event that caused the current dispatch state on return from 869 * HVCALL_DISPATCH_VP. 870 */ 871 enum hv_vp_dispatch_event { 872 HV_VP_DISPATCH_EVENT_INVALID = 0x00000000, 873 HV_VP_DISPATCH_EVENT_SUSPEND = 0x00000001, 874 HV_VP_DISPATCH_EVENT_INTERCEPT = 0x00000002, 875 }; 876 877 #define HV_ROOT_SCHEDULER_MAX_VPS_PER_CHILD_PARTITION 1024 878 /* The maximum array size of HV_GENERIC_SET (vp_set) buffer */ 879 #define HV_GENERIC_SET_QWORD_COUNT(max) (((((max) - 1) >> 6) + 1) + 2) 880 881 struct hv_vp_signal_bitset_scheduler_message { 882 u64 partition_id; 883 u32 overflow_count; 884 u16 vp_count; 885 u16 reserved; 886 887 #define BITSET_BUFFER_SIZE \ 888 HV_GENERIC_SET_QWORD_COUNT(HV_ROOT_SCHEDULER_MAX_VPS_PER_CHILD_PARTITION) 889 union { 890 struct hv_vpset bitset; 891 u64 bitset_buffer[BITSET_BUFFER_SIZE]; 892 } vp_bitset; 893 #undef BITSET_BUFFER_SIZE 894 } __packed; 895 896 static_assert(sizeof(struct hv_vp_signal_bitset_scheduler_message) <= 897 (sizeof(struct hv_message) - sizeof(struct hv_message_header))); 898 899 #define HV_MESSAGE_MAX_PARTITION_VP_PAIR_COUNT \ 900 (((sizeof(struct hv_message) - sizeof(struct hv_message_header)) / \ 901 (sizeof(u64 /* partition id */) + sizeof(u32 /* vp index */))) - 1) 902 903 struct hv_vp_signal_pair_scheduler_message { 904 u32 overflow_count; 905 u8 vp_count; 906 u8 reserved1[3]; 907 908 u64 partition_ids[HV_MESSAGE_MAX_PARTITION_VP_PAIR_COUNT]; 909 u32 vp_indexes[HV_MESSAGE_MAX_PARTITION_VP_PAIR_COUNT]; 910 911 u8 reserved2[4]; 912 } __packed; 913 914 static_assert(sizeof(struct hv_vp_signal_pair_scheduler_message) == 915 (sizeof(struct hv_message) - sizeof(struct hv_message_header))); 916 917 /* Input and output structures for HVCALL_DISPATCH_VP */ 918 #define HV_DISPATCH_VP_FLAG_CLEAR_INTERCEPT_SUSPEND 0x1 919 #define HV_DISPATCH_VP_FLAG_ENABLE_CALLER_INTERRUPTS 0x2 920 #define HV_DISPATCH_VP_FLAG_SET_CALLER_SPEC_CTRL 0x4 921 #define HV_DISPATCH_VP_FLAG_SKIP_VP_SPEC_FLUSH 0x8 922 #define HV_DISPATCH_VP_FLAG_SKIP_CALLER_SPEC_FLUSH 0x10 923 #define HV_DISPATCH_VP_FLAG_SKIP_CALLER_USER_SPEC_FLUSH 0x20 924 #define HV_DISPATCH_VP_FLAG_SCAN_INTERRUPT_INJECTION 0x40 925 926 struct hv_input_dispatch_vp { 927 u64 partition_id; 928 u32 vp_index; 929 u32 flags; 930 u64 time_slice; /* in 100ns */ 931 u64 spec_ctrl; 932 } __packed; 933 934 struct hv_output_dispatch_vp { 935 u32 dispatch_state; /* enum hv_vp_dispatch_state */ 936 u32 dispatch_event; /* enum hv_vp_dispatch_event */ 937 } __packed; 938 939 struct hv_input_modify_sparse_spa_page_host_access { 940 u32 host_access : 2; 941 u32 reserved : 30; 942 u32 flags; 943 u64 partition_id; 944 u64 spa_page_list[]; 945 } __packed; 946 947 /* hv_input_modify_sparse_spa_page_host_access flags */ 948 #define HV_MODIFY_SPA_PAGE_HOST_ACCESS_MAKE_EXCLUSIVE 0x1 949 #define HV_MODIFY_SPA_PAGE_HOST_ACCESS_MAKE_SHARED 0x2 950 #define HV_MODIFY_SPA_PAGE_HOST_ACCESS_LARGE_PAGE 0x4 951 #define HV_MODIFY_SPA_PAGE_HOST_ACCESS_HUGE_PAGE 0x8 952 953 #endif /* _HV_HVHDK_H */ 954