1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Type definitions for the Microsoft hypervisor. 4 */ 5 #ifndef _HV_HVHDK_H 6 #define _HV_HVHDK_H 7 8 #include <linux/build_bug.h> 9 10 #include "hvhdk_mini.h" 11 #include "hvgdk.h" 12 13 /* 14 * Hypervisor statistics page format 15 */ 16 struct hv_stats_page { 17 u64 data[HV_HYP_PAGE_SIZE / sizeof(u64)]; 18 } __packed; 19 20 /* Bits for dirty mask of hv_vp_register_page */ 21 #define HV_X64_REGISTER_CLASS_GENERAL 0 22 #define HV_X64_REGISTER_CLASS_IP 1 23 #define HV_X64_REGISTER_CLASS_XMM 2 24 #define HV_X64_REGISTER_CLASS_SEGMENT 3 25 #define HV_X64_REGISTER_CLASS_FLAGS 4 26 27 #define HV_VP_REGISTER_PAGE_VERSION_1 1u 28 29 #define HV_VP_REGISTER_PAGE_MAX_VECTOR_COUNT 7 30 31 union hv_vp_register_page_interrupt_vectors { 32 u64 as_uint64; 33 struct { 34 u8 vector_count; 35 u8 vector[HV_VP_REGISTER_PAGE_MAX_VECTOR_COUNT]; 36 } __packed; 37 }; 38 39 struct hv_vp_register_page { 40 u16 version; 41 u8 isvalid; 42 u8 rsvdz; 43 u32 dirty; 44 45 #if IS_ENABLED(CONFIG_X86) 46 47 union { 48 struct { 49 /* General purpose registers 50 * (HV_X64_REGISTER_CLASS_GENERAL) 51 */ 52 union { 53 struct { 54 u64 rax; 55 u64 rcx; 56 u64 rdx; 57 u64 rbx; 58 u64 rsp; 59 u64 rbp; 60 u64 rsi; 61 u64 rdi; 62 u64 r8; 63 u64 r9; 64 u64 r10; 65 u64 r11; 66 u64 r12; 67 u64 r13; 68 u64 r14; 69 u64 r15; 70 } __packed; 71 72 u64 gp_registers[16]; 73 }; 74 /* Instruction pointer (HV_X64_REGISTER_CLASS_IP) */ 75 u64 rip; 76 /* Flags (HV_X64_REGISTER_CLASS_FLAGS) */ 77 u64 rflags; 78 } __packed; 79 80 u64 registers[18]; 81 }; 82 /* Volatile XMM registers (HV_X64_REGISTER_CLASS_XMM) */ 83 union { 84 struct { 85 struct hv_u128 xmm0; 86 struct hv_u128 xmm1; 87 struct hv_u128 xmm2; 88 struct hv_u128 xmm3; 89 struct hv_u128 xmm4; 90 struct hv_u128 xmm5; 91 } __packed; 92 93 struct hv_u128 xmm_registers[6]; 94 }; 95 /* Segment registers (HV_X64_REGISTER_CLASS_SEGMENT) */ 96 union { 97 struct { 98 struct hv_x64_segment_register es; 99 struct hv_x64_segment_register cs; 100 struct hv_x64_segment_register ss; 101 struct hv_x64_segment_register ds; 102 struct hv_x64_segment_register fs; 103 struct hv_x64_segment_register gs; 104 } __packed; 105 106 struct hv_x64_segment_register segment_registers[6]; 107 }; 108 /* Misc. control registers (cannot be set via this interface) */ 109 u64 cr0; 110 u64 cr3; 111 u64 cr4; 112 u64 cr8; 113 u64 efer; 114 u64 dr7; 115 union hv_x64_pending_interruption_register pending_interruption; 116 union hv_x64_interrupt_state_register interrupt_state; 117 u64 instruction_emulation_hints; 118 u64 xfem; 119 120 /* 121 * Fields from this point are not included in the register page save chunk. 122 * The reserved field is intended to maintain alignment for unsaved fields. 123 */ 124 u8 reserved1[0x100]; 125 126 /* 127 * Interrupts injected as part of HvCallDispatchVp. 128 */ 129 union hv_vp_register_page_interrupt_vectors interrupt_vectors; 130 131 #elif IS_ENABLED(CONFIG_ARM64) 132 /* Not yet supported in ARM */ 133 #endif 134 } __packed; 135 136 #define HV_PARTITION_PROCESSOR_FEATURES_BANKS 2 137 138 union hv_partition_processor_features { 139 u64 as_uint64[HV_PARTITION_PROCESSOR_FEATURES_BANKS]; 140 struct { 141 u64 sse3_support : 1; 142 u64 lahf_sahf_support : 1; 143 u64 ssse3_support : 1; 144 u64 sse4_1_support : 1; 145 u64 sse4_2_support : 1; 146 u64 sse4a_support : 1; 147 u64 xop_support : 1; 148 u64 pop_cnt_support : 1; 149 u64 cmpxchg16b_support : 1; 150 u64 altmovcr8_support : 1; 151 u64 lzcnt_support : 1; 152 u64 mis_align_sse_support : 1; 153 u64 mmx_ext_support : 1; 154 u64 amd3dnow_support : 1; 155 u64 extended_amd3dnow_support : 1; 156 u64 page_1gb_support : 1; 157 u64 aes_support : 1; 158 u64 pclmulqdq_support : 1; 159 u64 pcid_support : 1; 160 u64 fma4_support : 1; 161 u64 f16c_support : 1; 162 u64 rd_rand_support : 1; 163 u64 rd_wr_fs_gs_support : 1; 164 u64 smep_support : 1; 165 u64 enhanced_fast_string_support : 1; 166 u64 bmi1_support : 1; 167 u64 bmi2_support : 1; 168 u64 hle_support_deprecated : 1; 169 u64 rtm_support_deprecated : 1; 170 u64 movbe_support : 1; 171 u64 npiep1_support : 1; 172 u64 dep_x87_fpu_save_support : 1; 173 u64 rd_seed_support : 1; 174 u64 adx_support : 1; 175 u64 intel_prefetch_support : 1; 176 u64 smap_support : 1; 177 u64 hle_support : 1; 178 u64 rtm_support : 1; 179 u64 rdtscp_support : 1; 180 u64 clflushopt_support : 1; 181 u64 clwb_support : 1; 182 u64 sha_support : 1; 183 u64 x87_pointers_saved_support : 1; 184 u64 invpcid_support : 1; 185 u64 ibrs_support : 1; 186 u64 stibp_support : 1; 187 u64 ibpb_support: 1; 188 u64 unrestricted_guest_support : 1; 189 u64 mdd_support : 1; 190 u64 fast_short_rep_mov_support : 1; 191 u64 l1dcache_flush_support : 1; 192 u64 rdcl_no_support : 1; 193 u64 ibrs_all_support : 1; 194 u64 skip_l1df_support : 1; 195 u64 ssb_no_support : 1; 196 u64 rsb_a_no_support : 1; 197 u64 virt_spec_ctrl_support : 1; 198 u64 rd_pid_support : 1; 199 u64 umip_support : 1; 200 u64 mbs_no_support : 1; 201 u64 mb_clear_support : 1; 202 u64 taa_no_support : 1; 203 u64 tsx_ctrl_support : 1; 204 /* 205 * N.B. The final processor feature bit in bank 0 is reserved to 206 * simplify potential downlevel backports. 207 */ 208 u64 reserved_bank0 : 1; 209 210 /* N.B. Begin bank 1 processor features. */ 211 u64 acount_mcount_support : 1; 212 u64 tsc_invariant_support : 1; 213 u64 cl_zero_support : 1; 214 u64 rdpru_support : 1; 215 u64 la57_support : 1; 216 u64 mbec_support : 1; 217 u64 nested_virt_support : 1; 218 u64 psfd_support : 1; 219 u64 cet_ss_support : 1; 220 u64 cet_ibt_support : 1; 221 u64 vmx_exception_inject_support : 1; 222 u64 enqcmd_support : 1; 223 u64 umwait_tpause_support : 1; 224 u64 movdiri_support : 1; 225 u64 movdir64b_support : 1; 226 u64 cldemote_support : 1; 227 u64 serialize_support : 1; 228 u64 tsc_deadline_tmr_support : 1; 229 u64 tsc_adjust_support : 1; 230 u64 fzlrep_movsb : 1; 231 u64 fsrep_stosb : 1; 232 u64 fsrep_cmpsb : 1; 233 u64 reserved_bank1 : 42; 234 } __packed; 235 }; 236 237 union hv_partition_processor_xsave_features { 238 struct { 239 u64 xsave_support : 1; 240 u64 xsaveopt_support : 1; 241 u64 avx_support : 1; 242 u64 reserved1 : 61; 243 } __packed; 244 u64 as_uint64; 245 }; 246 247 struct hv_partition_creation_properties { 248 union hv_partition_processor_features disabled_processor_features; 249 union hv_partition_processor_xsave_features 250 disabled_processor_xsave_features; 251 } __packed; 252 253 #define HV_PARTITION_SYNTHETIC_PROCESSOR_FEATURES_BANKS 1 254 255 union hv_partition_synthetic_processor_features { 256 u64 as_uint64[HV_PARTITION_SYNTHETIC_PROCESSOR_FEATURES_BANKS]; 257 258 struct { 259 u64 hypervisor_present : 1; 260 /* Support for HV#1: (CPUID leaves 0x40000000 - 0x40000006)*/ 261 u64 hv1 : 1; 262 u64 access_vp_run_time_reg : 1; /* HV_X64_MSR_VP_RUNTIME */ 263 u64 access_partition_reference_counter : 1; /* HV_X64_MSR_TIME_REF_COUNT */ 264 u64 access_synic_regs : 1; /* SINT-related registers */ 265 /* 266 * Access to HV_X64_MSR_STIMER0_CONFIG through 267 * HV_X64_MSR_STIMER3_COUNT. 268 */ 269 u64 access_synthetic_timer_regs : 1; 270 u64 access_intr_ctrl_regs : 1; /* APIC MSRs and VP assist page*/ 271 /* HV_X64_MSR_GUEST_OS_ID and HV_X64_MSR_HYPERCALL */ 272 u64 access_hypercall_regs : 1; 273 u64 access_vp_index : 1; 274 u64 access_partition_reference_tsc : 1; 275 u64 access_guest_idle_reg : 1; 276 u64 access_frequency_regs : 1; 277 u64 reserved_z12 : 1; 278 u64 reserved_z13 : 1; 279 u64 reserved_z14 : 1; 280 u64 enable_extended_gva_ranges_for_flush_virtual_address_list : 1; 281 u64 reserved_z16 : 1; 282 u64 reserved_z17 : 1; 283 /* Use fast hypercall output. Corresponds to privilege. */ 284 u64 fast_hypercall_output : 1; 285 u64 reserved_z19 : 1; 286 u64 start_virtual_processor : 1; /* Can start VPs */ 287 u64 reserved_z21 : 1; 288 /* Synthetic timers in direct mode. */ 289 u64 direct_synthetic_timers : 1; 290 u64 reserved_z23 : 1; 291 u64 extended_processor_masks : 1; 292 293 /* Enable various hypercalls */ 294 u64 tb_flush_hypercalls : 1; 295 u64 synthetic_cluster_ipi : 1; 296 u64 notify_long_spin_wait : 1; 297 u64 query_numa_distance : 1; 298 u64 signal_events : 1; 299 u64 retarget_device_interrupt : 1; 300 u64 restore_time : 1; 301 302 /* EnlightenedVmcs nested enlightenment is supported. */ 303 u64 enlightened_vmcs : 1; 304 u64 reserved : 31; 305 } __packed; 306 }; 307 308 #define HV_MAKE_COMPATIBILITY_VERSION(major_, minor_) \ 309 ((u32)((major_) << 8 | (minor_))) 310 311 #define HV_COMPATIBILITY_21_H2 HV_MAKE_COMPATIBILITY_VERSION(0X6, 0X9) 312 313 union hv_partition_isolation_properties { 314 u64 as_uint64; 315 struct { 316 u64 isolation_type: 5; 317 u64 isolation_host_type : 2; 318 u64 rsvd_z: 5; 319 u64 shared_gpa_boundary_page_number: 52; 320 } __packed; 321 }; 322 323 /* 324 * Various isolation types supported by MSHV. 325 */ 326 #define HV_PARTITION_ISOLATION_TYPE_NONE 0 327 #define HV_PARTITION_ISOLATION_TYPE_SNP 2 328 #define HV_PARTITION_ISOLATION_TYPE_TDX 3 329 330 /* 331 * Various host isolation types supported by MSHV. 332 */ 333 #define HV_PARTITION_ISOLATION_HOST_TYPE_NONE 0x0 334 #define HV_PARTITION_ISOLATION_HOST_TYPE_HARDWARE 0x1 335 #define HV_PARTITION_ISOLATION_HOST_TYPE_RESERVED 0x2 336 337 /* Note: Exo partition is enabled by default */ 338 #define HV_PARTITION_CREATION_FLAG_NESTED_VIRTUALIZATION_CAPABLE BIT(1) 339 #define HV_PARTITION_CREATION_FLAG_GPA_SUPER_PAGES_ENABLED BIT(4) 340 #define HV_PARTITION_CREATION_FLAG_EXO_PARTITION BIT(8) 341 #define HV_PARTITION_CREATION_FLAG_LAPIC_ENABLED BIT(13) 342 #define HV_PARTITION_CREATION_FLAG_INTERCEPT_MESSAGE_PAGE_ENABLED BIT(19) 343 #define HV_PARTITION_CREATION_FLAG_X2APIC_CAPABLE BIT(22) 344 345 struct hv_input_create_partition { 346 u64 flags; 347 struct hv_proximity_domain_info proximity_domain_info; 348 u32 compatibility_version; 349 u32 padding; 350 struct hv_partition_creation_properties partition_creation_properties; 351 union hv_partition_isolation_properties isolation_properties; 352 } __packed; 353 354 struct hv_output_create_partition { 355 u64 partition_id; 356 } __packed; 357 358 struct hv_input_initialize_partition { 359 u64 partition_id; 360 } __packed; 361 362 struct hv_input_finalize_partition { 363 u64 partition_id; 364 } __packed; 365 366 struct hv_input_delete_partition { 367 u64 partition_id; 368 } __packed; 369 370 struct hv_input_get_partition_property { 371 u64 partition_id; 372 u32 property_code; /* enum hv_partition_property_code */ 373 u32 padding; 374 } __packed; 375 376 struct hv_output_get_partition_property { 377 u64 property_value; 378 } __packed; 379 380 struct hv_input_set_partition_property { 381 u64 partition_id; 382 u32 property_code; /* enum hv_partition_property_code */ 383 u32 padding; 384 u64 property_value; 385 } __packed; 386 387 union hv_partition_property_arg { 388 u64 as_uint64; 389 struct { 390 union { 391 u32 arg; 392 u32 vp_index; 393 }; 394 u16 reserved0; 395 u8 reserved1; 396 u8 object_type; 397 } __packed; 398 }; 399 400 struct hv_input_get_partition_property_ex { 401 u64 partition_id; 402 u32 property_code; /* enum hv_partition_property_code */ 403 u32 padding; 404 union { 405 union hv_partition_property_arg arg_data; 406 u64 arg; 407 }; 408 } __packed; 409 410 /* 411 * NOTE: Should use hv_input_set_partition_property_ex_header to compute this 412 * size, but hv_input_get_partition_property_ex is identical so it suffices 413 */ 414 #define HV_PARTITION_PROPERTY_EX_MAX_VAR_SIZE \ 415 (HV_HYP_PAGE_SIZE - sizeof(struct hv_input_get_partition_property_ex)) 416 417 union hv_partition_property_ex { 418 u8 buffer[HV_PARTITION_PROPERTY_EX_MAX_VAR_SIZE]; 419 struct hv_partition_property_vmm_capabilities vmm_capabilities; 420 /* More fields to be filled in when needed */ 421 }; 422 423 struct hv_output_get_partition_property_ex { 424 union hv_partition_property_ex property_value; 425 } __packed; 426 427 enum hv_vp_state_page_type { 428 HV_VP_STATE_PAGE_REGISTERS = 0, 429 HV_VP_STATE_PAGE_INTERCEPT_MESSAGE = 1, 430 HV_VP_STATE_PAGE_GHCB = 2, 431 HV_VP_STATE_PAGE_COUNT 432 }; 433 434 struct hv_input_map_vp_state_page { 435 u64 partition_id; 436 u32 vp_index; 437 u16 type; /* enum hv_vp_state_page_type */ 438 union hv_input_vtl input_vtl; 439 union { 440 u8 as_uint8; 441 struct { 442 u8 map_location_provided : 1; 443 u8 reserved : 7; 444 }; 445 } flags; 446 u64 requested_map_location; 447 } __packed; 448 449 struct hv_output_map_vp_state_page { 450 u64 map_location; /* GPA page number */ 451 } __packed; 452 453 struct hv_input_unmap_vp_state_page { 454 u64 partition_id; 455 u32 vp_index; 456 u16 type; /* enum hv_vp_state_page_type */ 457 union hv_input_vtl input_vtl; 458 u8 reserved0; 459 } __packed; 460 461 struct hv_x64_apic_eoi_message { 462 u32 vp_index; 463 u32 interrupt_vector; 464 } __packed; 465 466 struct hv_opaque_intercept_message { 467 u32 vp_index; 468 } __packed; 469 470 enum hv_port_type { 471 HV_PORT_TYPE_MESSAGE = 1, 472 HV_PORT_TYPE_EVENT = 2, 473 HV_PORT_TYPE_MONITOR = 3, 474 HV_PORT_TYPE_DOORBELL = 4 /* Root Partition only */ 475 }; 476 477 struct hv_port_info { 478 u32 port_type; /* enum hv_port_type */ 479 u32 padding; 480 union { 481 struct { 482 u32 target_sint; 483 u32 target_vp; 484 u64 rsvdz; 485 } message_port_info; 486 struct { 487 u32 target_sint; 488 u32 target_vp; 489 u16 base_flag_number; 490 u16 flag_count; 491 u32 rsvdz; 492 } event_port_info; 493 struct { 494 u64 monitor_address; 495 u64 rsvdz; 496 } monitor_port_info; 497 struct { 498 u32 target_sint; 499 u32 target_vp; 500 u64 rsvdz; 501 } doorbell_port_info; 502 }; 503 } __packed; 504 505 struct hv_connection_info { 506 u32 port_type; 507 u32 padding; 508 union { 509 struct { 510 u64 rsvdz; 511 } message_connection_info; 512 struct { 513 u64 rsvdz; 514 } event_connection_info; 515 struct { 516 u64 monitor_address; 517 } monitor_connection_info; 518 struct { 519 u64 gpa; 520 u64 trigger_value; 521 u64 flags; 522 } doorbell_connection_info; 523 }; 524 } __packed; 525 526 /* Define synthetic interrupt controller flag constants. */ 527 #define HV_EVENT_FLAGS_COUNT (256 * 8) 528 #define HV_EVENT_FLAGS_BYTE_COUNT (256) 529 #define HV_EVENT_FLAGS32_COUNT (256 / sizeof(u32)) 530 531 /* linux side we create long version of flags to use long bit ops on flags */ 532 #define HV_EVENT_FLAGS_UL_COUNT (256 / sizeof(ulong)) 533 534 /* Define the synthetic interrupt controller event flags format. */ 535 union hv_synic_event_flags { 536 unsigned char flags8[HV_EVENT_FLAGS_BYTE_COUNT]; 537 u32 flags32[HV_EVENT_FLAGS32_COUNT]; 538 ulong flags[HV_EVENT_FLAGS_UL_COUNT]; /* linux only */ 539 }; 540 541 struct hv_synic_event_flags_page { 542 volatile union hv_synic_event_flags event_flags[HV_SYNIC_SINT_COUNT]; 543 }; 544 545 #define HV_SYNIC_EVENT_RING_MESSAGE_COUNT 63 546 547 struct hv_synic_event_ring { 548 u8 signal_masked; 549 u8 ring_full; 550 u16 reserved_z; 551 u32 data[HV_SYNIC_EVENT_RING_MESSAGE_COUNT]; 552 } __packed; 553 554 struct hv_synic_event_ring_page { 555 struct hv_synic_event_ring sint_event_ring[HV_SYNIC_SINT_COUNT]; 556 }; 557 558 /* Define SynIC control register. */ 559 union hv_synic_scontrol { 560 u64 as_uint64; 561 struct { 562 u64 enable : 1; 563 u64 reserved : 63; 564 } __packed; 565 }; 566 567 /* Define the format of the SIEFP register */ 568 union hv_synic_siefp { 569 u64 as_uint64; 570 struct { 571 u64 siefp_enabled : 1; 572 u64 preserved : 11; 573 u64 base_siefp_gpa : 52; 574 } __packed; 575 }; 576 577 union hv_synic_sirbp { 578 u64 as_uint64; 579 struct { 580 u64 sirbp_enabled : 1; 581 u64 preserved : 11; 582 u64 base_sirbp_gpa : 52; 583 } __packed; 584 }; 585 586 union hv_interrupt_control { 587 u64 as_uint64; 588 struct { 589 u32 interrupt_type; /* enum hv_interrupt_type */ 590 #if IS_ENABLED(CONFIG_X86) 591 u32 level_triggered : 1; 592 u32 logical_dest_mode : 1; 593 u32 rsvd : 30; 594 #elif IS_ENABLED(CONFIG_ARM64) 595 u32 rsvd1 : 2; 596 u32 asserted : 1; 597 u32 rsvd2 : 29; 598 #endif 599 } __packed; 600 }; 601 602 struct hv_stimer_state { 603 struct { 604 u32 undelivered_msg_pending : 1; 605 u32 reserved : 31; 606 } __packed flags; 607 u32 resvd; 608 u64 config; 609 u64 count; 610 u64 adjustment; 611 u64 undelivered_exp_time; 612 } __packed; 613 614 struct hv_synthetic_timers_state { 615 struct hv_stimer_state timers[HV_SYNIC_STIMER_COUNT]; 616 u64 reserved[5]; 617 } __packed; 618 619 struct hv_async_completion_message_payload { 620 u64 partition_id; 621 u32 status; 622 u32 completion_count; 623 u64 sub_status; 624 } __packed; 625 626 union hv_input_delete_vp { 627 u64 as_uint64[2]; 628 struct { 629 u64 partition_id; 630 u32 vp_index; 631 u8 reserved[4]; 632 } __packed; 633 } __packed; 634 635 struct hv_input_assert_virtual_interrupt { 636 u64 partition_id; 637 union hv_interrupt_control control; 638 u64 dest_addr; /* cpu's apic id */ 639 u32 vector; 640 u8 target_vtl; 641 u8 rsvd_z0; 642 u16 rsvd_z1; 643 } __packed; 644 645 struct hv_input_create_port { 646 u64 port_partition_id; 647 union hv_port_id port_id; 648 u8 port_vtl; 649 u8 min_connection_vtl; 650 u16 padding; 651 u64 connection_partition_id; 652 struct hv_port_info port_info; 653 struct hv_proximity_domain_info proximity_domain_info; 654 } __packed; 655 656 union hv_input_delete_port { 657 u64 as_uint64[2]; 658 struct { 659 u64 port_partition_id; 660 union hv_port_id port_id; 661 u32 reserved; 662 }; 663 } __packed; 664 665 struct hv_input_connect_port { 666 u64 connection_partition_id; 667 union hv_connection_id connection_id; 668 u8 connection_vtl; 669 u8 rsvdz0; 670 u16 rsvdz1; 671 u64 port_partition_id; 672 union hv_port_id port_id; 673 u32 reserved2; 674 struct hv_connection_info connection_info; 675 struct hv_proximity_domain_info proximity_domain_info; 676 } __packed; 677 678 union hv_input_disconnect_port { 679 u64 as_uint64[2]; 680 struct { 681 u64 connection_partition_id; 682 union hv_connection_id connection_id; 683 u32 is_doorbell: 1; 684 u32 reserved: 31; 685 } __packed; 686 } __packed; 687 688 union hv_input_notify_port_ring_empty { 689 u64 as_uint64; 690 struct { 691 u32 sint_index; 692 u32 reserved; 693 }; 694 } __packed; 695 696 struct hv_vp_state_data_xsave { 697 u64 flags; 698 union hv_x64_xsave_xfem_register states; 699 } __packed; 700 701 /* 702 * For getting and setting VP state, there are two options based on the state type: 703 * 704 * 1.) Data that is accessed by PFNs in the input hypercall page. This is used 705 * for state which may not fit into the hypercall pages. 706 * 2.) Data that is accessed directly in the input\output hypercall pages. 707 * This is used for state that will always fit into the hypercall pages. 708 * 709 * In the future this could be dynamic based on the size if needed. 710 * 711 * Note these hypercalls have an 8-byte aligned variable header size as per the tlfs 712 */ 713 714 #define HV_GET_SET_VP_STATE_TYPE_PFN BIT(31) 715 716 enum hv_get_set_vp_state_type { 717 /* HvGetSetVpStateLocalInterruptControllerState - APIC/GIC state */ 718 HV_GET_SET_VP_STATE_LAPIC_STATE = 0 | HV_GET_SET_VP_STATE_TYPE_PFN, 719 HV_GET_SET_VP_STATE_XSAVE = 1 | HV_GET_SET_VP_STATE_TYPE_PFN, 720 HV_GET_SET_VP_STATE_SIM_PAGE = 2 | HV_GET_SET_VP_STATE_TYPE_PFN, 721 HV_GET_SET_VP_STATE_SIEF_PAGE = 3 | HV_GET_SET_VP_STATE_TYPE_PFN, 722 HV_GET_SET_VP_STATE_SYNTHETIC_TIMERS = 4, 723 }; 724 725 struct hv_vp_state_data { 726 u32 type; 727 u32 rsvd; 728 struct hv_vp_state_data_xsave xsave; 729 } __packed; 730 731 struct hv_input_get_vp_state { 732 u64 partition_id; 733 u32 vp_index; 734 u8 input_vtl; 735 u8 rsvd0; 736 u16 rsvd1; 737 struct hv_vp_state_data state_data; 738 u64 output_data_pfns[]; 739 } __packed; 740 741 union hv_output_get_vp_state { 742 struct hv_synthetic_timers_state synthetic_timers_state; 743 } __packed; 744 745 union hv_input_set_vp_state_data { 746 u64 pfns; 747 u8 bytes; 748 } __packed; 749 750 struct hv_input_set_vp_state { 751 u64 partition_id; 752 u32 vp_index; 753 u8 input_vtl; 754 u8 rsvd0; 755 u16 rsvd1; 756 struct hv_vp_state_data state_data; 757 union hv_input_set_vp_state_data data[]; 758 } __packed; 759 760 union hv_x64_vp_execution_state { 761 u16 as_uint16; 762 struct { 763 u16 cpl:2; 764 u16 cr0_pe:1; 765 u16 cr0_am:1; 766 u16 efer_lma:1; 767 u16 debug_active:1; 768 u16 interruption_pending:1; 769 u16 vtl:4; 770 u16 enclave_mode:1; 771 u16 interrupt_shadow:1; 772 u16 virtualization_fault_active:1; 773 u16 reserved:2; 774 } __packed; 775 }; 776 777 struct hv_x64_intercept_message_header { 778 u32 vp_index; 779 u8 instruction_length:4; 780 u8 cr8:4; /* Only set for exo partitions */ 781 u8 intercept_access_type; 782 union hv_x64_vp_execution_state execution_state; 783 struct hv_x64_segment_register cs_segment; 784 u64 rip; 785 u64 rflags; 786 } __packed; 787 788 union hv_x64_memory_access_info { 789 u8 as_uint8; 790 struct { 791 u8 gva_valid:1; 792 u8 gva_gpa_valid:1; 793 u8 hypercall_output_pending:1; 794 u8 tlb_locked_no_overlay:1; 795 u8 reserved:4; 796 } __packed; 797 }; 798 799 struct hv_x64_memory_intercept_message { 800 struct hv_x64_intercept_message_header header; 801 u32 cache_type; /* enum hv_cache_type */ 802 u8 instruction_byte_count; 803 union hv_x64_memory_access_info memory_access_info; 804 u8 tpr_priority; 805 u8 reserved1; 806 u64 guest_virtual_address; 807 u64 guest_physical_address; 808 u8 instruction_bytes[16]; 809 } __packed; 810 811 #if IS_ENABLED(CONFIG_ARM64) 812 union hv_arm64_vp_execution_state { 813 u16 as_uint16; 814 struct { 815 u16 cpl:2; /* Exception Level (EL) */ 816 u16 debug_active:1; 817 u16 interruption_pending:1; 818 u16 vtl:4; 819 u16 virtualization_fault_active:1; 820 u16 reserved:7; 821 } __packed; 822 }; 823 824 struct hv_arm64_intercept_message_header { 825 u32 vp_index; 826 u8 instruction_length; 827 u8 intercept_access_type; 828 union hv_arm64_vp_execution_state execution_state; 829 u64 pc; 830 u64 cpsr; 831 } __packed; 832 833 union hv_arm64_memory_access_info { 834 u8 as_uint8; 835 struct { 836 u8 gva_valid:1; 837 u8 gva_gpa_valid:1; 838 u8 hypercall_output_pending:1; 839 u8 reserved:5; 840 } __packed; 841 }; 842 843 struct hv_arm64_memory_intercept_message { 844 struct hv_arm64_intercept_message_header header; 845 u32 cache_type; /* enum hv_cache_type */ 846 u8 instruction_byte_count; 847 union hv_arm64_memory_access_info memory_access_info; 848 u16 reserved1; 849 u8 instruction_bytes[4]; 850 u32 reserved2; 851 u64 guest_virtual_address; 852 u64 guest_physical_address; 853 u64 syndrome; 854 } __packed; 855 856 #endif /* CONFIG_ARM64 */ 857 858 /* 859 * Dispatch state for the VP communicated by the hypervisor to the 860 * VP-dispatching thread in the root on return from HVCALL_DISPATCH_VP. 861 */ 862 enum hv_vp_dispatch_state { 863 HV_VP_DISPATCH_STATE_INVALID = 0, 864 HV_VP_DISPATCH_STATE_BLOCKED = 1, 865 HV_VP_DISPATCH_STATE_READY = 2, 866 }; 867 868 /* 869 * Dispatch event that caused the current dispatch state on return from 870 * HVCALL_DISPATCH_VP. 871 */ 872 enum hv_vp_dispatch_event { 873 HV_VP_DISPATCH_EVENT_INVALID = 0x00000000, 874 HV_VP_DISPATCH_EVENT_SUSPEND = 0x00000001, 875 HV_VP_DISPATCH_EVENT_INTERCEPT = 0x00000002, 876 }; 877 878 #define HV_ROOT_SCHEDULER_MAX_VPS_PER_CHILD_PARTITION 1024 879 /* The maximum array size of HV_GENERIC_SET (vp_set) buffer */ 880 #define HV_GENERIC_SET_QWORD_COUNT(max) (((((max) - 1) >> 6) + 1) + 2) 881 882 struct hv_vp_signal_bitset_scheduler_message { 883 u64 partition_id; 884 u32 overflow_count; 885 u16 vp_count; 886 u16 reserved; 887 888 #define BITSET_BUFFER_SIZE \ 889 HV_GENERIC_SET_QWORD_COUNT(HV_ROOT_SCHEDULER_MAX_VPS_PER_CHILD_PARTITION) 890 union { 891 struct hv_vpset bitset; 892 u64 bitset_buffer[BITSET_BUFFER_SIZE]; 893 } vp_bitset; 894 #undef BITSET_BUFFER_SIZE 895 } __packed; 896 897 static_assert(sizeof(struct hv_vp_signal_bitset_scheduler_message) <= 898 (sizeof(struct hv_message) - sizeof(struct hv_message_header))); 899 900 #define HV_MESSAGE_MAX_PARTITION_VP_PAIR_COUNT \ 901 (((sizeof(struct hv_message) - sizeof(struct hv_message_header)) / \ 902 (sizeof(u64 /* partition id */) + sizeof(u32 /* vp index */))) - 1) 903 904 struct hv_vp_signal_pair_scheduler_message { 905 u32 overflow_count; 906 u8 vp_count; 907 u8 reserved1[3]; 908 909 u64 partition_ids[HV_MESSAGE_MAX_PARTITION_VP_PAIR_COUNT]; 910 u32 vp_indexes[HV_MESSAGE_MAX_PARTITION_VP_PAIR_COUNT]; 911 912 u8 reserved2[4]; 913 } __packed; 914 915 static_assert(sizeof(struct hv_vp_signal_pair_scheduler_message) == 916 (sizeof(struct hv_message) - sizeof(struct hv_message_header))); 917 918 /* Input and output structures for HVCALL_DISPATCH_VP */ 919 #define HV_DISPATCH_VP_FLAG_CLEAR_INTERCEPT_SUSPEND 0x1 920 #define HV_DISPATCH_VP_FLAG_ENABLE_CALLER_INTERRUPTS 0x2 921 #define HV_DISPATCH_VP_FLAG_SET_CALLER_SPEC_CTRL 0x4 922 #define HV_DISPATCH_VP_FLAG_SKIP_VP_SPEC_FLUSH 0x8 923 #define HV_DISPATCH_VP_FLAG_SKIP_CALLER_SPEC_FLUSH 0x10 924 #define HV_DISPATCH_VP_FLAG_SKIP_CALLER_USER_SPEC_FLUSH 0x20 925 #define HV_DISPATCH_VP_FLAG_SCAN_INTERRUPT_INJECTION 0x40 926 927 struct hv_input_dispatch_vp { 928 u64 partition_id; 929 u32 vp_index; 930 u32 flags; 931 u64 time_slice; /* in 100ns */ 932 u64 spec_ctrl; 933 } __packed; 934 935 struct hv_output_dispatch_vp { 936 u32 dispatch_state; /* enum hv_vp_dispatch_state */ 937 u32 dispatch_event; /* enum hv_vp_dispatch_event */ 938 } __packed; 939 940 struct hv_input_modify_sparse_spa_page_host_access { 941 u32 host_access : 2; 942 u32 reserved : 30; 943 u32 flags; 944 u64 partition_id; 945 u64 spa_page_list[]; 946 } __packed; 947 948 /* hv_input_modify_sparse_spa_page_host_access flags */ 949 #define HV_MODIFY_SPA_PAGE_HOST_ACCESS_MAKE_EXCLUSIVE 0x1 950 #define HV_MODIFY_SPA_PAGE_HOST_ACCESS_MAKE_SHARED 0x2 951 #define HV_MODIFY_SPA_PAGE_HOST_ACCESS_LARGE_PAGE 0x4 952 #define HV_MODIFY_SPA_PAGE_HOST_ACCESS_HUGE_PAGE 0x8 953 954 #endif /* _HV_HVHDK_H */ 955