1*ac03495dSRichard Fitzgerald /* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */ 2*ac03495dSRichard Fitzgerald /* 3*ac03495dSRichard Fitzgerald * Device Tree defines for CS48L32 DSP. 4*ac03495dSRichard Fitzgerald * 5*ac03495dSRichard Fitzgerald * Copyright (C) 2016-2018, 2022, 2025 Cirrus Logic, Inc. and 6*ac03495dSRichard Fitzgerald * Cirrus Logic International Semiconductor Ltd. 7*ac03495dSRichard Fitzgerald */ 8*ac03495dSRichard Fitzgerald 9*ac03495dSRichard Fitzgerald #ifndef DT_BINDINGS_SOUND_CS48L32_H 10*ac03495dSRichard Fitzgerald #define DT_BINDINGS_SOUND_CS48L32_H 11*ac03495dSRichard Fitzgerald 12*ac03495dSRichard Fitzgerald /* Values for cirrus,in-type */ 13*ac03495dSRichard Fitzgerald #define CS48L32_IN_TYPE_DIFF 0 14*ac03495dSRichard Fitzgerald #define CS48L32_IN_TYPE_SE 1 15*ac03495dSRichard Fitzgerald 16*ac03495dSRichard Fitzgerald /* Values for cirrus,pdm-sup */ 17*ac03495dSRichard Fitzgerald #define CS48L32_PDM_SUP_VOUT_MIC 0 18*ac03495dSRichard Fitzgerald #define CS48L32_PDM_SUP_MICBIAS1 1 19*ac03495dSRichard Fitzgerald 20*ac03495dSRichard Fitzgerald #endif 21