xref: /linux/include/dt-bindings/reset/toshiba,tmpv770x.h (revision 03ab8e6297acd1bc0eedaa050e2a1635c576fd11)
1*ffa81a03SNobuhiro Iwamatsu /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2*ffa81a03SNobuhiro Iwamatsu 
3*ffa81a03SNobuhiro Iwamatsu #ifndef _DT_BINDINGS_RESET_TOSHIBA_TMPV770X_H_
4*ffa81a03SNobuhiro Iwamatsu #define _DT_BINDINGS_RESET_TOSHIBA_TMPV770X_H_
5*ffa81a03SNobuhiro Iwamatsu 
6*ffa81a03SNobuhiro Iwamatsu /* Reset */
7*ffa81a03SNobuhiro Iwamatsu #define TMPV770X_RESET_PIETHER_2P5M	0
8*ffa81a03SNobuhiro Iwamatsu #define TMPV770X_RESET_PIETHER_25M	1
9*ffa81a03SNobuhiro Iwamatsu #define TMPV770X_RESET_PIETHER_50M	2
10*ffa81a03SNobuhiro Iwamatsu #define TMPV770X_RESET_PIETHER_125M	3
11*ffa81a03SNobuhiro Iwamatsu #define TMPV770X_RESET_HOX		4
12*ffa81a03SNobuhiro Iwamatsu #define TMPV770X_RESET_PCIE_MSTR	5
13*ffa81a03SNobuhiro Iwamatsu #define TMPV770X_RESET_PCIE_AUX		6
14*ffa81a03SNobuhiro Iwamatsu #define TMPV770X_RESET_PIINTC		7
15*ffa81a03SNobuhiro Iwamatsu #define TMPV770X_RESET_PIETHER_BUS	8
16*ffa81a03SNobuhiro Iwamatsu #define TMPV770X_RESET_PISPI0		9
17*ffa81a03SNobuhiro Iwamatsu #define TMPV770X_RESET_PISPI1		10
18*ffa81a03SNobuhiro Iwamatsu #define TMPV770X_RESET_PISPI2		11
19*ffa81a03SNobuhiro Iwamatsu #define TMPV770X_RESET_PISPI3		12
20*ffa81a03SNobuhiro Iwamatsu #define TMPV770X_RESET_PISPI4		13
21*ffa81a03SNobuhiro Iwamatsu #define TMPV770X_RESET_PISPI5		14
22*ffa81a03SNobuhiro Iwamatsu #define TMPV770X_RESET_PISPI6		15
23*ffa81a03SNobuhiro Iwamatsu #define TMPV770X_RESET_PIUART0		16
24*ffa81a03SNobuhiro Iwamatsu #define TMPV770X_RESET_PIUART1		17
25*ffa81a03SNobuhiro Iwamatsu #define TMPV770X_RESET_PIUART2		18
26*ffa81a03SNobuhiro Iwamatsu #define TMPV770X_RESET_PIUART3		19
27*ffa81a03SNobuhiro Iwamatsu #define TMPV770X_RESET_PII2C0		20
28*ffa81a03SNobuhiro Iwamatsu #define TMPV770X_RESET_PII2C1		21
29*ffa81a03SNobuhiro Iwamatsu #define TMPV770X_RESET_PII2C2		22
30*ffa81a03SNobuhiro Iwamatsu #define TMPV770X_RESET_PII2C3		23
31*ffa81a03SNobuhiro Iwamatsu #define TMPV770X_RESET_PII2C4		24
32*ffa81a03SNobuhiro Iwamatsu #define TMPV770X_RESET_PII2C5		25
33*ffa81a03SNobuhiro Iwamatsu #define TMPV770X_RESET_PII2C6		26
34*ffa81a03SNobuhiro Iwamatsu #define TMPV770X_RESET_PII2C7		27
35*ffa81a03SNobuhiro Iwamatsu #define TMPV770X_RESET_PII2C8		28
36*ffa81a03SNobuhiro Iwamatsu #define TMPV770X_RESET_PIPCMIF		29
37*ffa81a03SNobuhiro Iwamatsu #define TMPV770X_RESET_PICKMON		30
38*ffa81a03SNobuhiro Iwamatsu #define TMPV770X_RESET_SBUSCLK		31
39*ffa81a03SNobuhiro Iwamatsu #define TMPV770X_NR_RESET		32
40*ffa81a03SNobuhiro Iwamatsu 
41*ffa81a03SNobuhiro Iwamatsu #endif /*_DT_BINDINGS_RESET_TOSHIBA_TMPV770X_H_ */
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