xref: /linux/include/dt-bindings/reset/stericsson,db8500-prcc-reset.h (revision 03ab8e6297acd1bc0eedaa050e2a1635c576fd11)
1*f2b883bbSLinus Walleij /* SPDX-License-Identifier: GPL-2.0 */
2*f2b883bbSLinus Walleij 
3*f2b883bbSLinus Walleij #ifndef _DT_BINDINGS_STE_PRCC_RESET
4*f2b883bbSLinus Walleij #define _DT_BINDINGS_STE_PRCC_RESET
5*f2b883bbSLinus Walleij 
6*f2b883bbSLinus Walleij #define DB8500_PRCC_1				1
7*f2b883bbSLinus Walleij #define DB8500_PRCC_2				2
8*f2b883bbSLinus Walleij #define DB8500_PRCC_3				3
9*f2b883bbSLinus Walleij #define DB8500_PRCC_6				6
10*f2b883bbSLinus Walleij 
11*f2b883bbSLinus Walleij /* Reset lines on PRCC 1 */
12*f2b883bbSLinus Walleij #define DB8500_PRCC_1_RESET_UART0		0
13*f2b883bbSLinus Walleij #define DB8500_PRCC_1_RESET_UART1		1
14*f2b883bbSLinus Walleij #define DB8500_PRCC_1_RESET_I2C1		2
15*f2b883bbSLinus Walleij #define DB8500_PRCC_1_RESET_MSP0		3
16*f2b883bbSLinus Walleij #define DB8500_PRCC_1_RESET_MSP1		4
17*f2b883bbSLinus Walleij #define DB8500_PRCC_1_RESET_SDI0		5
18*f2b883bbSLinus Walleij #define DB8500_PRCC_1_RESET_I2C2		6
19*f2b883bbSLinus Walleij #define DB8500_PRCC_1_RESET_SPI3		7
20*f2b883bbSLinus Walleij #define DB8500_PRCC_1_RESET_SLIMBUS0		8
21*f2b883bbSLinus Walleij #define DB8500_PRCC_1_RESET_I2C4		9
22*f2b883bbSLinus Walleij #define DB8500_PRCC_1_RESET_MSP3		10
23*f2b883bbSLinus Walleij #define DB8500_PRCC_1_RESET_PER_MSP3		11
24*f2b883bbSLinus Walleij #define DB8500_PRCC_1_RESET_PER_MSP1		12
25*f2b883bbSLinus Walleij #define DB8500_PRCC_1_RESET_PER_MSP0		13
26*f2b883bbSLinus Walleij #define DB8500_PRCC_1_RESET_PER_SLIMBUS		14
27*f2b883bbSLinus Walleij 
28*f2b883bbSLinus Walleij /* Reset lines on PRCC 2 */
29*f2b883bbSLinus Walleij #define DB8500_PRCC_2_RESET_I2C3		0
30*f2b883bbSLinus Walleij #define DB8500_PRCC_2_RESET_PWL			1
31*f2b883bbSLinus Walleij #define DB8500_PRCC_2_RESET_SDI4		2
32*f2b883bbSLinus Walleij #define DB8500_PRCC_2_RESET_MSP2		3
33*f2b883bbSLinus Walleij #define DB8500_PRCC_2_RESET_SDI1		4
34*f2b883bbSLinus Walleij #define DB8500_PRCC_2_RESET_SDI3		5
35*f2b883bbSLinus Walleij #define DB8500_PRCC_2_RESET_HSIRX		6
36*f2b883bbSLinus Walleij #define DB8500_PRCC_2_RESET_HSITX		7
37*f2b883bbSLinus Walleij #define DB8500_PRCC_1_RESET_PER_MSP2		8
38*f2b883bbSLinus Walleij 
39*f2b883bbSLinus Walleij /* Reset lines on PRCC 3 */
40*f2b883bbSLinus Walleij #define DB8500_PRCC_3_RESET_SSP0		1
41*f2b883bbSLinus Walleij #define DB8500_PRCC_3_RESET_SSP1		2
42*f2b883bbSLinus Walleij #define DB8500_PRCC_3_RESET_I2C0		3
43*f2b883bbSLinus Walleij #define DB8500_PRCC_3_RESET_SDI2		4
44*f2b883bbSLinus Walleij #define DB8500_PRCC_3_RESET_SKE			5
45*f2b883bbSLinus Walleij #define DB8500_PRCC_3_RESET_UART2		6
46*f2b883bbSLinus Walleij #define DB8500_PRCC_3_RESET_SDI5		7
47*f2b883bbSLinus Walleij 
48*f2b883bbSLinus Walleij /* Reset lines on PRCC 6 */
49*f2b883bbSLinus Walleij #define DB8500_PRCC_3_RESET_RNG			0
50*f2b883bbSLinus Walleij 
51*f2b883bbSLinus Walleij #endif
52