xref: /linux/include/dt-bindings/reset/qcom,mmcc-apq8084.h (revision 75bf465f0bc33e9b776a46d6a1b9b990f5fb7c37)
1*9c92ab61SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */
22b46cd23SGeorgi Djakov /*
32b46cd23SGeorgi Djakov  * Copyright (c) 2014, The Linux Foundation. All rights reserved.
42b46cd23SGeorgi Djakov  */
52b46cd23SGeorgi Djakov 
62b46cd23SGeorgi Djakov #ifndef _DT_BINDINGS_RESET_APQ_MMCC_8084_H
72b46cd23SGeorgi Djakov #define _DT_BINDINGS_RESET_APQ_MMCC_8084_H
82b46cd23SGeorgi Djakov 
92b46cd23SGeorgi Djakov #define MMSS_SPDM_RESET			0
102b46cd23SGeorgi Djakov #define MMSS_SPDM_RM_RESET		1
112b46cd23SGeorgi Djakov #define VENUS0_RESET			2
122b46cd23SGeorgi Djakov #define VPU_RESET			3
132b46cd23SGeorgi Djakov #define MDSS_RESET			4
142b46cd23SGeorgi Djakov #define AVSYNC_RESET			5
152b46cd23SGeorgi Djakov #define CAMSS_PHY0_RESET		6
162b46cd23SGeorgi Djakov #define CAMSS_PHY1_RESET		7
172b46cd23SGeorgi Djakov #define CAMSS_PHY2_RESET		8
182b46cd23SGeorgi Djakov #define CAMSS_CSI0_RESET		9
192b46cd23SGeorgi Djakov #define CAMSS_CSI0PHY_RESET		10
202b46cd23SGeorgi Djakov #define CAMSS_CSI0RDI_RESET		11
212b46cd23SGeorgi Djakov #define CAMSS_CSI0PIX_RESET		12
222b46cd23SGeorgi Djakov #define CAMSS_CSI1_RESET		13
232b46cd23SGeorgi Djakov #define CAMSS_CSI1PHY_RESET		14
242b46cd23SGeorgi Djakov #define CAMSS_CSI1RDI_RESET		15
252b46cd23SGeorgi Djakov #define CAMSS_CSI1PIX_RESET		16
262b46cd23SGeorgi Djakov #define CAMSS_CSI2_RESET		17
272b46cd23SGeorgi Djakov #define CAMSS_CSI2PHY_RESET		18
282b46cd23SGeorgi Djakov #define CAMSS_CSI2RDI_RESET		19
292b46cd23SGeorgi Djakov #define CAMSS_CSI2PIX_RESET		20
302b46cd23SGeorgi Djakov #define CAMSS_CSI3_RESET		21
312b46cd23SGeorgi Djakov #define CAMSS_CSI3PHY_RESET		22
322b46cd23SGeorgi Djakov #define CAMSS_CSI3RDI_RESET		23
332b46cd23SGeorgi Djakov #define CAMSS_CSI3PIX_RESET		24
342b46cd23SGeorgi Djakov #define CAMSS_ISPIF_RESET		25
352b46cd23SGeorgi Djakov #define CAMSS_CCI_RESET			26
362b46cd23SGeorgi Djakov #define CAMSS_MCLK0_RESET		27
372b46cd23SGeorgi Djakov #define CAMSS_MCLK1_RESET		28
382b46cd23SGeorgi Djakov #define CAMSS_MCLK2_RESET		29
392b46cd23SGeorgi Djakov #define CAMSS_MCLK3_RESET		30
402b46cd23SGeorgi Djakov #define CAMSS_GP0_RESET			31
412b46cd23SGeorgi Djakov #define CAMSS_GP1_RESET			32
422b46cd23SGeorgi Djakov #define CAMSS_TOP_RESET			33
432b46cd23SGeorgi Djakov #define CAMSS_AHB_RESET			34
442b46cd23SGeorgi Djakov #define CAMSS_MICRO_RESET		35
452b46cd23SGeorgi Djakov #define CAMSS_JPEG_RESET		36
462b46cd23SGeorgi Djakov #define CAMSS_VFE_RESET			37
472b46cd23SGeorgi Djakov #define CAMSS_CSI_VFE0_RESET		38
482b46cd23SGeorgi Djakov #define CAMSS_CSI_VFE1_RESET		39
492b46cd23SGeorgi Djakov #define OXILI_RESET			40
502b46cd23SGeorgi Djakov #define OXILICX_RESET			41
512b46cd23SGeorgi Djakov #define OCMEMCX_RESET			42
522b46cd23SGeorgi Djakov #define MMSS_RBCRP_RESET		43
532b46cd23SGeorgi Djakov #define MMSSNOCAHB_RESET		44
542b46cd23SGeorgi Djakov #define MMSSNOCAXI_RESET		45
552b46cd23SGeorgi Djakov 
562b46cd23SGeorgi Djakov #endif
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