xref: /linux/include/dt-bindings/reset/qcom,gcc-mdm9615.h (revision 75bf465f0bc33e9b776a46d6a1b9b990f5fb7c37)
1*9c92ab61SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */
2f7508fedSNeil Armstrong /*
3f7508fedSNeil Armstrong  * Copyright (c) 2013, The Linux Foundation. All rights reserved.
4f7508fedSNeil Armstrong  * Copyright (c) BayLibre, SAS.
5f7508fedSNeil Armstrong  * Author : Neil Armstrong <narmstrong@baylibre.com>
6f7508fedSNeil Armstrong  */
7f7508fedSNeil Armstrong 
8f7508fedSNeil Armstrong #ifndef _DT_BINDINGS_RESET_GCC_MDM9615_H
9f7508fedSNeil Armstrong #define _DT_BINDINGS_RESET_GCC_MDM9615_H
10f7508fedSNeil Armstrong 
11f7508fedSNeil Armstrong #define SFAB_MSS_Q6_SW_RESET				0
12f7508fedSNeil Armstrong #define SFAB_MSS_Q6_FW_RESET				1
13f7508fedSNeil Armstrong #define QDSS_STM_RESET					2
14f7508fedSNeil Armstrong #define AFAB_SMPSS_S_RESET				3
15f7508fedSNeil Armstrong #define AFAB_SMPSS_M1_RESET				4
16f7508fedSNeil Armstrong #define AFAB_SMPSS_M0_RESET				5
17f7508fedSNeil Armstrong #define AFAB_EBI1_CH0_RESET				6
18f7508fedSNeil Armstrong #define AFAB_EBI1_CH1_RESET				7
19f7508fedSNeil Armstrong #define SFAB_ADM0_M0_RESET				8
20f7508fedSNeil Armstrong #define SFAB_ADM0_M1_RESET				9
21f7508fedSNeil Armstrong #define SFAB_ADM0_M2_RESET				10
22f7508fedSNeil Armstrong #define ADM0_C2_RESET					11
23f7508fedSNeil Armstrong #define ADM0_C1_RESET					12
24f7508fedSNeil Armstrong #define ADM0_C0_RESET					13
25f7508fedSNeil Armstrong #define ADM0_PBUS_RESET					14
26f7508fedSNeil Armstrong #define ADM0_RESET					15
27f7508fedSNeil Armstrong #define QDSS_CLKS_SW_RESET				16
28f7508fedSNeil Armstrong #define QDSS_POR_RESET					17
29f7508fedSNeil Armstrong #define QDSS_TSCTR_RESET				18
30f7508fedSNeil Armstrong #define QDSS_HRESET_RESET				19
31f7508fedSNeil Armstrong #define QDSS_AXI_RESET					20
32f7508fedSNeil Armstrong #define QDSS_DBG_RESET					21
33f7508fedSNeil Armstrong #define PCIE_A_RESET					22
34f7508fedSNeil Armstrong #define PCIE_AUX_RESET					23
35f7508fedSNeil Armstrong #define PCIE_H_RESET					24
36f7508fedSNeil Armstrong #define SFAB_PCIE_M_RESET				25
37f7508fedSNeil Armstrong #define SFAB_PCIE_S_RESET				26
38f7508fedSNeil Armstrong #define SFAB_MSS_M_RESET				27
39f7508fedSNeil Armstrong #define SFAB_USB3_M_RESET				28
40f7508fedSNeil Armstrong #define SFAB_RIVA_M_RESET				29
41f7508fedSNeil Armstrong #define SFAB_LPASS_RESET				30
42f7508fedSNeil Armstrong #define SFAB_AFAB_M_RESET				31
43f7508fedSNeil Armstrong #define AFAB_SFAB_M0_RESET				32
44f7508fedSNeil Armstrong #define AFAB_SFAB_M1_RESET				33
45f7508fedSNeil Armstrong #define SFAB_SATA_S_RESET				34
46f7508fedSNeil Armstrong #define SFAB_DFAB_M_RESET				35
47f7508fedSNeil Armstrong #define DFAB_SFAB_M_RESET				36
48f7508fedSNeil Armstrong #define DFAB_SWAY0_RESET				37
49f7508fedSNeil Armstrong #define DFAB_SWAY1_RESET				38
50f7508fedSNeil Armstrong #define DFAB_ARB0_RESET					39
51f7508fedSNeil Armstrong #define DFAB_ARB1_RESET					40
52f7508fedSNeil Armstrong #define PPSS_PROC_RESET					41
53f7508fedSNeil Armstrong #define PPSS_RESET					42
54f7508fedSNeil Armstrong #define DMA_BAM_RESET					43
55f7508fedSNeil Armstrong #define SPS_TIC_H_RESET					44
56f7508fedSNeil Armstrong #define SLIMBUS_H_RESET					45
57f7508fedSNeil Armstrong #define SFAB_CFPB_M_RESET				46
58f7508fedSNeil Armstrong #define SFAB_CFPB_S_RESET				47
59f7508fedSNeil Armstrong #define TSIF_H_RESET					48
60f7508fedSNeil Armstrong #define CE1_H_RESET					49
61f7508fedSNeil Armstrong #define CE1_CORE_RESET					50
62f7508fedSNeil Armstrong #define CE1_SLEEP_RESET					51
63f7508fedSNeil Armstrong #define CE2_H_RESET					52
64f7508fedSNeil Armstrong #define CE2_CORE_RESET					53
65f7508fedSNeil Armstrong #define SFAB_SFPB_M_RESET				54
66f7508fedSNeil Armstrong #define SFAB_SFPB_S_RESET				55
67f7508fedSNeil Armstrong #define RPM_PROC_RESET					56
68f7508fedSNeil Armstrong #define PMIC_SSBI2_RESET				57
69f7508fedSNeil Armstrong #define SDC1_RESET					58
70f7508fedSNeil Armstrong #define SDC2_RESET					59
71f7508fedSNeil Armstrong #define SDC3_RESET					60
72f7508fedSNeil Armstrong #define SDC4_RESET					61
73f7508fedSNeil Armstrong #define SDC5_RESET					62
74f7508fedSNeil Armstrong #define DFAB_A2_RESET					63
75f7508fedSNeil Armstrong #define USB_HS1_RESET					64
76f7508fedSNeil Armstrong #define USB_HSIC_RESET					65
77f7508fedSNeil Armstrong #define USB_FS1_XCVR_RESET				66
78f7508fedSNeil Armstrong #define USB_FS1_RESET					67
79f7508fedSNeil Armstrong #define USB_FS2_XCVR_RESET				68
80f7508fedSNeil Armstrong #define USB_FS2_RESET					69
81f7508fedSNeil Armstrong #define GSBI1_RESET					70
82f7508fedSNeil Armstrong #define GSBI2_RESET					71
83f7508fedSNeil Armstrong #define GSBI3_RESET					72
84f7508fedSNeil Armstrong #define GSBI4_RESET					73
85f7508fedSNeil Armstrong #define GSBI5_RESET					74
86f7508fedSNeil Armstrong #define GSBI6_RESET					75
87f7508fedSNeil Armstrong #define GSBI7_RESET					76
88f7508fedSNeil Armstrong #define GSBI8_RESET					77
89f7508fedSNeil Armstrong #define GSBI9_RESET					78
90f7508fedSNeil Armstrong #define GSBI10_RESET					79
91f7508fedSNeil Armstrong #define GSBI11_RESET					80
92f7508fedSNeil Armstrong #define GSBI12_RESET					81
93f7508fedSNeil Armstrong #define SPDM_RESET					82
94f7508fedSNeil Armstrong #define TLMM_H_RESET					83
95f7508fedSNeil Armstrong #define SFAB_MSS_S_RESET				84
96f7508fedSNeil Armstrong #define MSS_SLP_RESET					85
97f7508fedSNeil Armstrong #define MSS_Q6SW_JTAG_RESET				86
98f7508fedSNeil Armstrong #define MSS_Q6FW_JTAG_RESET				87
99f7508fedSNeil Armstrong #define MSS_RESET					88
100f7508fedSNeil Armstrong #define SATA_H_RESET					89
101f7508fedSNeil Armstrong #define SATA_RXOOB_RESE					90
102f7508fedSNeil Armstrong #define SATA_PMALIVE_RESET				91
103f7508fedSNeil Armstrong #define SATA_SFAB_M_RESET				92
104f7508fedSNeil Armstrong #define TSSC_RESET					93
105f7508fedSNeil Armstrong #define PDM_RESET					94
106f7508fedSNeil Armstrong #define MPM_H_RESET					95
107f7508fedSNeil Armstrong #define MPM_RESET					96
108f7508fedSNeil Armstrong #define SFAB_SMPSS_S_RESET				97
109f7508fedSNeil Armstrong #define PRNG_RESET					98
110f7508fedSNeil Armstrong #define RIVA_RESET					99
111f7508fedSNeil Armstrong #define USB_HS3_RESET					100
112f7508fedSNeil Armstrong #define USB_HS4_RESET					101
113f7508fedSNeil Armstrong #define CE3_RESET					102
114f7508fedSNeil Armstrong #define PCIE_EXT_PCI_RESET				103
115f7508fedSNeil Armstrong #define PCIE_PHY_RESET					104
116f7508fedSNeil Armstrong #define PCIE_PCI_RESET					105
117f7508fedSNeil Armstrong #define PCIE_POR_RESET					106
118f7508fedSNeil Armstrong #define PCIE_HCLK_RESET					107
119f7508fedSNeil Armstrong #define PCIE_ACLK_RESET					108
120f7508fedSNeil Armstrong #define CE3_H_RESET					109
121f7508fedSNeil Armstrong #define SFAB_CE3_M_RESET				110
122f7508fedSNeil Armstrong #define SFAB_CE3_S_RESET				111
123f7508fedSNeil Armstrong #define SATA_RESET					112
124f7508fedSNeil Armstrong #define CE3_SLEEP_RESET					113
125f7508fedSNeil Armstrong #define GSS_SLP_RESET					114
126f7508fedSNeil Armstrong #define GSS_RESET					115
127f7508fedSNeil Armstrong 
128f7508fedSNeil Armstrong #endif
129