1*06ac2566SLuo Jie /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2*06ac2566SLuo Jie /* 3*06ac2566SLuo Jie * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. 4*06ac2566SLuo Jie */ 5*06ac2566SLuo Jie 6*06ac2566SLuo Jie #ifndef _DT_BINDINGS_RESET_QCOM_IPQ5424_NSSCC_H 7*06ac2566SLuo Jie #define _DT_BINDINGS_RESET_QCOM_IPQ5424_NSSCC_H 8*06ac2566SLuo Jie 9*06ac2566SLuo Jie #define NSS_CC_CE_APB_CLK_ARES 0 10*06ac2566SLuo Jie #define NSS_CC_CE_AXI_CLK_ARES 1 11*06ac2566SLuo Jie #define NSS_CC_DEBUG_CLK_ARES 2 12*06ac2566SLuo Jie #define NSS_CC_EIP_CLK_ARES 3 13*06ac2566SLuo Jie #define NSS_CC_NSS_CSR_CLK_ARES 4 14*06ac2566SLuo Jie #define NSS_CC_NSSNOC_CE_APB_CLK_ARES 5 15*06ac2566SLuo Jie #define NSS_CC_NSSNOC_CE_AXI_CLK_ARES 6 16*06ac2566SLuo Jie #define NSS_CC_NSSNOC_EIP_CLK_ARES 7 17*06ac2566SLuo Jie #define NSS_CC_NSSNOC_NSS_CSR_CLK_ARES 8 18*06ac2566SLuo Jie #define NSS_CC_NSSNOC_PPE_CLK_ARES 9 19*06ac2566SLuo Jie #define NSS_CC_NSSNOC_PPE_CFG_CLK_ARES 10 20*06ac2566SLuo Jie #define NSS_CC_PORT1_MAC_CLK_ARES 11 21*06ac2566SLuo Jie #define NSS_CC_PORT1_RX_CLK_ARES 12 22*06ac2566SLuo Jie #define NSS_CC_PORT1_TX_CLK_ARES 13 23*06ac2566SLuo Jie #define NSS_CC_PORT2_MAC_CLK_ARES 14 24*06ac2566SLuo Jie #define NSS_CC_PORT2_RX_CLK_ARES 15 25*06ac2566SLuo Jie #define NSS_CC_PORT2_TX_CLK_ARES 16 26*06ac2566SLuo Jie #define NSS_CC_PORT3_MAC_CLK_ARES 17 27*06ac2566SLuo Jie #define NSS_CC_PORT3_RX_CLK_ARES 18 28*06ac2566SLuo Jie #define NSS_CC_PORT3_TX_CLK_ARES 19 29*06ac2566SLuo Jie #define NSS_CC_PPE_BCR 20 30*06ac2566SLuo Jie #define NSS_CC_PPE_EDMA_CLK_ARES 21 31*06ac2566SLuo Jie #define NSS_CC_PPE_EDMA_CFG_CLK_ARES 22 32*06ac2566SLuo Jie #define NSS_CC_PPE_SWITCH_BTQ_CLK_ARES 23 33*06ac2566SLuo Jie #define NSS_CC_PPE_SWITCH_CLK_ARES 24 34*06ac2566SLuo Jie #define NSS_CC_PPE_SWITCH_CFG_CLK_ARES 25 35*06ac2566SLuo Jie #define NSS_CC_PPE_SWITCH_IPE_CLK_ARES 26 36*06ac2566SLuo Jie #define NSS_CC_UNIPHY_PORT1_RX_CLK_ARES 27 37*06ac2566SLuo Jie #define NSS_CC_UNIPHY_PORT1_TX_CLK_ARES 28 38*06ac2566SLuo Jie #define NSS_CC_UNIPHY_PORT2_RX_CLK_ARES 29 39*06ac2566SLuo Jie #define NSS_CC_UNIPHY_PORT2_TX_CLK_ARES 30 40*06ac2566SLuo Jie #define NSS_CC_UNIPHY_PORT3_RX_CLK_ARES 31 41*06ac2566SLuo Jie #define NSS_CC_UNIPHY_PORT3_TX_CLK_ARES 32 42*06ac2566SLuo Jie #define NSS_CC_XGMAC0_PTP_REF_CLK_ARES 33 43*06ac2566SLuo Jie #define NSS_CC_XGMAC1_PTP_REF_CLK_ARES 34 44*06ac2566SLuo Jie #define NSS_CC_XGMAC2_PTP_REF_CLK_ARES 35 45*06ac2566SLuo Jie 46*06ac2566SLuo Jie #endif 47