xref: /linux/include/dt-bindings/reset/amlogic,meson8b-clkc-reset.h (revision cf40a76e7d5874bb25f4404eecc58a2e033af885)
1*0f9b973bSMartin Blumenstingl /*
2*0f9b973bSMartin Blumenstingl  * Copyright (c) 2017 Martin Blumenstingl <martin.blumenstingl@googlemail.com>.
3*0f9b973bSMartin Blumenstingl  *
4*0f9b973bSMartin Blumenstingl  * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5*0f9b973bSMartin Blumenstingl  */
6*0f9b973bSMartin Blumenstingl 
7*0f9b973bSMartin Blumenstingl #ifndef _DT_BINDINGS_AMLOGIC_MESON8B_CLKC_RESET_H
8*0f9b973bSMartin Blumenstingl #define _DT_BINDINGS_AMLOGIC_MESON8B_CLKC_RESET_H
9*0f9b973bSMartin Blumenstingl 
10*0f9b973bSMartin Blumenstingl #define CLKC_RESET_L2_CACHE_SOFT_RESET				0
11*0f9b973bSMartin Blumenstingl #define CLKC_RESET_AXI_64_TO_128_BRIDGE_A5_SOFT_RESET		1
12*0f9b973bSMartin Blumenstingl #define CLKC_RESET_SCU_SOFT_RESET				2
13*0f9b973bSMartin Blumenstingl #define CLKC_RESET_CPU0_SOFT_RESET				3
14*0f9b973bSMartin Blumenstingl #define CLKC_RESET_CPU1_SOFT_RESET				4
15*0f9b973bSMartin Blumenstingl #define CLKC_RESET_CPU2_SOFT_RESET				5
16*0f9b973bSMartin Blumenstingl #define CLKC_RESET_CPU3_SOFT_RESET				6
17*0f9b973bSMartin Blumenstingl #define CLKC_RESET_A5_GLOBAL_RESET				7
18*0f9b973bSMartin Blumenstingl #define CLKC_RESET_A5_AXI_SOFT_RESET				8
19*0f9b973bSMartin Blumenstingl #define CLKC_RESET_A5_ABP_SOFT_RESET				9
20*0f9b973bSMartin Blumenstingl #define CLKC_RESET_AXI_64_TO_128_BRIDGE_MMC_SOFT_RESET		10
21*0f9b973bSMartin Blumenstingl #define CLKC_RESET_VID_CLK_CNTL_SOFT_RESET			11
22*0f9b973bSMartin Blumenstingl #define CLKC_RESET_VID_DIVIDER_CNTL_SOFT_RESET_POST		12
23*0f9b973bSMartin Blumenstingl #define CLKC_RESET_VID_DIVIDER_CNTL_SOFT_RESET_PRE		13
24*0f9b973bSMartin Blumenstingl #define CLKC_RESET_VID_DIVIDER_CNTL_RESET_N_POST		14
25*0f9b973bSMartin Blumenstingl #define CLKC_RESET_VID_DIVIDER_CNTL_RESET_N_PRE			15
26*0f9b973bSMartin Blumenstingl 
27*0f9b973bSMartin Blumenstingl #endif /* _DT_BINDINGS_AMLOGIC_MESON8B_CLKC_RESET_H */
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