1*87b6426aSPascal Paillet /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2*87b6426aSPascal Paillet /* 3*87b6426aSPascal Paillet * Copyright (C) 2024, STMicroelectronics - All Rights Reserved 4*87b6426aSPascal Paillet */ 5*87b6426aSPascal Paillet 6*87b6426aSPascal Paillet #ifndef __DT_BINDINGS_REGULATOR_ST_STM32MP25_REGULATOR_H 7*87b6426aSPascal Paillet #define __DT_BINDINGS_REGULATOR_ST_STM32MP25_REGULATOR_H 8*87b6426aSPascal Paillet 9*87b6426aSPascal Paillet /* SCMI voltage domains identifiers */ 10*87b6426aSPascal Paillet 11*87b6426aSPascal Paillet /* SOC Internal regulators */ 12*87b6426aSPascal Paillet #define VOLTD_SCMI_VDDIO1 0 13*87b6426aSPascal Paillet #define VOLTD_SCMI_VDDIO2 1 14*87b6426aSPascal Paillet #define VOLTD_SCMI_VDDIO3 2 15*87b6426aSPascal Paillet #define VOLTD_SCMI_VDDIO4 3 16*87b6426aSPascal Paillet #define VOLTD_SCMI_VDDIO 4 17*87b6426aSPascal Paillet #define VOLTD_SCMI_UCPD 5 18*87b6426aSPascal Paillet #define VOLTD_SCMI_USB33 6 19*87b6426aSPascal Paillet #define VOLTD_SCMI_ADC 7 20*87b6426aSPascal Paillet #define VOLTD_SCMI_GPU 8 21*87b6426aSPascal Paillet #define VOLTD_SCMI_VREFBUF 9 22*87b6426aSPascal Paillet 23*87b6426aSPascal Paillet /* STPMIC2 regulators */ 24*87b6426aSPascal Paillet #define VOLTD_SCMI_STPMIC2_BUCK1 10 25*87b6426aSPascal Paillet #define VOLTD_SCMI_STPMIC2_BUCK2 11 26*87b6426aSPascal Paillet #define VOLTD_SCMI_STPMIC2_BUCK3 12 27*87b6426aSPascal Paillet #define VOLTD_SCMI_STPMIC2_BUCK4 13 28*87b6426aSPascal Paillet #define VOLTD_SCMI_STPMIC2_BUCK5 14 29*87b6426aSPascal Paillet #define VOLTD_SCMI_STPMIC2_BUCK6 15 30*87b6426aSPascal Paillet #define VOLTD_SCMI_STPMIC2_BUCK7 16 31*87b6426aSPascal Paillet #define VOLTD_SCMI_STPMIC2_LDO1 17 32*87b6426aSPascal Paillet #define VOLTD_SCMI_STPMIC2_LDO2 18 33*87b6426aSPascal Paillet #define VOLTD_SCMI_STPMIC2_LDO3 19 34*87b6426aSPascal Paillet #define VOLTD_SCMI_STPMIC2_LDO4 20 35*87b6426aSPascal Paillet #define VOLTD_SCMI_STPMIC2_LDO5 21 36*87b6426aSPascal Paillet #define VOLTD_SCMI_STPMIC2_LDO6 22 37*87b6426aSPascal Paillet #define VOLTD_SCMI_STPMIC2_LDO7 23 38*87b6426aSPascal Paillet #define VOLTD_SCMI_STPMIC2_LDO8 24 39*87b6426aSPascal Paillet #define VOLTD_SCMI_STPMIC2_REFDDR 25 40*87b6426aSPascal Paillet 41*87b6426aSPascal Paillet /* External regulators */ 42*87b6426aSPascal Paillet #define VOLTD_SCMI_REGU0 26 43*87b6426aSPascal Paillet #define VOLTD_SCMI_REGU1 27 44*87b6426aSPascal Paillet #define VOLTD_SCMI_REGU2 28 45*87b6426aSPascal Paillet #define VOLTD_SCMI_REGU3 29 46*87b6426aSPascal Paillet #define VOLTD_SCMI_REGU4 30 47*87b6426aSPascal Paillet 48*87b6426aSPascal Paillet #endif /*__DT_BINDINGS_REGULATOR_ST_STM32MP25_REGULATOR_H */ 49