xref: /linux/include/dt-bindings/power/renesas,r8a779h0-sysc.h (revision 79790b6818e96c58fe2bffee1b418c16e64e7b80)
1*8923149fSDuy Nguyen /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2*8923149fSDuy Nguyen /*
3*8923149fSDuy Nguyen  * Copyright (C) 2023 Renesas Electronics Corp.
4*8923149fSDuy Nguyen  */
5*8923149fSDuy Nguyen #ifndef __DT_BINDINGS_POWER_RENESAS_R8A779H0_SYSC_H__
6*8923149fSDuy Nguyen #define __DT_BINDINGS_POWER_RENESAS_R8A779H0_SYSC_H__
7*8923149fSDuy Nguyen 
8*8923149fSDuy Nguyen /*
9*8923149fSDuy Nguyen  * These power domain indices match the Power Domain Register Numbers (PDR)
10*8923149fSDuy Nguyen  */
11*8923149fSDuy Nguyen 
12*8923149fSDuy Nguyen #define R8A779H0_PD_A1E0D0C0		0
13*8923149fSDuy Nguyen #define R8A779H0_PD_A1E0D0C1		1
14*8923149fSDuy Nguyen #define R8A779H0_PD_A1E0D0C2		2
15*8923149fSDuy Nguyen #define R8A779H0_PD_A1E0D0C3		3
16*8923149fSDuy Nguyen #define R8A779H0_PD_A2E0D0		16
17*8923149fSDuy Nguyen #define R8A779H0_PD_A3CR0		21
18*8923149fSDuy Nguyen #define R8A779H0_PD_A3CR1		22
19*8923149fSDuy Nguyen #define R8A779H0_PD_A3CR2		23
20*8923149fSDuy Nguyen #define R8A779H0_PD_A33DGA		24
21*8923149fSDuy Nguyen #define R8A779H0_PD_A23DGB		25
22*8923149fSDuy Nguyen #define R8A779H0_PD_C4			31
23*8923149fSDuy Nguyen #define R8A779H0_PD_A1DSP0		33
24*8923149fSDuy Nguyen #define R8A779H0_PD_A2IMP01		34
25*8923149fSDuy Nguyen #define R8A779H0_PD_A2PSC		35
26*8923149fSDuy Nguyen #define R8A779H0_PD_A2CV0		36
27*8923149fSDuy Nguyen #define R8A779H0_PD_A2CV1		37
28*8923149fSDuy Nguyen #define R8A779H0_PD_A3IMR0		38
29*8923149fSDuy Nguyen #define R8A779H0_PD_A3IMR1		39
30*8923149fSDuy Nguyen #define R8A779H0_PD_A3VC		40
31*8923149fSDuy Nguyen #define R8A779H0_PD_A2CN0		42
32*8923149fSDuy Nguyen #define R8A779H0_PD_A1CN0		44
33*8923149fSDuy Nguyen #define R8A779H0_PD_A1DSP1		45
34*8923149fSDuy Nguyen #define R8A779H0_PD_A2DMA		47
35*8923149fSDuy Nguyen #define R8A779H0_PD_A2CV2		48
36*8923149fSDuy Nguyen #define R8A779H0_PD_A2CV3		49
37*8923149fSDuy Nguyen #define R8A779H0_PD_A3IMR2		50
38*8923149fSDuy Nguyen #define R8A779H0_PD_A3IMR3		51
39*8923149fSDuy Nguyen #define R8A779H0_PD_A3PCI		52
40*8923149fSDuy Nguyen #define R8A779H0_PD_A2PCIPHY		53
41*8923149fSDuy Nguyen #define R8A779H0_PD_A3VIP0		56
42*8923149fSDuy Nguyen #define R8A779H0_PD_A3VIP2		58
43*8923149fSDuy Nguyen #define R8A779H0_PD_A3ISP0		60
44*8923149fSDuy Nguyen #define R8A779H0_PD_A3DUL		62
45*8923149fSDuy Nguyen 
46*8923149fSDuy Nguyen /* Always-on power area */
47*8923149fSDuy Nguyen #define R8A779H0_PD_ALWAYS_ON		64
48*8923149fSDuy Nguyen 
49*8923149fSDuy Nguyen #endif /* __DT_BINDINGS_POWER_RENESAS_R8A779H0_SYSC_H__ */
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