xref: /linux/include/dt-bindings/power/r8a7744-sysc.h (revision 3eb66e91a25497065c5322b1268cbc3953642227)
1*841e37a5SBiju Das /* SPDX-License-Identifier: GPL-2.0
2*841e37a5SBiju Das  *
3*841e37a5SBiju Das  * Copyright (C) 2018 Renesas Electronics Corp.
4*841e37a5SBiju Das  */
5*841e37a5SBiju Das #ifndef __DT_BINDINGS_POWER_R8A7744_SYSC_H__
6*841e37a5SBiju Das #define __DT_BINDINGS_POWER_R8A7744_SYSC_H__
7*841e37a5SBiju Das 
8*841e37a5SBiju Das /*
9*841e37a5SBiju Das  * These power domain indices match the numbers of the interrupt bits
10*841e37a5SBiju Das  * representing the power areas in the various Interrupt Registers
11*841e37a5SBiju Das  * (e.g. SYSCISR, Interrupt Status Register)
12*841e37a5SBiju Das  *
13*841e37a5SBiju Das  * Note that RZ/G1N is identical to RZ/G2M w.r.t. power domains.
14*841e37a5SBiju Das  */
15*841e37a5SBiju Das 
16*841e37a5SBiju Das #define R8A7744_PD_CA15_CPU0		 0
17*841e37a5SBiju Das #define R8A7744_PD_CA15_CPU1		 1
18*841e37a5SBiju Das #define R8A7744_PD_CA15_SCU		12
19*841e37a5SBiju Das #define R8A7744_PD_SGX			20
20*841e37a5SBiju Das 
21*841e37a5SBiju Das /* Always-on power area */
22*841e37a5SBiju Das #define R8A7744_PD_ALWAYS_ON		32
23*841e37a5SBiju Das 
24*841e37a5SBiju Das #endif /* __DT_BINDINGS_POWER_R8A7744_SYSC_H__ */
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