xref: /linux/include/dt-bindings/power/qcom-rpmpd.h (revision 4b132aacb0768ac1e652cf517097ea6f237214b9)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2018, The Linux Foundation. All rights reserved. */
3 
4 #ifndef _DT_BINDINGS_POWER_QCOM_RPMPD_H
5 #define _DT_BINDINGS_POWER_QCOM_RPMPD_H
6 
7 /* SA8775P Power Domain Indexes */
8 #define SA8775P_CX	0
9 #define SA8775P_CX_AO	1
10 #define SA8775P_DDR	2
11 #define SA8775P_EBI	3
12 #define SA8775P_GFX	4
13 #define SA8775P_LCX	5
14 #define SA8775P_LMX	6
15 #define SA8775P_MMCX	7
16 #define SA8775P_MMCX_AO	8
17 #define SA8775P_MSS	9
18 #define SA8775P_MX	10
19 #define SA8775P_MX_AO	11
20 #define SA8775P_MXC	12
21 #define SA8775P_MXC_AO	13
22 #define SA8775P_NSP0	14
23 #define SA8775P_NSP1	15
24 #define SA8775P_XO	16
25 
26 /* SDM670 Power Domain Indexes */
27 #define SDM670_MX	0
28 #define SDM670_MX_AO	1
29 #define SDM670_CX	2
30 #define SDM670_CX_AO	3
31 #define SDM670_LMX	4
32 #define SDM670_LCX	5
33 #define SDM670_GFX	6
34 #define SDM670_MSS	7
35 
36 /* SDM845 Power Domain Indexes */
37 #define SDM845_EBI	0
38 #define SDM845_MX	1
39 #define SDM845_MX_AO	2
40 #define SDM845_CX	3
41 #define SDM845_CX_AO	4
42 #define SDM845_LMX	5
43 #define SDM845_LCX	6
44 #define SDM845_GFX	7
45 #define SDM845_MSS	8
46 
47 /* SDX55 Power Domain Indexes */
48 #define SDX55_MSS	0
49 #define SDX55_MX	1
50 #define SDX55_CX	2
51 
52 /* SDX65 Power Domain Indexes */
53 #define SDX65_MSS	0
54 #define SDX65_MX	1
55 #define SDX65_MX_AO	2
56 #define SDX65_CX	3
57 #define SDX65_CX_AO	4
58 #define SDX65_MXC	5
59 
60 /* SM6350 Power Domain Indexes */
61 #define SM6350_CX	0
62 #define SM6350_GFX	1
63 #define SM6350_LCX	2
64 #define SM6350_LMX	3
65 #define SM6350_MSS	4
66 #define SM6350_MX	5
67 
68 /* SM6350 Power Domain Indexes */
69 #define SM6375_VDDCX		0
70 #define SM6375_VDDCX_AO	1
71 #define SM6375_VDDCX_VFL	2
72 #define SM6375_VDDMX		3
73 #define SM6375_VDDMX_AO	4
74 #define SM6375_VDDMX_VFL	5
75 #define SM6375_VDDGX		6
76 #define SM6375_VDDGX_AO	7
77 #define SM6375_VDD_LPI_CX	8
78 #define SM6375_VDD_LPI_MX	9
79 
80 /* SM8150 Power Domain Indexes */
81 #define SM8150_MSS	0
82 #define SM8150_EBI	1
83 #define SM8150_LMX	2
84 #define SM8150_LCX	3
85 #define SM8150_GFX	4
86 #define SM8150_MX	5
87 #define SM8150_MX_AO	6
88 #define SM8150_CX	7
89 #define SM8150_CX_AO	8
90 #define SM8150_MMCX	9
91 #define SM8150_MMCX_AO	10
92 
93 /* SA8155P is a special case, kept for backwards compatibility */
94 #define SA8155P_CX	SM8150_CX
95 #define SA8155P_CX_AO	SM8150_CX_AO
96 #define SA8155P_EBI	SM8150_EBI
97 #define SA8155P_GFX	SM8150_GFX
98 #define SA8155P_MSS	SM8150_MSS
99 #define SA8155P_MX	SM8150_MX
100 #define SA8155P_MX_AO	SM8150_MX_AO
101 
102 /* SM8250 Power Domain Indexes */
103 #define SM8250_CX	0
104 #define SM8250_CX_AO	1
105 #define SM8250_EBI	2
106 #define SM8250_GFX	3
107 #define SM8250_LCX	4
108 #define SM8250_LMX	5
109 #define SM8250_MMCX	6
110 #define SM8250_MMCX_AO	7
111 #define SM8250_MX	8
112 #define SM8250_MX_AO	9
113 
114 /* SM8350 Power Domain Indexes */
115 #define SM8350_CX	0
116 #define SM8350_CX_AO	1
117 #define SM8350_EBI	2
118 #define SM8350_GFX	3
119 #define SM8350_LCX	4
120 #define SM8350_LMX	5
121 #define SM8350_MMCX	6
122 #define SM8350_MMCX_AO	7
123 #define SM8350_MX	8
124 #define SM8350_MX_AO	9
125 #define SM8350_MXC	10
126 #define SM8350_MXC_AO	11
127 #define SM8350_MSS	12
128 
129 /* SM8450 Power Domain Indexes */
130 #define SM8450_CX	0
131 #define SM8450_CX_AO	1
132 #define SM8450_EBI	2
133 #define SM8450_GFX	3
134 #define SM8450_LCX	4
135 #define SM8450_LMX	5
136 #define SM8450_MMCX	6
137 #define SM8450_MMCX_AO	7
138 #define SM8450_MX	8
139 #define SM8450_MX_AO	9
140 #define SM8450_MXC	10
141 #define SM8450_MXC_AO	11
142 #define SM8450_MSS	12
143 
144 /* SM8550 Power Domain Indexes */
145 #define SM8550_CX	0
146 #define SM8550_CX_AO	1
147 #define SM8550_EBI	2
148 #define SM8550_GFX	3
149 #define SM8550_LCX	4
150 #define SM8550_LMX	5
151 #define SM8550_MMCX	6
152 #define SM8550_MMCX_AO	7
153 #define SM8550_MX	8
154 #define SM8550_MX_AO	9
155 #define SM8550_MXC	10
156 #define SM8550_MXC_AO	11
157 #define SM8550_MSS	12
158 #define SM8550_NSP	13
159 
160 /* QDU1000/QRU1000 Power Domain Indexes */
161 #define QDU1000_EBI	0
162 #define QDU1000_MSS	1
163 #define QDU1000_CX	2
164 #define QDU1000_MX	3
165 
166 /* SC7180 Power Domain Indexes */
167 #define SC7180_CX	0
168 #define SC7180_CX_AO	1
169 #define SC7180_GFX	2
170 #define SC7180_MX	3
171 #define SC7180_MX_AO	4
172 #define SC7180_LMX	5
173 #define SC7180_LCX	6
174 #define SC7180_MSS	7
175 
176 /* SC7280 Power Domain Indexes */
177 #define SC7280_CX	0
178 #define SC7280_CX_AO	1
179 #define SC7280_EBI	2
180 #define SC7280_GFX	3
181 #define SC7280_MX	4
182 #define SC7280_MX_AO	5
183 #define SC7280_LMX	6
184 #define SC7280_LCX	7
185 #define SC7280_MSS	8
186 
187 /* SC8180X Power Domain Indexes */
188 #define SC8180X_CX	0
189 #define SC8180X_CX_AO	1
190 #define SC8180X_EBI	2
191 #define SC8180X_GFX	3
192 #define SC8180X_LCX	4
193 #define SC8180X_LMX	5
194 #define SC8180X_MMCX	6
195 #define SC8180X_MMCX_AO	7
196 #define SC8180X_MSS	8
197 #define SC8180X_MX	9
198 #define SC8180X_MX_AO	10
199 
200 /* SC8280XP Power Domain Indexes */
201 #define SC8280XP_CX		0
202 #define SC8280XP_CX_AO		1
203 #define SC8280XP_DDR		2
204 #define SC8280XP_EBI		3
205 #define SC8280XP_GFX		4
206 #define SC8280XP_LCX		5
207 #define SC8280XP_LMX		6
208 #define SC8280XP_MMCX		7
209 #define SC8280XP_MMCX_AO	8
210 #define SC8280XP_MSS		9
211 #define SC8280XP_MX		10
212 #define SC8280XP_MXC		12
213 #define SC8280XP_MX_AO		11
214 #define SC8280XP_NSP		13
215 #define SC8280XP_QPHY		14
216 #define SC8280XP_XO		15
217 
218 /* SDM845 Power Domain performance levels */
219 #define RPMH_REGULATOR_LEVEL_RETENTION		16
220 #define RPMH_REGULATOR_LEVEL_MIN_SVS		48
221 #define RPMH_REGULATOR_LEVEL_LOW_SVS_D2		52
222 #define RPMH_REGULATOR_LEVEL_LOW_SVS_D1		56
223 #define RPMH_REGULATOR_LEVEL_LOW_SVS_D0		60
224 #define RPMH_REGULATOR_LEVEL_LOW_SVS		64
225 #define RPMH_REGULATOR_LEVEL_LOW_SVS_P1		72
226 #define RPMH_REGULATOR_LEVEL_LOW_SVS_L1		80
227 #define RPMH_REGULATOR_LEVEL_LOW_SVS_L2		96
228 #define RPMH_REGULATOR_LEVEL_SVS		128
229 #define RPMH_REGULATOR_LEVEL_SVS_L0		144
230 #define RPMH_REGULATOR_LEVEL_SVS_L1		192
231 #define RPMH_REGULATOR_LEVEL_SVS_L2		224
232 #define RPMH_REGULATOR_LEVEL_NOM		256
233 #define RPMH_REGULATOR_LEVEL_NOM_L0		288
234 #define RPMH_REGULATOR_LEVEL_NOM_L1		320
235 #define RPMH_REGULATOR_LEVEL_NOM_L2		336
236 #define RPMH_REGULATOR_LEVEL_TURBO		384
237 #define RPMH_REGULATOR_LEVEL_TURBO_L0		400
238 #define RPMH_REGULATOR_LEVEL_TURBO_L1		416
239 #define RPMH_REGULATOR_LEVEL_TURBO_L2		432
240 #define RPMH_REGULATOR_LEVEL_TURBO_L3		448
241 #define RPMH_REGULATOR_LEVEL_SUPER_TURBO 	464
242 #define RPMH_REGULATOR_LEVEL_SUPER_TURBO_NO_CPR	480
243 
244 /* MDM9607 Power Domains */
245 #define MDM9607_VDDCX		0
246 #define MDM9607_VDDCX_AO	1
247 #define MDM9607_VDDCX_VFL	2
248 #define MDM9607_VDDMX		3
249 #define MDM9607_VDDMX_AO	4
250 #define MDM9607_VDDMX_VFL	5
251 
252 /* MSM8226 Power Domain Indexes */
253 #define MSM8226_VDDCX		0
254 #define MSM8226_VDDCX_AO	1
255 #define MSM8226_VDDCX_VFC	2
256 
257 /* MSM8939 Power Domains */
258 #define MSM8939_VDDMDCX		0
259 #define MSM8939_VDDMDCX_AO	1
260 #define MSM8939_VDDMDCX_VFC	2
261 #define MSM8939_VDDCX		3
262 #define MSM8939_VDDCX_AO	4
263 #define MSM8939_VDDCX_VFC	5
264 #define MSM8939_VDDMX		6
265 #define MSM8939_VDDMX_AO	7
266 
267 /* MSM8916 Power Domain Indexes */
268 #define MSM8916_VDDCX		0
269 #define MSM8916_VDDCX_AO	1
270 #define MSM8916_VDDCX_VFC	2
271 #define MSM8916_VDDMX		3
272 #define MSM8916_VDDMX_AO	4
273 
274 /* MSM8909 Power Domain Indexes */
275 #define MSM8909_VDDCX		MSM8916_VDDCX
276 #define MSM8909_VDDCX_AO	MSM8916_VDDCX_AO
277 #define MSM8909_VDDCX_VFC	MSM8916_VDDCX_VFC
278 #define MSM8909_VDDMX		MSM8916_VDDMX
279 #define MSM8909_VDDMX_AO	MSM8916_VDDMX_AO
280 
281 /* MSM8917 Power Domain Indexes */
282 #define MSM8917_VDDCX		0
283 #define MSM8917_VDDCX_AO	1
284 #define MSM8917_VDDCX_VFL	2
285 #define MSM8917_VDDMX		3
286 #define MSM8917_VDDMX_AO	4
287 
288 /* MSM8937 Power Domain Indexes */
289 #define MSM8937_VDDCX		MSM8917_VDDCX
290 #define MSM8937_VDDCX_AO	MSM8917_VDDCX_AO
291 #define MSM8937_VDDCX_VFL	MSM8917_VDDCX_VFL
292 #define MSM8937_VDDMX		MSM8917_VDDMX
293 #define MSM8937_VDDMX_AO	MSM8917_VDDMX_AO
294 
295 /* QM215 Power Domain Indexes */
296 #define QM215_VDDCX		MSM8917_VDDCX
297 #define QM215_VDDCX_AO		MSM8917_VDDCX_AO
298 #define QM215_VDDCX_VFL		MSM8917_VDDCX_VFL
299 #define QM215_VDDMX		MSM8917_VDDMX
300 #define QM215_VDDMX_AO		MSM8917_VDDMX_AO
301 
302 /* MSM8953 Power Domain Indexes */
303 #define MSM8953_VDDMD		0
304 #define MSM8953_VDDMD_AO	1
305 #define MSM8953_VDDCX		2
306 #define MSM8953_VDDCX_AO	3
307 #define MSM8953_VDDCX_VFL	4
308 #define MSM8953_VDDMX		5
309 #define MSM8953_VDDMX_AO	6
310 
311 /* MSM8974 Power Domain Indexes */
312 #define MSM8974_VDDCX		0
313 #define MSM8974_VDDCX_AO	1
314 #define MSM8974_VDDCX_VFC	2
315 #define MSM8974_VDDGFX		3
316 #define MSM8974_VDDGFX_VFC	4
317 
318 /* MSM8976 Power Domain Indexes */
319 #define MSM8976_VDDCX		0
320 #define MSM8976_VDDCX_AO	1
321 #define MSM8976_VDDCX_VFL	2
322 #define MSM8976_VDDMX		3
323 #define MSM8976_VDDMX_AO	4
324 #define MSM8976_VDDMX_VFL	5
325 
326 /* MSM8994 Power Domain Indexes */
327 #define MSM8994_VDDCX		0
328 #define MSM8994_VDDCX_AO	1
329 #define MSM8994_VDDCX_VFC	2
330 #define MSM8994_VDDMX		3
331 #define MSM8994_VDDMX_AO	4
332 #define MSM8994_VDDGFX		5
333 #define MSM8994_VDDGFX_VFC	6
334 
335 /* MSM8996 Power Domain Indexes */
336 #define MSM8996_VDDCX		0
337 #define MSM8996_VDDCX_AO	1
338 #define MSM8996_VDDCX_VFC	2
339 #define MSM8996_VDDMX		3
340 #define MSM8996_VDDMX_AO	4
341 #define MSM8996_VDDSSCX		5
342 #define MSM8996_VDDSSCX_VFC	6
343 
344 /* MSM8998 Power Domain Indexes */
345 #define MSM8998_VDDCX		0
346 #define MSM8998_VDDCX_AO	1
347 #define MSM8998_VDDCX_VFL	2
348 #define MSM8998_VDDMX		3
349 #define MSM8998_VDDMX_AO	4
350 #define MSM8998_VDDMX_VFL	5
351 #define MSM8998_SSCCX		6
352 #define MSM8998_SSCCX_VFL	7
353 #define MSM8998_SSCMX		8
354 #define MSM8998_SSCMX_VFL	9
355 
356 /* QCS404 Power Domains */
357 #define QCS404_VDDMX		0
358 #define QCS404_VDDMX_AO		1
359 #define QCS404_VDDMX_VFL	2
360 #define QCS404_LPICX		3
361 #define QCS404_LPICX_VFL	4
362 #define QCS404_LPIMX		5
363 #define QCS404_LPIMX_VFL	6
364 
365 /* SDM660 Power Domains */
366 #define SDM660_VDDCX		0
367 #define SDM660_VDDCX_AO		1
368 #define SDM660_VDDCX_VFL	2
369 #define SDM660_VDDMX		3
370 #define SDM660_VDDMX_AO		4
371 #define SDM660_VDDMX_VFL	5
372 #define SDM660_SSCCX		6
373 #define SDM660_SSCCX_VFL	7
374 #define SDM660_SSCMX		8
375 #define SDM660_SSCMX_VFL	9
376 
377 /* SM6115 Power Domains */
378 #define SM6115_VDDCX		0
379 #define SM6115_VDDCX_AO		1
380 #define SM6115_VDDCX_VFL	2
381 #define SM6115_VDDMX		3
382 #define SM6115_VDDMX_AO		4
383 #define SM6115_VDDMX_VFL	5
384 #define SM6115_VDD_LPI_CX	6
385 #define SM6115_VDD_LPI_MX	7
386 
387 /* SM6125 Power Domains */
388 #define SM6125_VDDCX		0
389 #define SM6125_VDDCX_AO		1
390 #define SM6125_VDDCX_VFL	2
391 #define SM6125_VDDMX		3
392 #define SM6125_VDDMX_AO		4
393 #define SM6125_VDDMX_VFL	5
394 
395 /* QCM2290 Power Domains */
396 #define QCM2290_VDDCX		0
397 #define QCM2290_VDDCX_AO	1
398 #define QCM2290_VDDCX_VFL	2
399 #define QCM2290_VDDMX		3
400 #define QCM2290_VDDMX_AO	4
401 #define QCM2290_VDDMX_VFL	5
402 #define QCM2290_VDD_LPI_CX	6
403 #define QCM2290_VDD_LPI_MX	7
404 
405 /* RPM SMD Power Domain performance levels */
406 #define RPM_SMD_LEVEL_RETENTION       16
407 #define RPM_SMD_LEVEL_RETENTION_PLUS  32
408 #define RPM_SMD_LEVEL_MIN_SVS         48
409 #define RPM_SMD_LEVEL_LOW_SVS         64
410 #define RPM_SMD_LEVEL_SVS             128
411 #define RPM_SMD_LEVEL_SVS_PLUS        192
412 #define RPM_SMD_LEVEL_NOM             256
413 #define RPM_SMD_LEVEL_NOM_PLUS        320
414 #define RPM_SMD_LEVEL_TURBO           384
415 #define RPM_SMD_LEVEL_TURBO_NO_CPR    416
416 #define RPM_SMD_LEVEL_TURBO_HIGH      448
417 #define RPM_SMD_LEVEL_BINNING         512
418 
419 #endif
420