1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2 /* 3 * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. 4 */ 5 6 #ifndef _DT_BINDINGS_POWER_QCOM_RPMHPD_H 7 #define _DT_BINDINGS_POWER_QCOM_RPMHPD_H 8 9 /* Generic RPMH Power Domain Indexes */ 10 #define RPMHPD_CX 0 11 #define RPMHPD_CX_AO 1 12 #define RPMHPD_EBI 2 13 #define RPMHPD_GFX 3 14 #define RPMHPD_LCX 4 15 #define RPMHPD_LMX 5 16 #define RPMHPD_MMCX 6 17 #define RPMHPD_MMCX_AO 7 18 #define RPMHPD_MX 8 19 #define RPMHPD_MX_AO 9 20 #define RPMHPD_MXC 10 21 #define RPMHPD_MXC_AO 11 22 #define RPMHPD_MSS 12 23 #define RPMHPD_NSP 13 24 #define RPMHPD_NSP0 14 25 #define RPMHPD_NSP1 15 26 #define RPMHPD_QPHY 16 27 #define RPMHPD_DDR 17 28 #define RPMHPD_XO 18 29 #define RPMHPD_NSP2 19 30 #define RPMHPD_GMXC 20 31 32 /* RPMh Power Domain performance levels */ 33 #define RPMH_REGULATOR_LEVEL_RETENTION 16 34 #define RPMH_REGULATOR_LEVEL_MIN_SVS 48 35 #define RPMH_REGULATOR_LEVEL_LOW_SVS_D3 50 36 #define RPMH_REGULATOR_LEVEL_LOW_SVS_D2 52 37 #define RPMH_REGULATOR_LEVEL_LOW_SVS_D1 56 38 #define RPMH_REGULATOR_LEVEL_LOW_SVS_D0 60 39 #define RPMH_REGULATOR_LEVEL_LOW_SVS 64 40 #define RPMH_REGULATOR_LEVEL_LOW_SVS_P1 72 41 #define RPMH_REGULATOR_LEVEL_LOW_SVS_L1 80 42 #define RPMH_REGULATOR_LEVEL_LOW_SVS_L2 96 43 #define RPMH_REGULATOR_LEVEL_SVS 128 44 #define RPMH_REGULATOR_LEVEL_SVS_L0 144 45 #define RPMH_REGULATOR_LEVEL_SVS_L1 192 46 #define RPMH_REGULATOR_LEVEL_SVS_L2 224 47 #define RPMH_REGULATOR_LEVEL_NOM 256 48 #define RPMH_REGULATOR_LEVEL_NOM_L0 288 49 #define RPMH_REGULATOR_LEVEL_NOM_L1 320 50 #define RPMH_REGULATOR_LEVEL_NOM_L2 336 51 #define RPMH_REGULATOR_LEVEL_TURBO 384 52 #define RPMH_REGULATOR_LEVEL_TURBO_L0 400 53 #define RPMH_REGULATOR_LEVEL_TURBO_L1 416 54 #define RPMH_REGULATOR_LEVEL_TURBO_L2 432 55 #define RPMH_REGULATOR_LEVEL_TURBO_L3 448 56 #define RPMH_REGULATOR_LEVEL_TURBO_L4 452 57 #define RPMH_REGULATOR_LEVEL_TURBO_L5 456 58 #define RPMH_REGULATOR_LEVEL_SUPER_TURBO 464 59 #define RPMH_REGULATOR_LEVEL_SUPER_TURBO_NO_CPR 480 60 61 /* 62 * Platform-specific power domain bindings. Don't add new entries here, use 63 * RPMHPD_* above. 64 */ 65 66 /* SA8775P Power Domain Indexes */ 67 #define SA8775P_CX 0 68 #define SA8775P_CX_AO 1 69 #define SA8775P_DDR 2 70 #define SA8775P_EBI 3 71 #define SA8775P_GFX 4 72 #define SA8775P_LCX 5 73 #define SA8775P_LMX 6 74 #define SA8775P_MMCX 7 75 #define SA8775P_MMCX_AO 8 76 #define SA8775P_MSS 9 77 #define SA8775P_MX 10 78 #define SA8775P_MX_AO 11 79 #define SA8775P_MXC 12 80 #define SA8775P_MXC_AO 13 81 #define SA8775P_NSP0 14 82 #define SA8775P_NSP1 15 83 #define SA8775P_XO 16 84 85 /* SDM670 Power Domain Indexes */ 86 #define SDM670_MX 0 87 #define SDM670_MX_AO 1 88 #define SDM670_CX 2 89 #define SDM670_CX_AO 3 90 #define SDM670_LMX 4 91 #define SDM670_LCX 5 92 #define SDM670_GFX 6 93 #define SDM670_MSS 7 94 95 /* SDM845 Power Domain Indexes */ 96 #define SDM845_EBI 0 97 #define SDM845_MX 1 98 #define SDM845_MX_AO 2 99 #define SDM845_CX 3 100 #define SDM845_CX_AO 4 101 #define SDM845_LMX 5 102 #define SDM845_LCX 6 103 #define SDM845_GFX 7 104 #define SDM845_MSS 8 105 106 /* SDX55 Power Domain Indexes */ 107 #define SDX55_MSS 0 108 #define SDX55_MX 1 109 #define SDX55_CX 2 110 111 /* SDX65 Power Domain Indexes */ 112 #define SDX65_MSS 0 113 #define SDX65_MX 1 114 #define SDX65_MX_AO 2 115 #define SDX65_CX 3 116 #define SDX65_CX_AO 4 117 #define SDX65_MXC 5 118 119 /* SM6350 Power Domain Indexes */ 120 #define SM6350_CX 0 121 #define SM6350_GFX 1 122 #define SM6350_LCX 2 123 #define SM6350_LMX 3 124 #define SM6350_MSS 4 125 #define SM6350_MX 5 126 127 /* SM8150 Power Domain Indexes */ 128 #define SM8150_MSS 0 129 #define SM8150_EBI 1 130 #define SM8150_LMX 2 131 #define SM8150_LCX 3 132 #define SM8150_GFX 4 133 #define SM8150_MX 5 134 #define SM8150_MX_AO 6 135 #define SM8150_CX 7 136 #define SM8150_CX_AO 8 137 #define SM8150_MMCX 9 138 #define SM8150_MMCX_AO 10 139 140 /* SA8155P is a special case, kept for backwards compatibility */ 141 #define SA8155P_CX SM8150_CX 142 #define SA8155P_CX_AO SM8150_CX_AO 143 #define SA8155P_EBI SM8150_EBI 144 #define SA8155P_GFX SM8150_GFX 145 #define SA8155P_MSS SM8150_MSS 146 #define SA8155P_MX SM8150_MX 147 #define SA8155P_MX_AO SM8150_MX_AO 148 149 /* SM8250 Power Domain Indexes */ 150 #define SM8250_CX 0 151 #define SM8250_CX_AO 1 152 #define SM8250_EBI 2 153 #define SM8250_GFX 3 154 #define SM8250_LCX 4 155 #define SM8250_LMX 5 156 #define SM8250_MMCX 6 157 #define SM8250_MMCX_AO 7 158 #define SM8250_MX 8 159 #define SM8250_MX_AO 9 160 161 /* SM8350 Power Domain Indexes */ 162 #define SM8350_CX 0 163 #define SM8350_CX_AO 1 164 #define SM8350_EBI 2 165 #define SM8350_GFX 3 166 #define SM8350_LCX 4 167 #define SM8350_LMX 5 168 #define SM8350_MMCX 6 169 #define SM8350_MMCX_AO 7 170 #define SM8350_MX 8 171 #define SM8350_MX_AO 9 172 #define SM8350_MXC 10 173 #define SM8350_MXC_AO 11 174 #define SM8350_MSS 12 175 176 /* SM8450 Power Domain Indexes */ 177 #define SM8450_CX 0 178 #define SM8450_CX_AO 1 179 #define SM8450_EBI 2 180 #define SM8450_GFX 3 181 #define SM8450_LCX 4 182 #define SM8450_LMX 5 183 #define SM8450_MMCX 6 184 #define SM8450_MMCX_AO 7 185 #define SM8450_MX 8 186 #define SM8450_MX_AO 9 187 #define SM8450_MXC 10 188 #define SM8450_MXC_AO 11 189 #define SM8450_MSS 12 190 191 /* SM8550 Power Domain Indexes */ 192 #define SM8550_CX 0 193 #define SM8550_CX_AO 1 194 #define SM8550_EBI 2 195 #define SM8550_GFX 3 196 #define SM8550_LCX 4 197 #define SM8550_LMX 5 198 #define SM8550_MMCX 6 199 #define SM8550_MMCX_AO 7 200 #define SM8550_MX 8 201 #define SM8550_MX_AO 9 202 #define SM8550_MXC 10 203 #define SM8550_MXC_AO 11 204 #define SM8550_MSS 12 205 #define SM8550_NSP 13 206 207 /* QDU1000/QRU1000 Power Domain Indexes */ 208 #define QDU1000_EBI 0 209 #define QDU1000_MSS 1 210 #define QDU1000_CX 2 211 #define QDU1000_MX 3 212 213 /* SC7180 Power Domain Indexes */ 214 #define SC7180_CX 0 215 #define SC7180_CX_AO 1 216 #define SC7180_GFX 2 217 #define SC7180_MX 3 218 #define SC7180_MX_AO 4 219 #define SC7180_LMX 5 220 #define SC7180_LCX 6 221 #define SC7180_MSS 7 222 223 /* SC7280 Power Domain Indexes */ 224 #define SC7280_CX 0 225 #define SC7280_CX_AO 1 226 #define SC7280_EBI 2 227 #define SC7280_GFX 3 228 #define SC7280_MX 4 229 #define SC7280_MX_AO 5 230 #define SC7280_LMX 6 231 #define SC7280_LCX 7 232 #define SC7280_MSS 8 233 234 /* SC8180X Power Domain Indexes */ 235 #define SC8180X_CX 0 236 #define SC8180X_CX_AO 1 237 #define SC8180X_EBI 2 238 #define SC8180X_GFX 3 239 #define SC8180X_LCX 4 240 #define SC8180X_LMX 5 241 #define SC8180X_MMCX 6 242 #define SC8180X_MMCX_AO 7 243 #define SC8180X_MSS 8 244 #define SC8180X_MX 9 245 #define SC8180X_MX_AO 10 246 247 /* SC8280XP Power Domain Indexes */ 248 #define SC8280XP_CX 0 249 #define SC8280XP_CX_AO 1 250 #define SC8280XP_DDR 2 251 #define SC8280XP_EBI 3 252 #define SC8280XP_GFX 4 253 #define SC8280XP_LCX 5 254 #define SC8280XP_LMX 6 255 #define SC8280XP_MMCX 7 256 #define SC8280XP_MMCX_AO 8 257 #define SC8280XP_MSS 9 258 #define SC8280XP_MX 10 259 #define SC8280XP_MXC 12 260 #define SC8280XP_MX_AO 11 261 #define SC8280XP_NSP 13 262 #define SC8280XP_QPHY 14 263 #define SC8280XP_XO 15 264 265 #endif 266