1*25937d39SThierry Reding /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2*25937d39SThierry Reding /* Copyright (c) 2022-2024, NVIDIA CORPORATION. All rights reserved. */ 3*25937d39SThierry Reding 4*25937d39SThierry Reding #ifndef DT_BINDINGS_POWER_NVIDIA_TEGRA264_BPMP_H 5*25937d39SThierry Reding #define DT_BINDINGS_POWER_NVIDIA_TEGRA264_BPMP_H 6*25937d39SThierry Reding 7*25937d39SThierry Reding #define TEGRA264_POWER_DOMAIN_DISP 1 8*25937d39SThierry Reding #define TEGRA264_POWER_DOMAIN_AUD 2 9*25937d39SThierry Reding /* reserved 3:9 */ 10*25937d39SThierry Reding #define TEGRA264_POWER_DOMAIN_XUSB_SS 10 11*25937d39SThierry Reding #define TEGRA264_POWER_DOMAIN_XUSB_DEV 11 12*25937d39SThierry Reding #define TEGRA264_POWER_DOMAIN_XUSB_HOST 12 13*25937d39SThierry Reding #define TEGRA264_POWER_DOMAIN_MGBE0 13 14*25937d39SThierry Reding #define TEGRA264_POWER_DOMAIN_MGBE1 14 15*25937d39SThierry Reding #define TEGRA264_POWER_DOMAIN_MGBE2 15 16*25937d39SThierry Reding #define TEGRA264_POWER_DOMAIN_MGBE3 16 17*25937d39SThierry Reding #define TEGRA264_POWER_DOMAIN_VI 17 18*25937d39SThierry Reding #define TEGRA264_POWER_DOMAIN_VIC 18 19*25937d39SThierry Reding #define TEGRA264_POWER_DOMAIN_ISP0 19 20*25937d39SThierry Reding #define TEGRA264_POWER_DOMAIN_ISP1 20 21*25937d39SThierry Reding #define TEGRA264_POWER_DOMAIN_PVA0 21 22*25937d39SThierry Reding #define TEGRA264_POWER_DOMAIN_GPU 22 23*25937d39SThierry Reding 24*25937d39SThierry Reding #endif /* DT_BINDINGS_POWER_NVIDIA_TEGRA264_BPMP_H */ 25