1*d6e0a660SJianlong Huang /* SPDX-License-Identifier: GPL-2.0 OR MIT */ 2*d6e0a660SJianlong Huang /* 3*d6e0a660SJianlong Huang * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk> 4*d6e0a660SJianlong Huang * Copyright (C) 2022 StarFive Technology Co., Ltd. 5*d6e0a660SJianlong Huang */ 6*d6e0a660SJianlong Huang 7*d6e0a660SJianlong Huang #ifndef __DT_BINDINGS_PINCTRL_STARFIVE_JH7110_H__ 8*d6e0a660SJianlong Huang #define __DT_BINDINGS_PINCTRL_STARFIVE_JH7110_H__ 9*d6e0a660SJianlong Huang 10*d6e0a660SJianlong Huang /* sys_iomux pins */ 11*d6e0a660SJianlong Huang #define PAD_GPIO0 0 12*d6e0a660SJianlong Huang #define PAD_GPIO1 1 13*d6e0a660SJianlong Huang #define PAD_GPIO2 2 14*d6e0a660SJianlong Huang #define PAD_GPIO3 3 15*d6e0a660SJianlong Huang #define PAD_GPIO4 4 16*d6e0a660SJianlong Huang #define PAD_GPIO5 5 17*d6e0a660SJianlong Huang #define PAD_GPIO6 6 18*d6e0a660SJianlong Huang #define PAD_GPIO7 7 19*d6e0a660SJianlong Huang #define PAD_GPIO8 8 20*d6e0a660SJianlong Huang #define PAD_GPIO9 9 21*d6e0a660SJianlong Huang #define PAD_GPIO10 10 22*d6e0a660SJianlong Huang #define PAD_GPIO11 11 23*d6e0a660SJianlong Huang #define PAD_GPIO12 12 24*d6e0a660SJianlong Huang #define PAD_GPIO13 13 25*d6e0a660SJianlong Huang #define PAD_GPIO14 14 26*d6e0a660SJianlong Huang #define PAD_GPIO15 15 27*d6e0a660SJianlong Huang #define PAD_GPIO16 16 28*d6e0a660SJianlong Huang #define PAD_GPIO17 17 29*d6e0a660SJianlong Huang #define PAD_GPIO18 18 30*d6e0a660SJianlong Huang #define PAD_GPIO19 19 31*d6e0a660SJianlong Huang #define PAD_GPIO20 20 32*d6e0a660SJianlong Huang #define PAD_GPIO21 21 33*d6e0a660SJianlong Huang #define PAD_GPIO22 22 34*d6e0a660SJianlong Huang #define PAD_GPIO23 23 35*d6e0a660SJianlong Huang #define PAD_GPIO24 24 36*d6e0a660SJianlong Huang #define PAD_GPIO25 25 37*d6e0a660SJianlong Huang #define PAD_GPIO26 26 38*d6e0a660SJianlong Huang #define PAD_GPIO27 27 39*d6e0a660SJianlong Huang #define PAD_GPIO28 28 40*d6e0a660SJianlong Huang #define PAD_GPIO29 29 41*d6e0a660SJianlong Huang #define PAD_GPIO30 30 42*d6e0a660SJianlong Huang #define PAD_GPIO31 31 43*d6e0a660SJianlong Huang #define PAD_GPIO32 32 44*d6e0a660SJianlong Huang #define PAD_GPIO33 33 45*d6e0a660SJianlong Huang #define PAD_GPIO34 34 46*d6e0a660SJianlong Huang #define PAD_GPIO35 35 47*d6e0a660SJianlong Huang #define PAD_GPIO36 36 48*d6e0a660SJianlong Huang #define PAD_GPIO37 37 49*d6e0a660SJianlong Huang #define PAD_GPIO38 38 50*d6e0a660SJianlong Huang #define PAD_GPIO39 39 51*d6e0a660SJianlong Huang #define PAD_GPIO40 40 52*d6e0a660SJianlong Huang #define PAD_GPIO41 41 53*d6e0a660SJianlong Huang #define PAD_GPIO42 42 54*d6e0a660SJianlong Huang #define PAD_GPIO43 43 55*d6e0a660SJianlong Huang #define PAD_GPIO44 44 56*d6e0a660SJianlong Huang #define PAD_GPIO45 45 57*d6e0a660SJianlong Huang #define PAD_GPIO46 46 58*d6e0a660SJianlong Huang #define PAD_GPIO47 47 59*d6e0a660SJianlong Huang #define PAD_GPIO48 48 60*d6e0a660SJianlong Huang #define PAD_GPIO49 49 61*d6e0a660SJianlong Huang #define PAD_GPIO50 50 62*d6e0a660SJianlong Huang #define PAD_GPIO51 51 63*d6e0a660SJianlong Huang #define PAD_GPIO52 52 64*d6e0a660SJianlong Huang #define PAD_GPIO53 53 65*d6e0a660SJianlong Huang #define PAD_GPIO54 54 66*d6e0a660SJianlong Huang #define PAD_GPIO55 55 67*d6e0a660SJianlong Huang #define PAD_GPIO56 56 68*d6e0a660SJianlong Huang #define PAD_GPIO57 57 69*d6e0a660SJianlong Huang #define PAD_GPIO58 58 70*d6e0a660SJianlong Huang #define PAD_GPIO59 59 71*d6e0a660SJianlong Huang #define PAD_GPIO60 60 72*d6e0a660SJianlong Huang #define PAD_GPIO61 61 73*d6e0a660SJianlong Huang #define PAD_GPIO62 62 74*d6e0a660SJianlong Huang #define PAD_GPIO63 63 75*d6e0a660SJianlong Huang #define PAD_SD0_CLK 64 76*d6e0a660SJianlong Huang #define PAD_SD0_CMD 65 77*d6e0a660SJianlong Huang #define PAD_SD0_DATA0 66 78*d6e0a660SJianlong Huang #define PAD_SD0_DATA1 67 79*d6e0a660SJianlong Huang #define PAD_SD0_DATA2 68 80*d6e0a660SJianlong Huang #define PAD_SD0_DATA3 69 81*d6e0a660SJianlong Huang #define PAD_SD0_DATA4 70 82*d6e0a660SJianlong Huang #define PAD_SD0_DATA5 71 83*d6e0a660SJianlong Huang #define PAD_SD0_DATA6 72 84*d6e0a660SJianlong Huang #define PAD_SD0_DATA7 73 85*d6e0a660SJianlong Huang #define PAD_SD0_STRB 74 86*d6e0a660SJianlong Huang #define PAD_GMAC1_MDC 75 87*d6e0a660SJianlong Huang #define PAD_GMAC1_MDIO 76 88*d6e0a660SJianlong Huang #define PAD_GMAC1_RXD0 77 89*d6e0a660SJianlong Huang #define PAD_GMAC1_RXD1 78 90*d6e0a660SJianlong Huang #define PAD_GMAC1_RXD2 79 91*d6e0a660SJianlong Huang #define PAD_GMAC1_RXD3 80 92*d6e0a660SJianlong Huang #define PAD_GMAC1_RXDV 81 93*d6e0a660SJianlong Huang #define PAD_GMAC1_RXC 82 94*d6e0a660SJianlong Huang #define PAD_GMAC1_TXD0 83 95*d6e0a660SJianlong Huang #define PAD_GMAC1_TXD1 84 96*d6e0a660SJianlong Huang #define PAD_GMAC1_TXD2 85 97*d6e0a660SJianlong Huang #define PAD_GMAC1_TXD3 86 98*d6e0a660SJianlong Huang #define PAD_GMAC1_TXEN 87 99*d6e0a660SJianlong Huang #define PAD_GMAC1_TXC 88 100*d6e0a660SJianlong Huang #define PAD_QSPI_SCLK 89 101*d6e0a660SJianlong Huang #define PAD_QSPI_CS0 90 102*d6e0a660SJianlong Huang #define PAD_QSPI_DATA0 91 103*d6e0a660SJianlong Huang #define PAD_QSPI_DATA1 92 104*d6e0a660SJianlong Huang #define PAD_QSPI_DATA2 93 105*d6e0a660SJianlong Huang #define PAD_QSPI_DATA3 94 106*d6e0a660SJianlong Huang 107*d6e0a660SJianlong Huang #define GPOUT_LOW 0 108*d6e0a660SJianlong Huang #define GPOUT_HIGH 1 109*d6e0a660SJianlong Huang 110*d6e0a660SJianlong Huang #define GPOEN_ENABLE 0 111*d6e0a660SJianlong Huang #define GPOEN_DISABLE 1 112*d6e0a660SJianlong Huang 113*d6e0a660SJianlong Huang #define GPI_NONE 255 114*d6e0a660SJianlong Huang 115*d6e0a660SJianlong Huang #endif 116