1*7030377aSXianwei Zhao /* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */ 2*7030377aSXianwei Zhao /* 3*7030377aSXianwei Zhao * Copyright (c) 2024 Amlogic, Inc. All rights reserved. 4*7030377aSXianwei Zhao * Author: Xianwei Zhao <xianwei.zhao@amlogic.com> 5*7030377aSXianwei Zhao */ 6*7030377aSXianwei Zhao 7*7030377aSXianwei Zhao #ifndef _DT_BINDINGS_AMLOGIC_PINCTRL_H 8*7030377aSXianwei Zhao #define _DT_BINDINGS_AMLOGIC_PINCTRL_H 9*7030377aSXianwei Zhao /* Normal PIN bank */ 10*7030377aSXianwei Zhao #define AMLOGIC_GPIO_A 0 11*7030377aSXianwei Zhao #define AMLOGIC_GPIO_B 1 12*7030377aSXianwei Zhao #define AMLOGIC_GPIO_C 2 13*7030377aSXianwei Zhao #define AMLOGIC_GPIO_D 3 14*7030377aSXianwei Zhao #define AMLOGIC_GPIO_E 4 15*7030377aSXianwei Zhao #define AMLOGIC_GPIO_F 5 16*7030377aSXianwei Zhao #define AMLOGIC_GPIO_G 6 17*7030377aSXianwei Zhao #define AMLOGIC_GPIO_H 7 18*7030377aSXianwei Zhao #define AMLOGIC_GPIO_I 8 19*7030377aSXianwei Zhao #define AMLOGIC_GPIO_J 9 20*7030377aSXianwei Zhao #define AMLOGIC_GPIO_K 10 21*7030377aSXianwei Zhao #define AMLOGIC_GPIO_L 11 22*7030377aSXianwei Zhao #define AMLOGIC_GPIO_M 12 23*7030377aSXianwei Zhao #define AMLOGIC_GPIO_N 13 24*7030377aSXianwei Zhao #define AMLOGIC_GPIO_O 14 25*7030377aSXianwei Zhao #define AMLOGIC_GPIO_P 15 26*7030377aSXianwei Zhao #define AMLOGIC_GPIO_Q 16 27*7030377aSXianwei Zhao #define AMLOGIC_GPIO_R 17 28*7030377aSXianwei Zhao #define AMLOGIC_GPIO_S 18 29*7030377aSXianwei Zhao #define AMLOGIC_GPIO_T 19 30*7030377aSXianwei Zhao #define AMLOGIC_GPIO_U 20 31*7030377aSXianwei Zhao #define AMLOGIC_GPIO_V 21 32*7030377aSXianwei Zhao #define AMLOGIC_GPIO_W 22 33*7030377aSXianwei Zhao #define AMLOGIC_GPIO_X 23 34*7030377aSXianwei Zhao #define AMLOGIC_GPIO_Y 24 35*7030377aSXianwei Zhao #define AMLOGIC_GPIO_Z 25 36*7030377aSXianwei Zhao 37*7030377aSXianwei Zhao /* Special PIN bank */ 38*7030377aSXianwei Zhao #define AMLOGIC_GPIO_DV 26 39*7030377aSXianwei Zhao #define AMLOGIC_GPIO_AO 27 40*7030377aSXianwei Zhao #define AMLOGIC_GPIO_CC 28 41*7030377aSXianwei Zhao #define AMLOGIC_GPIO_TEST_N 29 42*7030377aSXianwei Zhao #define AMLOGIC_GPIO_ANALOG 30 43*7030377aSXianwei Zhao 44*7030377aSXianwei Zhao #define AML_PINMUX(bank, offset, mode) (((((bank) << 8) + (offset)) << 8) | (mode)) 45*7030377aSXianwei Zhao 46*7030377aSXianwei Zhao #endif /* _DT_BINDINGS_AMLOGIC_PINCTRL_H */ 47