xref: /linux/include/dt-bindings/net/renesas,r9a09g077-pcs-miic.h (revision ec2e0fb07d789976c601bec19ecced7a501c3705)
1*8c01cc23SLad Prabhakar /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2*8c01cc23SLad Prabhakar /*
3*8c01cc23SLad Prabhakar  * Copyright (C) 2025 Renesas Electronics Corporation.
4*8c01cc23SLad Prabhakar  */
5*8c01cc23SLad Prabhakar 
6*8c01cc23SLad Prabhakar #ifndef _DT_BINDINGS_RENASAS_R9A09G077_PCS_MIIC_H
7*8c01cc23SLad Prabhakar #define _DT_BINDINGS_RENASAS_R9A09G077_PCS_MIIC_H
8*8c01cc23SLad Prabhakar 
9*8c01cc23SLad Prabhakar /*
10*8c01cc23SLad Prabhakar  * Media Interface Connection Matrix
11*8c01cc23SLad Prabhakar  * ===========================================================
12*8c01cc23SLad Prabhakar  *
13*8c01cc23SLad Prabhakar  * Selects the function of the Media interface of the MAC to be used
14*8c01cc23SLad Prabhakar  *
15*8c01cc23SLad Prabhakar  * SW_MODE[2:0] | Port 0      | Port 1      | Port 2      | Port 3
16*8c01cc23SLad Prabhakar  * -------------|-------------|-------------|-------------|-------------
17*8c01cc23SLad Prabhakar  * 000b         | ETHSW Port0 | ETHSW Port1 | ETHSW Port2 | GMAC1
18*8c01cc23SLad Prabhakar  * 001b         | ESC Port0   | ESC Port1   | GMAC2       | GMAC1
19*8c01cc23SLad Prabhakar  * 010b         | ESC Port0   | ESC Port1   | ETHSW Port2 | GMAC1
20*8c01cc23SLad Prabhakar  * 011b         | ESC Port0   | ESC Port1   | ESC Port2   | GMAC1
21*8c01cc23SLad Prabhakar  * 100b         | ETHSW Port0 | ESC Port1   | ESC Port2   | GMAC1
22*8c01cc23SLad Prabhakar  * 101b         | ETHSW Port0 | ESC Port1   | ETHSW Port2 | GMAC1
23*8c01cc23SLad Prabhakar  * 110b         | ETHSW Port0 | ETHSW Port1 | GMAC2       | GMAC1
24*8c01cc23SLad Prabhakar  * 111b         | GMAC0       | GMAC1       | GMAC2       | -
25*8c01cc23SLad Prabhakar  */
26*8c01cc23SLad Prabhakar #define ETHSS_GMAC0_PORT		0
27*8c01cc23SLad Prabhakar #define ETHSS_GMAC1_PORT		1
28*8c01cc23SLad Prabhakar #define ETHSS_GMAC2_PORT		2
29*8c01cc23SLad Prabhakar #define ETHSS_ESC_PORT0			3
30*8c01cc23SLad Prabhakar #define ETHSS_ESC_PORT1			4
31*8c01cc23SLad Prabhakar #define ETHSS_ESC_PORT2			5
32*8c01cc23SLad Prabhakar #define ETHSS_ETHSW_PORT0		6
33*8c01cc23SLad Prabhakar #define ETHSS_ETHSW_PORT1		7
34*8c01cc23SLad Prabhakar #define ETHSS_ETHSW_PORT2		8
35*8c01cc23SLad Prabhakar 
36*8c01cc23SLad Prabhakar #endif
37