1*c65176fdSRoger Quadros /* SPDX-License-Identifier: GPL-2.0 */ 2*c65176fdSRoger Quadros /* 3*c65176fdSRoger Quadros * This header provides constants for SERDES MUX for TI SoCs 4*c65176fdSRoger Quadros */ 5*c65176fdSRoger Quadros 6*c65176fdSRoger Quadros #ifndef _DT_BINDINGS_MUX_TI_SERDES 7*c65176fdSRoger Quadros #define _DT_BINDINGS_MUX_TI_SERDES 8*c65176fdSRoger Quadros 9*c65176fdSRoger Quadros /* J721E */ 10*c65176fdSRoger Quadros 11*c65176fdSRoger Quadros #define J721E_SERDES0_LANE0_QSGMII_LANE1 0x0 12*c65176fdSRoger Quadros #define J721E_SERDES0_LANE0_PCIE0_LANE0 0x1 13*c65176fdSRoger Quadros #define J721E_SERDES0_LANE0_USB3_0_SWAP 0x2 14*c65176fdSRoger Quadros #define J721E_SERDES0_LANE0_IP4_UNUSED 0x3 15*c65176fdSRoger Quadros 16*c65176fdSRoger Quadros #define J721E_SERDES0_LANE1_QSGMII_LANE2 0x0 17*c65176fdSRoger Quadros #define J721E_SERDES0_LANE1_PCIE0_LANE1 0x1 18*c65176fdSRoger Quadros #define J721E_SERDES0_LANE1_USB3_0 0x2 19*c65176fdSRoger Quadros #define J721E_SERDES0_LANE1_IP4_UNUSED 0x3 20*c65176fdSRoger Quadros 21*c65176fdSRoger Quadros #define J721E_SERDES1_LANE0_QSGMII_LANE3 0x0 22*c65176fdSRoger Quadros #define J721E_SERDES1_LANE0_PCIE1_LANE0 0x1 23*c65176fdSRoger Quadros #define J721E_SERDES1_LANE0_USB3_1_SWAP 0x2 24*c65176fdSRoger Quadros #define J721E_SERDES1_LANE0_SGMII_LANE0 0x3 25*c65176fdSRoger Quadros 26*c65176fdSRoger Quadros #define J721E_SERDES1_LANE1_QSGMII_LANE4 0x0 27*c65176fdSRoger Quadros #define J721E_SERDES1_LANE1_PCIE1_LANE1 0x1 28*c65176fdSRoger Quadros #define J721E_SERDES1_LANE1_USB3_1 0x2 29*c65176fdSRoger Quadros #define J721E_SERDES1_LANE1_SGMII_LANE1 0x3 30*c65176fdSRoger Quadros 31*c65176fdSRoger Quadros #define J721E_SERDES2_LANE0_IP1_UNUSED 0x0 32*c65176fdSRoger Quadros #define J721E_SERDES2_LANE0_PCIE2_LANE0 0x1 33*c65176fdSRoger Quadros #define J721E_SERDES2_LANE0_USB3_1_SWAP 0x2 34*c65176fdSRoger Quadros #define J721E_SERDES2_LANE0_SGMII_LANE0 0x3 35*c65176fdSRoger Quadros 36*c65176fdSRoger Quadros #define J721E_SERDES2_LANE1_IP1_UNUSED 0x0 37*c65176fdSRoger Quadros #define J721E_SERDES2_LANE1_PCIE2_LANE1 0x1 38*c65176fdSRoger Quadros #define J721E_SERDES2_LANE1_USB3_1 0x2 39*c65176fdSRoger Quadros #define J721E_SERDES2_LANE1_SGMII_LANE1 0x3 40*c65176fdSRoger Quadros 41*c65176fdSRoger Quadros #define J721E_SERDES3_LANE0_IP1_UNUSED 0x0 42*c65176fdSRoger Quadros #define J721E_SERDES3_LANE0_PCIE3_LANE0 0x1 43*c65176fdSRoger Quadros #define J721E_SERDES3_LANE0_USB3_0_SWAP 0x2 44*c65176fdSRoger Quadros #define J721E_SERDES3_LANE0_IP4_UNUSED 0x3 45*c65176fdSRoger Quadros 46*c65176fdSRoger Quadros #define J721E_SERDES3_LANE1_IP1_UNUSED 0x0 47*c65176fdSRoger Quadros #define J721E_SERDES3_LANE1_PCIE3_LANE1 0x1 48*c65176fdSRoger Quadros #define J721E_SERDES3_LANE1_USB3_0 0x2 49*c65176fdSRoger Quadros #define J721E_SERDES3_LANE1_IP4_UNUSED 0x3 50*c65176fdSRoger Quadros 51*c65176fdSRoger Quadros #define J721E_SERDES4_LANE0_EDP_LANE0 0x0 52*c65176fdSRoger Quadros #define J721E_SERDES4_LANE0_IP2_UNUSED 0x1 53*c65176fdSRoger Quadros #define J721E_SERDES4_LANE0_QSGMII_LANE5 0x2 54*c65176fdSRoger Quadros #define J721E_SERDES4_LANE0_IP4_UNUSED 0x3 55*c65176fdSRoger Quadros 56*c65176fdSRoger Quadros #define J721E_SERDES4_LANE1_EDP_LANE1 0x0 57*c65176fdSRoger Quadros #define J721E_SERDES4_LANE1_IP2_UNUSED 0x1 58*c65176fdSRoger Quadros #define J721E_SERDES4_LANE1_QSGMII_LANE6 0x2 59*c65176fdSRoger Quadros #define J721E_SERDES4_LANE1_IP4_UNUSED 0x3 60*c65176fdSRoger Quadros 61*c65176fdSRoger Quadros #define J721E_SERDES4_LANE2_EDP_LANE2 0x0 62*c65176fdSRoger Quadros #define J721E_SERDES4_LANE2_IP2_UNUSED 0x1 63*c65176fdSRoger Quadros #define J721E_SERDES4_LANE2_QSGMII_LANE7 0x2 64*c65176fdSRoger Quadros #define J721E_SERDES4_LANE2_IP4_UNUSED 0x3 65*c65176fdSRoger Quadros 66*c65176fdSRoger Quadros #define J721E_SERDES4_LANE3_EDP_LANE3 0x0 67*c65176fdSRoger Quadros #define J721E_SERDES4_LANE3_IP2_UNUSED 0x1 68*c65176fdSRoger Quadros #define J721E_SERDES4_LANE3_QSGMII_LANE8 0x2 69*c65176fdSRoger Quadros #define J721E_SERDES4_LANE3_IP4_UNUSED 0x3 70*c65176fdSRoger Quadros 71*c65176fdSRoger Quadros #endif /* _DT_BINDINGS_MUX_TI_SERDES */ 72