xref: /linux/include/dt-bindings/interrupt-controller/amlogic,meson-g12a-gpio-intc.h (revision a1c613ae4c322ddd58d5a8539dbfba2a0380a8c0)
1*0e8ec022SHuqiang Qin /* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
2*0e8ec022SHuqiang Qin /*
3*0e8ec022SHuqiang Qin  * Copyright (c) 2023 Amlogic, Inc. All rights reserved.
4*0e8ec022SHuqiang Qin  * Author: Huqiang Qin <huqiang.qin@amlogic.com>
5*0e8ec022SHuqiang Qin  */
6*0e8ec022SHuqiang Qin 
7*0e8ec022SHuqiang Qin #ifndef _DT_BINDINGS_IRQ_MESON_G12A_GPIO_H
8*0e8ec022SHuqiang Qin #define _DT_BINDINGS_IRQ_MESON_G12A_GPIO_H
9*0e8ec022SHuqiang Qin 
10*0e8ec022SHuqiang Qin /* IRQID[11:0] - GPIOAO[11:0] */
11*0e8ec022SHuqiang Qin #define IRQID_GPIOAO_0		0
12*0e8ec022SHuqiang Qin #define IRQID_GPIOAO_1		1
13*0e8ec022SHuqiang Qin #define IRQID_GPIOAO_2		2
14*0e8ec022SHuqiang Qin #define IRQID_GPIOAO_3		3
15*0e8ec022SHuqiang Qin #define IRQID_GPIOAO_4		4
16*0e8ec022SHuqiang Qin #define IRQID_GPIOAO_5		5
17*0e8ec022SHuqiang Qin #define IRQID_GPIOAO_6		6
18*0e8ec022SHuqiang Qin #define IRQID_GPIOAO_7		7
19*0e8ec022SHuqiang Qin #define IRQID_GPIOAO_8		8
20*0e8ec022SHuqiang Qin #define IRQID_GPIOAO_9		9
21*0e8ec022SHuqiang Qin #define IRQID_GPIOAO_10		10
22*0e8ec022SHuqiang Qin #define IRQID_GPIOAO_11		11
23*0e8ec022SHuqiang Qin 
24*0e8ec022SHuqiang Qin /* IRQID[27:12] - GPIOZ[15:0] */
25*0e8ec022SHuqiang Qin #define IRQID_GPIOZ_0		12
26*0e8ec022SHuqiang Qin #define IRQID_GPIOZ_1		13
27*0e8ec022SHuqiang Qin #define IRQID_GPIOZ_2		14
28*0e8ec022SHuqiang Qin #define IRQID_GPIOZ_3		15
29*0e8ec022SHuqiang Qin #define IRQID_GPIOZ_4		16
30*0e8ec022SHuqiang Qin #define IRQID_GPIOZ_5		17
31*0e8ec022SHuqiang Qin #define IRQID_GPIOZ_6		18
32*0e8ec022SHuqiang Qin #define IRQID_GPIOZ_7		19
33*0e8ec022SHuqiang Qin #define IRQID_GPIOZ_8		20
34*0e8ec022SHuqiang Qin #define IRQID_GPIOZ_9		21
35*0e8ec022SHuqiang Qin #define IRQID_GPIOZ_10		22
36*0e8ec022SHuqiang Qin #define IRQID_GPIOZ_11		23
37*0e8ec022SHuqiang Qin #define IRQID_GPIOZ_12		24
38*0e8ec022SHuqiang Qin #define IRQID_GPIOZ_13		25
39*0e8ec022SHuqiang Qin #define IRQID_GPIOZ_14		26
40*0e8ec022SHuqiang Qin #define IRQID_GPIOZ_15		27
41*0e8ec022SHuqiang Qin 
42*0e8ec022SHuqiang Qin /* IRQID[36:28] - GPIOH[8:0] */
43*0e8ec022SHuqiang Qin #define IRQID_GPIOH_0		28
44*0e8ec022SHuqiang Qin #define IRQID_GPIOH_1		29
45*0e8ec022SHuqiang Qin #define IRQID_GPIOH_2		30
46*0e8ec022SHuqiang Qin #define IRQID_GPIOH_3		31
47*0e8ec022SHuqiang Qin #define IRQID_GPIOH_4		32
48*0e8ec022SHuqiang Qin #define IRQID_GPIOH_5		33
49*0e8ec022SHuqiang Qin #define IRQID_GPIOH_6		34
50*0e8ec022SHuqiang Qin #define IRQID_GPIOH_7		35
51*0e8ec022SHuqiang Qin #define IRQID_GPIOH_8		36
52*0e8ec022SHuqiang Qin 
53*0e8ec022SHuqiang Qin /* IRQID[52:37] - BOOT[15:0] */
54*0e8ec022SHuqiang Qin #define IRQID_BOOT_0		37
55*0e8ec022SHuqiang Qin #define IRQID_BOOT_1		38
56*0e8ec022SHuqiang Qin #define IRQID_BOOT_2		39
57*0e8ec022SHuqiang Qin #define IRQID_BOOT_3		40
58*0e8ec022SHuqiang Qin #define IRQID_BOOT_4		41
59*0e8ec022SHuqiang Qin #define IRQID_BOOT_5		42
60*0e8ec022SHuqiang Qin #define IRQID_BOOT_6		43
61*0e8ec022SHuqiang Qin #define IRQID_BOOT_7		44
62*0e8ec022SHuqiang Qin #define IRQID_BOOT_8		45
63*0e8ec022SHuqiang Qin #define IRQID_BOOT_9		46
64*0e8ec022SHuqiang Qin #define IRQID_BOOT_10		47
65*0e8ec022SHuqiang Qin #define IRQID_BOOT_11		48
66*0e8ec022SHuqiang Qin #define IRQID_BOOT_12		49
67*0e8ec022SHuqiang Qin #define IRQID_BOOT_13		50
68*0e8ec022SHuqiang Qin #define IRQID_BOOT_14		51
69*0e8ec022SHuqiang Qin #define IRQID_BOOT_15		52
70*0e8ec022SHuqiang Qin 
71*0e8ec022SHuqiang Qin /* IRQID[60:53] - GPIOC[7:0] */
72*0e8ec022SHuqiang Qin #define IRQID_GPIOC_0		53
73*0e8ec022SHuqiang Qin #define IRQID_GPIOC_1		54
74*0e8ec022SHuqiang Qin #define IRQID_GPIOC_2		55
75*0e8ec022SHuqiang Qin #define IRQID_GPIOC_3		56
76*0e8ec022SHuqiang Qin #define IRQID_GPIOC_4		57
77*0e8ec022SHuqiang Qin #define IRQID_GPIOC_5		58
78*0e8ec022SHuqiang Qin #define IRQID_GPIOC_6		59
79*0e8ec022SHuqiang Qin #define IRQID_GPIOC_7		60
80*0e8ec022SHuqiang Qin 
81*0e8ec022SHuqiang Qin /* IRQID[76:61] - GPIOA[15:0] */
82*0e8ec022SHuqiang Qin #define IRQID_GPIOA_0		61
83*0e8ec022SHuqiang Qin #define IRQID_GPIOA_1		62
84*0e8ec022SHuqiang Qin #define IRQID_GPIOA_2		63
85*0e8ec022SHuqiang Qin #define IRQID_GPIOA_3		64
86*0e8ec022SHuqiang Qin #define IRQID_GPIOA_4		65
87*0e8ec022SHuqiang Qin #define IRQID_GPIOA_5		66
88*0e8ec022SHuqiang Qin #define IRQID_GPIOA_6		67
89*0e8ec022SHuqiang Qin #define IRQID_GPIOA_7		68
90*0e8ec022SHuqiang Qin #define IRQID_GPIOA_8		69
91*0e8ec022SHuqiang Qin #define IRQID_GPIOA_9		70
92*0e8ec022SHuqiang Qin #define IRQID_GPIOA_10		71
93*0e8ec022SHuqiang Qin #define IRQID_GPIOA_11		72
94*0e8ec022SHuqiang Qin #define IRQID_GPIOA_12		73
95*0e8ec022SHuqiang Qin #define IRQID_GPIOA_13		74
96*0e8ec022SHuqiang Qin #define IRQID_GPIOA_14		75
97*0e8ec022SHuqiang Qin #define IRQID_GPIOA_15		76
98*0e8ec022SHuqiang Qin 
99*0e8ec022SHuqiang Qin /* IRQID[96:77] - GPIOX[19:0] */
100*0e8ec022SHuqiang Qin #define IRQID_GPIOX_0		77
101*0e8ec022SHuqiang Qin #define IRQID_GPIOX_1		78
102*0e8ec022SHuqiang Qin #define IRQID_GPIOX_2		79
103*0e8ec022SHuqiang Qin #define IRQID_GPIOX_3		80
104*0e8ec022SHuqiang Qin #define IRQID_GPIOX_4		81
105*0e8ec022SHuqiang Qin #define IRQID_GPIOX_5		82
106*0e8ec022SHuqiang Qin #define IRQID_GPIOX_6		83
107*0e8ec022SHuqiang Qin #define IRQID_GPIOX_7		84
108*0e8ec022SHuqiang Qin #define IRQID_GPIOX_8		85
109*0e8ec022SHuqiang Qin #define IRQID_GPIOX_9		86
110*0e8ec022SHuqiang Qin #define IRQID_GPIOX_10		87
111*0e8ec022SHuqiang Qin #define IRQID_GPIOX_11		88
112*0e8ec022SHuqiang Qin #define IRQID_GPIOX_12		89
113*0e8ec022SHuqiang Qin #define IRQID_GPIOX_13		90
114*0e8ec022SHuqiang Qin #define IRQID_GPIOX_14		91
115*0e8ec022SHuqiang Qin #define IRQID_GPIOX_15		92
116*0e8ec022SHuqiang Qin #define IRQID_GPIOX_16		93
117*0e8ec022SHuqiang Qin #define IRQID_GPIOX_17		94
118*0e8ec022SHuqiang Qin #define IRQID_GPIOX_18		95
119*0e8ec022SHuqiang Qin #define IRQID_GPIOX_19		96
120*0e8ec022SHuqiang Qin 
121*0e8ec022SHuqiang Qin /* IRQID[99:97] - GPIOE[2:0] */
122*0e8ec022SHuqiang Qin #define IRQID_GPIOE_0		97
123*0e8ec022SHuqiang Qin #define IRQID_GPIOE_1		98
124*0e8ec022SHuqiang Qin #define IRQID_GPIOE_2		99
125*0e8ec022SHuqiang Qin 
126*0e8ec022SHuqiang Qin #endif /* _DT_BINDINGS_IRQ_MESON_G12A_GPIO_H */
127