1*9c405849SDanila Tikhonov /* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */ 2*9c405849SDanila Tikhonov /* 3*9c405849SDanila Tikhonov * Qualcomm SM7150 interconnect IDs 4*9c405849SDanila Tikhonov * 5*9c405849SDanila Tikhonov * Copyright (c) 2020, The Linux Foundation. All rights reserved. 6*9c405849SDanila Tikhonov * Copyright (c) 2024, Danila Tikhonov <danila@jiaxyga.com> 7*9c405849SDanila Tikhonov */ 8*9c405849SDanila Tikhonov 9*9c405849SDanila Tikhonov #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SM7150_H 10*9c405849SDanila Tikhonov #define __DT_BINDINGS_INTERCONNECT_QCOM_SM7150_H 11*9c405849SDanila Tikhonov 12*9c405849SDanila Tikhonov #define MASTER_A1NOC_CFG 0 13*9c405849SDanila Tikhonov #define MASTER_QUP_0 1 14*9c405849SDanila Tikhonov #define MASTER_TSIF 2 15*9c405849SDanila Tikhonov #define MASTER_EMMC 3 16*9c405849SDanila Tikhonov #define MASTER_SDCC_2 4 17*9c405849SDanila Tikhonov #define MASTER_SDCC_4 5 18*9c405849SDanila Tikhonov #define MASTER_UFS_MEM 6 19*9c405849SDanila Tikhonov #define A1NOC_SNOC_SLV 7 20*9c405849SDanila Tikhonov #define SLAVE_SERVICE_A1NOC 8 21*9c405849SDanila Tikhonov 22*9c405849SDanila Tikhonov #define MASTER_A2NOC_CFG 0 23*9c405849SDanila Tikhonov #define MASTER_QDSS_BAM 1 24*9c405849SDanila Tikhonov #define MASTER_QUP_1 2 25*9c405849SDanila Tikhonov #define MASTER_CNOC_A2NOC 3 26*9c405849SDanila Tikhonov #define MASTER_CRYPTO_CORE_0 4 27*9c405849SDanila Tikhonov #define MASTER_IPA 5 28*9c405849SDanila Tikhonov #define MASTER_PCIE 6 29*9c405849SDanila Tikhonov #define MASTER_QDSS_ETR 7 30*9c405849SDanila Tikhonov #define MASTER_USB3 8 31*9c405849SDanila Tikhonov #define A2NOC_SNOC_SLV 9 32*9c405849SDanila Tikhonov #define SLAVE_ANOC_PCIE_GEM_NOC 10 33*9c405849SDanila Tikhonov #define SLAVE_SERVICE_A2NOC 11 34*9c405849SDanila Tikhonov 35*9c405849SDanila Tikhonov #define MASTER_CAMNOC_HF0_UNCOMP 0 36*9c405849SDanila Tikhonov #define MASTER_CAMNOC_RT_UNCOMP 1 37*9c405849SDanila Tikhonov #define MASTER_CAMNOC_SF_UNCOMP 2 38*9c405849SDanila Tikhonov #define MASTER_CAMNOC_NRT_UNCOMP 3 39*9c405849SDanila Tikhonov #define SLAVE_CAMNOC_UNCOMP 4 40*9c405849SDanila Tikhonov 41*9c405849SDanila Tikhonov #define MASTER_NPU 0 42*9c405849SDanila Tikhonov #define SLAVE_CDSP_GEM_NOC 1 43*9c405849SDanila Tikhonov 44*9c405849SDanila Tikhonov #define MASTER_SPDM 0 45*9c405849SDanila Tikhonov #define SNOC_CNOC_MAS 1 46*9c405849SDanila Tikhonov #define MASTER_QDSS_DAP 2 47*9c405849SDanila Tikhonov #define SLAVE_A1NOC_CFG 3 48*9c405849SDanila Tikhonov #define SLAVE_A2NOC_CFG 4 49*9c405849SDanila Tikhonov #define SLAVE_AHB2PHY_NORTH 5 50*9c405849SDanila Tikhonov #define SLAVE_AHB2PHY_SOUTH 6 51*9c405849SDanila Tikhonov #define SLAVE_AHB2PHY_WEST 7 52*9c405849SDanila Tikhonov #define SLAVE_AOP 8 53*9c405849SDanila Tikhonov #define SLAVE_AOSS 9 54*9c405849SDanila Tikhonov #define SLAVE_CAMERA_CFG 10 55*9c405849SDanila Tikhonov #define SLAVE_CAMERA_NRT_THROTTLE_CFG 11 56*9c405849SDanila Tikhonov #define SLAVE_CAMERA_RT_THROTTLE_CFG 12 57*9c405849SDanila Tikhonov #define SLAVE_CLK_CTL 13 58*9c405849SDanila Tikhonov #define SLAVE_CDSP_CFG 14 59*9c405849SDanila Tikhonov #define SLAVE_RBCPR_CX_CFG 15 60*9c405849SDanila Tikhonov #define SLAVE_RBCPR_MX_CFG 16 61*9c405849SDanila Tikhonov #define SLAVE_CRYPTO_0_CFG 17 62*9c405849SDanila Tikhonov #define SLAVE_CNOC_DDRSS 18 63*9c405849SDanila Tikhonov #define SLAVE_DISPLAY_CFG 19 64*9c405849SDanila Tikhonov #define SLAVE_DISPLAY_THROTTLE_CFG 20 65*9c405849SDanila Tikhonov #define SLAVE_EMMC_CFG 21 66*9c405849SDanila Tikhonov #define SLAVE_GLM 22 67*9c405849SDanila Tikhonov #define SLAVE_GRAPHICS_3D_CFG 23 68*9c405849SDanila Tikhonov #define SLAVE_IMEM_CFG 24 69*9c405849SDanila Tikhonov #define SLAVE_IPA_CFG 25 70*9c405849SDanila Tikhonov #define SLAVE_CNOC_MNOC_CFG 26 71*9c405849SDanila Tikhonov #define SLAVE_PCIE_CFG 27 72*9c405849SDanila Tikhonov #define SLAVE_PDM 28 73*9c405849SDanila Tikhonov #define SLAVE_PIMEM_CFG 29 74*9c405849SDanila Tikhonov #define SLAVE_PRNG 30 75*9c405849SDanila Tikhonov #define SLAVE_QDSS_CFG 31 76*9c405849SDanila Tikhonov #define SLAVE_QUP_0 32 77*9c405849SDanila Tikhonov #define SLAVE_QUP_1 33 78*9c405849SDanila Tikhonov #define SLAVE_SDCC_2 34 79*9c405849SDanila Tikhonov #define SLAVE_SDCC_4 35 80*9c405849SDanila Tikhonov #define SLAVE_SNOC_CFG 36 81*9c405849SDanila Tikhonov #define SLAVE_SPDM_WRAPPER 37 82*9c405849SDanila Tikhonov #define SLAVE_TCSR 38 83*9c405849SDanila Tikhonov #define SLAVE_TLMM_NORTH 39 84*9c405849SDanila Tikhonov #define SLAVE_TLMM_SOUTH 40 85*9c405849SDanila Tikhonov #define SLAVE_TLMM_WEST 41 86*9c405849SDanila Tikhonov #define SLAVE_TSIF 42 87*9c405849SDanila Tikhonov #define SLAVE_UFS_MEM_CFG 43 88*9c405849SDanila Tikhonov #define SLAVE_USB3 44 89*9c405849SDanila Tikhonov #define SLAVE_VENUS_CFG 45 90*9c405849SDanila Tikhonov #define SLAVE_VENUS_CVP_THROTTLE_CFG 46 91*9c405849SDanila Tikhonov #define SLAVE_VENUS_THROTTLE_CFG 47 92*9c405849SDanila Tikhonov #define SLAVE_VSENSE_CTRL_CFG 48 93*9c405849SDanila Tikhonov #define SLAVE_CNOC_A2NOC 49 94*9c405849SDanila Tikhonov #define SLAVE_SERVICE_CNOC 50 95*9c405849SDanila Tikhonov 96*9c405849SDanila Tikhonov #define MASTER_CNOC_DC_NOC 0 97*9c405849SDanila Tikhonov #define SLAVE_GEM_NOC_CFG 1 98*9c405849SDanila Tikhonov #define SLAVE_LLCC_CFG 2 99*9c405849SDanila Tikhonov 100*9c405849SDanila Tikhonov #define MASTER_AMPSS_M0 0 101*9c405849SDanila Tikhonov #define MASTER_SYS_TCU 1 102*9c405849SDanila Tikhonov #define MASTER_GEM_NOC_CFG 2 103*9c405849SDanila Tikhonov #define MASTER_COMPUTE_NOC 3 104*9c405849SDanila Tikhonov #define MASTER_MNOC_HF_MEM_NOC 4 105*9c405849SDanila Tikhonov #define MASTER_MNOC_SF_MEM_NOC 5 106*9c405849SDanila Tikhonov #define MASTER_GEM_NOC_PCIE_SNOC 6 107*9c405849SDanila Tikhonov #define MASTER_SNOC_GC_MEM_NOC 7 108*9c405849SDanila Tikhonov #define MASTER_SNOC_SF_MEM_NOC 8 109*9c405849SDanila Tikhonov #define MASTER_GRAPHICS_3D 9 110*9c405849SDanila Tikhonov #define SLAVE_MSS_PROC_MS_MPU_CFG 10 111*9c405849SDanila Tikhonov #define SLAVE_GEM_NOC_SNOC 11 112*9c405849SDanila Tikhonov #define SLAVE_LLCC 12 113*9c405849SDanila Tikhonov #define SLAVE_SERVICE_GEM_NOC 13 114*9c405849SDanila Tikhonov 115*9c405849SDanila Tikhonov 116*9c405849SDanila Tikhonov #define MASTER_LLCC 0 117*9c405849SDanila Tikhonov #define SLAVE_EBI_CH0 1 118*9c405849SDanila Tikhonov 119*9c405849SDanila Tikhonov #define MASTER_CNOC_MNOC_CFG 0 120*9c405849SDanila Tikhonov #define MASTER_CAMNOC_HF0 1 121*9c405849SDanila Tikhonov #define MASTER_CAMNOC_NRT 2 122*9c405849SDanila Tikhonov #define MASTER_CAMNOC_RT 3 123*9c405849SDanila Tikhonov #define MASTER_CAMNOC_SF 4 124*9c405849SDanila Tikhonov #define MASTER_MDP_PORT0 5 125*9c405849SDanila Tikhonov #define MASTER_MDP_PORT1 6 126*9c405849SDanila Tikhonov #define MASTER_ROTATOR 7 127*9c405849SDanila Tikhonov #define MASTER_VIDEO_P0 8 128*9c405849SDanila Tikhonov #define MASTER_VIDEO_P1 9 129*9c405849SDanila Tikhonov #define MASTER_VIDEO_PROC 10 130*9c405849SDanila Tikhonov #define SLAVE_MNOC_SF_MEM_NOC 11 131*9c405849SDanila Tikhonov #define SLAVE_MNOC_HF_MEM_NOC 12 132*9c405849SDanila Tikhonov #define SLAVE_SERVICE_MNOC 13 133*9c405849SDanila Tikhonov 134*9c405849SDanila Tikhonov #define MASTER_SNOC_CFG 0 135*9c405849SDanila Tikhonov #define A1NOC_SNOC_MAS 1 136*9c405849SDanila Tikhonov #define A2NOC_SNOC_MAS 2 137*9c405849SDanila Tikhonov #define MASTER_GEM_NOC_SNOC 3 138*9c405849SDanila Tikhonov #define MASTER_PIMEM 4 139*9c405849SDanila Tikhonov #define MASTER_GIC 5 140*9c405849SDanila Tikhonov #define SLAVE_APPSS 6 141*9c405849SDanila Tikhonov #define SNOC_CNOC_SLV 7 142*9c405849SDanila Tikhonov #define SLAVE_SNOC_GEM_NOC_GC 8 143*9c405849SDanila Tikhonov #define SLAVE_SNOC_GEM_NOC_SF 9 144*9c405849SDanila Tikhonov #define SLAVE_OCIMEM 10 145*9c405849SDanila Tikhonov #define SLAVE_PIMEM 11 146*9c405849SDanila Tikhonov #define SLAVE_SERVICE_SNOC 12 147*9c405849SDanila Tikhonov #define SLAVE_QDSS_STM 13 148*9c405849SDanila Tikhonov #define SLAVE_TCU 14 149*9c405849SDanila Tikhonov 150*9c405849SDanila Tikhonov #endif 151